upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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134 lines
2.8 KiB
134 lines
2.8 KiB
/*
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* (C) Copyright 2002, 2003
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* David Mueller, ELSOFT AG, d.mueller@elsoft.ch
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*/
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/****************************************************************************
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* Global routines used for VCMA9
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*****************************************************************************/
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#include <s3c2410.h>
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extern int mem_test(unsigned long start, unsigned long ramsize,int mode);
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void print_vcma9_info(void);
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#if defined(CONFIG_CMD_NAND)
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typedef enum {
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NFCE_LOW,
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NFCE_HIGH
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} NFCE_STATE;
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static inline void NF_Conf(u16 conf)
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{
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S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
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nand->NFCONF = conf;
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}
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static inline void NF_Cmd(u8 cmd)
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{
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S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
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nand->NFCMD = cmd;
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}
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static inline void NF_CmdW(u8 cmd)
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{
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NF_Cmd(cmd);
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udelay(1);
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}
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static inline void NF_Addr(u8 addr)
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{
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S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
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nand->NFADDR = addr;
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}
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static inline void NF_SetCE(NFCE_STATE s)
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{
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S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
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switch (s) {
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case NFCE_LOW:
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nand->NFCONF &= ~(1<<11);
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break;
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case NFCE_HIGH:
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nand->NFCONF |= (1<<11);
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break;
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}
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}
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static inline void NF_WaitRB(void)
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{
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S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
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while (!(nand->NFSTAT & (1<<0)));
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}
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static inline void NF_Write(u8 data)
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{
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S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
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nand->NFDATA = data;
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}
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static inline u8 NF_Read(void)
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{
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S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
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return(nand->NFDATA);
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}
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static inline void NF_Init_ECC(void)
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{
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S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
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nand->NFCONF |= (1<<12);
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}
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static inline u32 NF_Read_ECC(void)
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{
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S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
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return(nand->NFECC);
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}
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#endif
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/* VCMA9 PLD regsiters */
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typedef struct {
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S3C24X0_REG8 ID;
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S3C24X0_REG8 NIC;
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S3C24X0_REG8 CAN;
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S3C24X0_REG8 MISC;
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S3C24X0_REG8 GPCD;
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S3C24X0_REG8 BOARD;
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S3C24X0_REG8 SDRAM;
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} /*__attribute__((__packed__))*/ VCMA9_PLD;
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#define VCMA9_PLD_BASE 0x2C000100
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static inline VCMA9_PLD * const VCMA9_GetBase_PLD(void)
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{
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return (VCMA9_PLD * const)VCMA9_PLD_BASE;
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}
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