upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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84 lines
3.0 KiB
84 lines
3.0 KiB
#ifndef _ADDRESS_TABLE_H
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#define _ADDRESS_TABLE_H 1
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/*
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* ----------------------------------------------------------------------------
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* addressTable.h - this file has all the declarations of the address table
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*/
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#define _8K_TABLE 0
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#define ADDRESS_TABLE_ALIGNMENT 8
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#define HASH_DEFAULT_MODE 14
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#define HASH_MODE 13
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#define HASH_SIZE 12
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#define HOP_NUMBER 12
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#define MAC_ADDRESS_STRING_SIZE 12
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#define MAC_ENTRY_SIZE sizeof(addrTblEntry)
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#define MAX_NUMBER_OF_ADDRESSES_TO_STORE 1000
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#define PROMISCUOUS_MODE 0
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#define SKIP 1<<1
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#define SKIP_BIT 1
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#define VALID 1
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/*
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* ----------------------------------------------------------------------------
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* XXX_MIKE - potential sign-extension bugs lurk here...
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*/
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#define NIBBLE_SWAPPING_32_BIT(X) ( (((X) & 0xf0f0f0f0) >> 4) \
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| (((X) & 0x0f0f0f0f) << 4) )
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#define NIBBLE_SWAPPING_16_BIT(X) ( (((X) & 0x0000f0f0) >> 4) \
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| (((X) & 0x00000f0f) << 4) )
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#define FLIP_4_BITS(X) ( (((X) & 0x01) << 3) | (((X) & 0x002) << 1) \
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| (((X) & 0x04) >> 1) | (((X) & 0x008) >> 3) )
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#define FLIP_6_BITS(X) ( (((X) & 0x01) << 5) | (((X) & 0x020) >> 5) \
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| (((X) & 0x02) << 3) | (((X) & 0x010) >> 3) \
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| (((X) & 0x04) << 1) | (((X) & 0x008) >> 1) )
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#define FLIP_9_BITS(X) ( (((X) & 0x01) << 8) | (((X) & 0x100) >> 8) \
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| (((X) & 0x02) << 6) | (((X) & 0x080) >> 6) \
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| (((X) & 0x04) << 4) | (((X) & 0x040) >> 4) \
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| ((X) & 0x10) | (((X) & 0x08) << 2) | (((X) & 0x020) >> 2) )
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/*
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* V: value we're operating on
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* O: offset of rightmost bit in field
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* W: width of field to shift
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* S: distance to shift left
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*/
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#define MASK( fieldWidth ) ((1 << (fieldWidth)) - 1)
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#define leftShiftedBitfield( V,O,W,S) (((V) & (MASK(W) << (O))) << (S))
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#define rightShiftedBitfield(V,O,W,S) (((u32)((V) & (MASK(W) << (O)))) >> (S))
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/*
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* Push to main memory all cache lines associated with
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* the specified range of virtual memory addresses
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*
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* A: Address of first byte in range to flush
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* N: Number of bytes to flush
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* Note - flush_dcache_range() does a "sync", does NOT invalidate
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*/
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#define DCACHE_FLUSH_N_SYNC( A, N ) flush_dcache_range( (A), ((A)+(N)) )
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typedef struct addressTableEntryStruct {
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u32 hi;
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u32 lo;
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} addrTblEntry;
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u32
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uncachedPages( u32 pages );
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u32
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hashTableFunction( u32 macH, u32 macL, u32 HashSize, u32 hash_mode );
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unsigned int
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initAddressTable( u32 port, u32 hashMode, u32 hashSize );
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int
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addAddressTableEntry( u32 port, u32 macH, u32 macL, u32 rd, u32 skip );
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#endif /* #ifndef _ADDRESS_TABLE_H */
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