upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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60 lines
2.2 KiB
60 lines
2.2 KiB
/*
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* Copyright 2008 Freescale Semiconductor, Inc.
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*
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* (C) Copyright 2000
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/fsl_law.h>
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#include <asm/mmu.h>
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/* LAW(Local Access Window) configuration:
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* 0000_0000-0800_0000: DDR(512M) -or- larger
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* c000_0000-cfff_ffff: PCI(256M)
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* d000_0000-dfff_ffff: RapidIO(256M)
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* e000_0000-ffff_ffff: localbus(512M)
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* e000_0000-e3ff_ffff: LBC 64M, 32-bit flash on CS6
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* e400_0000-e7ff_ffff: LBC 64M, 32-bit flash on CS1
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* e800_0000-efff_ffff: LBC 128M, nothing here
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* f000_0000-f3ff_ffff: LBC 64M, SDRAM on CS3
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* f400_0000-f7ff_ffff: LBC 64M, SDRAM on CS4
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* f800_0000-fdff_ffff: LBC 64M, nothing here
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* fc00_0000-fcff_ffff: LBC 16M, CSR,RTC,UART,etc on CS5
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* fd00_0000-fdff_ffff: LBC 16M, nothing here
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* fe00_0000-feff_ffff: LBC 16M, nothing here
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* ff00_0000-ff6f_ffff: LBC 7M, nothing here
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* ff70_0000-ff7f_ffff: CCSRBAR 1M
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* ff80_0000-ffff_ffff: LBC 8M, 8-bit flash on CS0
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* Note: CCSRBAR and L2-as-SRAM don't need configure Local Access
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* Window.
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* Note: If flash is 8M at default position(last 8M),no LAW needed.
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*/
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struct law_entry law_table[] = {
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#ifndef CONFIG_SPD_EEPROM
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SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_DDR),
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#endif
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SET_LAW(CONFIG_SYS_PCI_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCI),
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SET_LAW(CONFIG_SYS_LBC_SDRAM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_LBC),
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};
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int num_law_entries = ARRAY_SIZE(law_table);
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