upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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229 lines
6.8 KiB
229 lines
6.8 KiB
/*
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* Copyright (C) 2009 Texas Instruments Incorporated
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/* Spectrum Digital TMS320DM365 EVM board */
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#define DAVINCI_DM365EVM
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#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 3rd stage loader */
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#define CONFIG_SYS_NO_FLASH /* that is, no *NOR* flash */
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#define CONFIG_SYS_CONSOLE_INFO_QUIET
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/* SoC Configuration */
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#define CONFIG_ARM926EJS /* arm926ejs CPU */
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#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
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#define CONFIG_SYS_HZ_CLOCK 24000000 /* timer0 freq */
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#define CONFIG_SOC_DM365
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/* Memory Info */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM_1 0x80000000
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#define PHYS_SDRAM_1_SIZE (128 << 20) /* 128 MiB */
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/* Serial Driver info: UART0 for console */
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE -4
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#define CONFIG_SYS_NS16550_COM1 0x01c20000
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#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_BAUDRATE 115200
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/* EEPROM definitions for EEPROM on DM365 EVM */
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
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/* Network Configuration */
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#define CONFIG_DRIVER_TI_EMAC
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#define CONFIG_MII
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#define CONFIG_BOOTP_DNS
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#define CONFIG_BOOTP_DNS2
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#define CONFIG_BOOTP_SEND_HOSTNAME
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#define CONFIG_NET_RETRY_COUNT 10
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/* I2C */
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#define CONFIG_HARD_I2C
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#define CONFIG_DRIVER_DAVINCI_I2C
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#define CONFIG_SYS_I2C_SPEED 400000
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#define CONFIG_SYS_I2C_SLAVE 0x10 /* SMBus host address */
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/* NAND: socketed, two chipselects, normally 2 GBytes */
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#define CONFIG_NAND_DAVINCI
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#define CONFIG_SYS_NAND_CS 2
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#define CONFIG_SYS_NAND_USE_FLASH_BBT
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#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
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#define CONFIG_SYS_NAND_PAGE_2K
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#define CONFIG_SYS_NAND_LARGEPAGE
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#define CONFIG_SYS_NAND_BASE_LIST { 0x02000000, }
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/* socket has two chipselects, nCE0 gated by address BIT(14) */
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_MAX_CHIPS 2
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/* SD/MMC */
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#define CONFIG_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_DAVINCI_MMC
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#define CONFIG_DAVINCI_MMC_SD1
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#define CONFIG_MMC_MBLOCK
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#define PINMUX4_USBDRVBUS_BITCLEAR 0x3000
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#define PINMUX4_USBDRVBUS_BITSET 0x2000
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/* USB Configuration */
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#define CONFIG_USB_DAVINCI
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#define CONFIG_MUSB_HCD
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#ifdef CONFIG_USB_DAVINCI
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#define CONFIG_CMD_USB /* include support for usb */
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#define CONFIG_CMD_STORAGE /* include support for usb */
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#define CONFIG_CMD_FAT /* include support for FAT/storage*/
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#define CONFIG_DOS_PARTITION /* include support for FAT/storage*/
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#endif
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#ifdef CONFIG_MUSB_HCD /* include support for usb host */
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#define CONFIG_CMD_USB /* include support for usb cmd */
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#define CONFIG_USB_STORAGE /* MSC class support */
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#define CONFIG_CMD_STORAGE /* inclue support for usb-storage cmd */
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#define CONFIG_CMD_FAT /* inclue support for FAT/storage */
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#define CONFIG_DOS_PARTITION /* inclue support for FAT/storage */
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#ifdef CONFIG_USB_KEYBOARD /* HID class support */
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#define CONFIG_SYS_USB_EVENT_POLL
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#define CONFIG_PREBOOT "usb start"
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#endif /* CONFIG_USB_KEYBOARD */
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#endif /* CONFIG_MUSB_HCD */
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#ifdef CONFIG_MUSB_UDC
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#define CONFIG_USB_DEVICE 1
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#define CONFIG_USB_TTY 1
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
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#define CONFIG_USBD_VENDORID 0x0451
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#define CONFIG_USBD_PRODUCTID 0x5678
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#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
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#define CONFIG_USBD_PRODUCT_NAME "DM365VM"
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#endif /* CONFIG_MUSB_UDC */
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/* U-Boot command configuration */
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#include <config_cmd_default.h>
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#undef CONFIG_CMD_BDI
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#undef CONFIG_CMD_FLASH
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#undef CONFIG_CMD_FPGA
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#undef CONFIG_CMD_SETGETDCR
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#define CONFIG_CMD_ASKENV
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_I2C
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_SAVES
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#ifdef CONFIG_CMD_BDI
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#define CONFIG_CLOCKS
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#endif
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#ifdef CONFIG_MMC
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#define CONFIG_DOS_PARTITION
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#define CONFIG_CMD_EXT2
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_MMC
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#endif
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#ifdef CONFIG_NAND_DAVINCI
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_MTD_PARTITIONS
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#define CONFIG_MTD_DEVICE
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_UBI
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#define CONFIG_RBTREE
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#endif
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#define CONFIG_CRC32_VERIFY
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#define CONFIG_MX_CYCLIC
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/* U-Boot general configuration */
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#define CONFIG_BOOTFILE "uImage" /* Boot file name */
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#define CONFIG_SYS_PROMPT "DM36x EVM # " /* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
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#define CONFIG_SYS_PBSIZE /* Print buffer size */ \
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(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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#define CONFIG_SYS_HUSH_PARSER
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#define CONFIG_SYS_LONGHELP
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#ifdef CONFIG_NAND_DAVINCI
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#define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB */
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#define CONFIG_ENV_IS_IN_NAND
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#define CONFIG_ENV_OFFSET 0x3C0000
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#undef CONFIG_ENV_IS_IN_FLASH
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#endif
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#if defined(CONFIG_MMC) && !defined(CONFIG_ENV_IS_IN_NAND)
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#define CONFIG_CMD_ENV
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#define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */
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#define CONFIG_ENV_OFFSET (51 << 9) /* Sector 51 */
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#define CONFIG_ENV_IS_IN_MMC
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#undef CONFIG_ENV_IS_IN_FLASH
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#endif
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_BOOTCOMMAND \
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"dhcp;bootm"
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#define CONFIG_BOOTARGS \
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"console=ttyS0,115200n8 " \
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"root=/dev/mmcblk0p1 rootwait rootfstype=ext3 ro"
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_VERSION_VARIABLE
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#define CONFIG_TIMESTAMP
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/* U-Boot memory configuration */
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#define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */
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#define CONFIG_SYS_MEMTEST_START 0x87000000 /* physical address */
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#define CONFIG_SYS_MEMTEST_END 0x88000000 /* test 16MB RAM */
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/* Linux interfacing */
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_SYS_BARGSIZE 1024 /* bootarg Size */
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#define CONFIG_SYS_LOAD_ADDR 0x80700000 /* kernel address */
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/* NAND configuration issocketed with two chipselects just like the DM355 EVM.
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* It normally comes with a 2GByte SLC part with 2KB pages
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* (and 128KB erase blocks); other
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* 2GByte parts may have 4KB pages, 256KB erase blocks, and use MLC. (MLC
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* pretty much demands the 4-bit ECC support.) You can of course swap in
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* other parts, including small page ones.
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*/
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#define MTDIDS_DEFAULT "nand0=davinci_nand.0"
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#ifdef CONFIG_SYS_NAND_LARGEPAGE
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/* Use same layout for 128K/256K blocks; allow some bad blocks */
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#define PART_BOOT "2m(bootloader)ro,"
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#else
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/* Assume 16K erase blocks; allow a few bad ones. */
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#define PART_BOOT "512k(bootloader)ro,"
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#endif
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#define PART_KERNEL "4m(kernel)," /* kernel + initramfs */
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#define PART_REST "-(filesystem)"
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#define MTDPARTS_DEFAULT \
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"mtdparts=davinci_nand.0:" PART_BOOT PART_KERNEL PART_REST
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#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
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#endif /* __CONFIG_H */
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