upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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91 lines
1.5 KiB
91 lines
1.5 KiB
/dts-v1/;
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#include "tegra20.dtsi"
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/ {
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model = "NVIDIA Tegra20 Ventana evaluation board";
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compatible = "nvidia,ventana", "nvidia,tegra20";
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aliases {
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usb0 = "/usb@c5008000";
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sdhci0 = "/sdhci@c8000600";
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sdhci1 = "/sdhci@c8000400";
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};
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memory {
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reg = <0x00000000 0x40000000>;
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};
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host1x {
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status = "okay";
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dc@54200000 {
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status = "okay";
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rgb {
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status = "okay";
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nvidia,panel = <&lcd_panel>;
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};
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};
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};
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serial@70006300 {
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clock-frequency = < 216000000 >;
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};
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i2c@7000c000 {
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status = "disabled";
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};
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i2c@7000c400 {
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status = "disabled";
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};
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i2c@7000c500 {
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status = "disabled";
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};
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i2c@7000d000 {
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status = "disabled";
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};
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usb@c5000000 {
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status = "disabled";
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};
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usb@c5004000 {
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status = "disabled";
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};
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sdhci@c8000400 {
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status = "okay";
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cd-gpios = <&gpio 69 1>; /* gpio PI5 */
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wp-gpios = <&gpio 57 0>; /* gpio PH1 */
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power-gpios = <&gpio 70 0>; /* gpio PI6 */
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bus-width = <4>;
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};
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sdhci@c8000600 {
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status = "okay";
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bus-width = <8>;
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};
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lcd_panel: panel {
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clock = <72072000>;
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xres = <1366>;
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yres = <768>;
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left-margin = <58>;
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right-margin = <58>;
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hsync-len = <58>;
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lower-margin = <4>;
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upper-margin = <4>;
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vsync-len = <4>;
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hsync-active-high;
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vsync-active-high;
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nvidia,bits-per-pixel = <16>;
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nvidia,pwm = <&pwm 2 0>;
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nvidia,backlight-enable-gpios = <&gpio 28 0>; /* PD4 */
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nvidia,lvds-shutdown-gpios = <&gpio 10 0>; /* PB2 */
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nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */
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nvidia,panel-vdd-gpios = <&gpio 22 0>; /* PC6 */
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nvidia,panel-timings = <0 0 200 0 0>;
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};
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};
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