upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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59 lines
1.6 KiB
59 lines
1.6 KiB
/*
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* omap.h
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*
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* Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
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*
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* Author:
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* Chandan Nath <chandan.nath@ti.com>
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*
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* Derived from OMAP4 work by
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* Aneesh V <aneesh@ti.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _OMAP_H_
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#define _OMAP_H_
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/*
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* Non-secure SRAM Addresses
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* Non-secure RAM starts at 0x40300000 for GP devices. But we keep SRAM_BASE
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* at 0x40304000(EMU base) so that our code works for both EMU and GP
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*/
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#define NON_SECURE_SRAM_START 0x40304000
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#define NON_SECURE_SRAM_END 0x4030E000
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#define LOW_LEVEL_SRAM_STACK 0x4030B7FC
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/* ROM code defines */
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/* Boot device */
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#define BOOT_DEVICE_MASK 0xFF
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#define BOOT_DEVICE_OFFSET 0x8
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#define DEV_DESC_PTR_OFFSET 0x4
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#define DEV_DATA_PTR_OFFSET 0x18
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#define BOOT_MODE_OFFSET 0x8
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#define RESET_REASON_OFFSET 0x9
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#define CH_FLAGS_OFFSET 0xA
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#define CH_FLAGS_CHSETTINGS (0x1 << 0)
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#define CH_FLAGS_CHRAM (0x1 << 1)
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#define CH_FLAGS_CHFLASH (0x1 << 2)
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#define CH_FLAGS_CHMMCSD (0x1 << 3)
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#ifndef __ASSEMBLY__
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struct omap_boot_parameters {
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char *boot_message;
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unsigned int mem_boot_descriptor;
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unsigned char omap_bootdevice;
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unsigned char reset_reason;
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unsigned char ch_flags;
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};
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#endif
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#endif
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