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user-doc: add breaklines to minted

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S.J.R. van Schaik 2017-08-03 17:57:40 +02:00
parent db5e8d2cfd
commit 048173ab37
1 changed files with 12 additions and 12 deletions
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24
user-doc/user-doc.tex
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@ -100,7 +100,7 @@ This driver has been tested on the following boards:
To compile u-boot with support for SPI NOR flash:
\begin{minted}{text}
\begin{minted}[breaklines]{text}
git clone https://github.com/StephanvanSchaik/u-boot -b sunxi-spi
make clean
make A20-OLinuXino-Lime2_defconfig
@ -109,13 +109,13 @@ CROSS_COMPILE=armv7a-hardfloat-linux-gnueabi- make
After u-boot-sunxi-with-spl.bin has been built, we can put it on an SD card as follows to test it:
\begin{minted}{text}
\begin{minted}[breaklines]{text}
dd if=u-boot-sunxi-with-spl.bin of=/dev/sda bs=1024 seek=8
\end{minted}
While U-boot also supports booting from SPI NOR flash, it has been disabled by default:
\begin{minted}{text}
\begin{minted}[breaklines]{text}
make menuconfig
\end{minted}
@ -199,7 +199,7 @@ Therefore, to be able to configure the write-protection of the SPI NOR flash chi
Unlike the mainline version of flashrom, Google's fork has two flags to get the name and the
size of the Flash chip:
\begin{minted}{text}
\begin{minted}[breaklines]{text}
./flashrom --programmer=buspirate_spi:dev=/dev/buspirate --flash-name
flashrom v0.9.4 : bc6cab1 : Oct 30 2014 07:32:01 UTC on Linux 4.9.4-gentoo (x86_64), built with libpci 3.1.10, GCC 4.8.x-google 20140307 (prerelease), little endian
vendor="Macronix" name="MX25L6406E"
@ -211,7 +211,7 @@ flashrom v0.9.4 : bc6cab1 : Oct 30 2014 07:32:01 UTC on Linux 4.9.4-gentoo (x86
Further, Google's fork of flashrom allows us to tag regions on the SPI NOR flash chip with a custom name.
Assuming that the SPI NOR flash chip is 8 MiB, that the u-boot image is 512 kiB and that the Linux image is 3.5 MiB, we will be using the following \path{layout.txt} file for the ROTS:
\begin{minted}{text}
\begin{minted}[breaklines]{text}
000000:07ffff uboot
080000:3fffff linux
400000:7fffff initramfs
@ -221,13 +221,13 @@ We can then write \path{u-boot.bin}, \path{bzImage} and \path{initramfs.cpio.gz}
To speed up the process of writing these images, we have to disable parsing the fmap and the verification of unmodified regions.
Furthermore, to maintain an optimal stability, an SPI speed of no more than 2 MHz is recommended when using the BusPirate v3.6a:
\begin{minted}{text}
\begin{minted}[breaklines]{text}
./flashrom --programmer=buspirate_spi:spispeed=2M,dev=/dev/buspirate -l layout.txt -i uboot:u-boot.bin linux:bzImage initramfs:initramfs.cpio.gz -w --ignore-fmap --fast-verify
\end{minted}
Now that the images have been written to their respective regions, we can look at the write-protect ranges supported by the chip:
\begin{minted}{text}
\begin{minted}[breaklines]{text}
./flashrom --programmer=buspirate_spi:dev=/dev/buspirate --wp-list
flashrom v0.9.4 : bc6cab1 : Oct 30 2014 07:32:01 UTC on Linux 4.9.4-gentoo (x86_64), built with libpci 3.1.10, GCC 4.8.x-google 20140307 (prerelease), little endian
Valid write protection ranges:
@ -252,14 +252,14 @@ start: 0x000000, length: 0x800000
Since we don't want our images to be tampered with, we want to enable write-protection for the full range.
We can configure the write-protected range as follows:
\begin{minted}{text}
\begin{minted}[breaklines]{text}
./flashrom --programmer=buspirate_spi:spispeed=2M,dev=/dev/buspirate --wp-range 0x000000 0x800000
\end{minted}
After setting the range, we are still able to modify the contents of the entire SPI NOR flash chip.
To protect the range, we have to enable write protection as follows:
\begin{minted}{text}
\begin{minted}[breaklines]{text}
./flashrom --programmer=buspirate_spi:spispeed=2M,dev=/dev/buspirate --wp-enable
\end{minted}
@ -270,7 +270,7 @@ This prevents the user from disabling the write-protection feature, changing the
Download and compile the \emph{sunxi-fel} tool as follows:
\begin{minted}{text}
\begin{minted}[breaklines]{text}
git clone -b spiflash-a20-test https://github.com/ssvb/sunxi-tools.git
make
\end{minted}
@ -278,14 +278,14 @@ make
Connect or reset while holding the recovery or FEL button.
Once the board has booted into FEL mode, we can detect the SPI NOR flash chip as follows:
\begin{minted}{text}
\begin{minted}[breaklines]{text}
./sunxi-fel spiflash-info
Manufacturer: Winbond (EFh), model: 40h, size: 16777216 bytes.
\end{minted}
Then we can write the \path{u-boot.bin}, \path{bzImage} and \path{initramfs.cpio.gz} images as follows:
\begin{minted}{text}
\begin{minted}[breaklines]{text}
./sunxi-fel -p spiflash-write 0x000000 u-boot.bin
./sunxi-fel -p spiflash-write 0x080000 bzImage
./sunxi-fel -p spiflash-write 0x400000 initramfs.cpio.gz