upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
You can not select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
60 lines
1.9 KiB
60 lines
1.9 KiB
8 years ago
|
/*
|
||
|
|
* Copyright (C) 2013 Boundary Devices
|
||
|
|
* Copyright (C) 2014-2016, Toradex AG
|
||
|
|
*
|
||
|
|
* SPDX-License-Identifier: GPL-2.0+
|
||
|
|
*/
|
||
|
|
|
||
|
|
DATA 4, MX6_MMDC_P0_MDPDC, 0x0002002D
|
||
|
|
DATA 4, MX6_MMDC_P0_MDCFG0, 0x2C305503
|
||
|
|
DATA 4, MX6_MMDC_P0_MDCFG1, 0xB66D8D63
|
||
|
|
DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB
|
||
|
|
DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2
|
||
|
|
DATA 4, MX6_MMDC_P0_MDOR, 0x00301023
|
||
|
|
DATA 4, MX6_MMDC_P0_MDOTC, 0x00333030
|
||
|
|
DATA 4, MX6_MMDC_P0_MDPDC, 0x0002556D
|
||
|
|
/* CS0 End: 7MSB of ((0x10000000 + 512M) -1) >> 25 */
|
||
|
|
DATA 4, MX6_MMDC_P0_MDASP, 0x00000017
|
||
|
|
/* DDR3 DATA BUS SIZE: 64BIT */
|
||
|
|
DATA 4, MX6_MMDC_P0_MDCTL, 0x821A0000
|
||
|
|
/* DDR3 DATA BUS SIZE: 32BIT */
|
||
|
|
/* DATA 4, MX6_MMDC_P0_MDCTL, 0x82190000 */
|
||
|
|
|
||
|
|
/* Write commands to DDR */
|
||
|
|
/* Load Mode Registers */
|
||
|
|
/* TODO Use Auto Self-Refresh mode (Extended Temperature)*/
|
||
|
|
/* DATA 4, MX6_MMDC_P0_MDSCR, 0x04408032 */
|
||
|
|
DATA 4, MX6_MMDC_P0_MDSCR, 0x04008032
|
||
|
|
DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033
|
||
|
|
DATA 4, MX6_MMDC_P0_MDSCR, 0x00048031
|
||
|
|
DATA 4, MX6_MMDC_P0_MDSCR, 0x13208030
|
||
|
|
/* ZQ calibration */
|
||
|
|
DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040
|
||
|
|
|
||
|
|
DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003
|
||
|
|
DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003
|
||
|
|
DATA 4, MX6_MMDC_P0_MDREF, 0x00005800
|
||
|
|
|
||
|
|
DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00000000
|
||
|
|
DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00000000
|
||
|
|
|
||
|
|
DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x42360232
|
||
|
|
DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x021F022A
|
||
|
|
DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x421E0224
|
||
|
|
DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x02110218
|
||
|
|
|
||
|
|
DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x41434344
|
||
|
|
DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x4345423E
|
||
|
|
DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x39383339
|
||
|
|
DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x3E363930
|
||
|
|
|
||
|
|
DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x00340039
|
||
|
|
DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x002C002D
|
||
|
|
DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x00120019
|
||
|
|
DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x0012002D
|
||
|
|
|
||
|
|
DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800
|
||
|
|
DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800
|
||
|
|
DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000
|
||
|
|
DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006
|