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@ -198,8 +198,8 @@ |
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#define GPSR6_0 FM(QSPI0_SPCLK) |
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/* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 - F */ |
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#define IP0_3_0 FM(IRQ0_A) FM(MSIOF2_SYNC_B) FM(USB0_IDIN) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) |
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#define IP0_7_4 FM(MSIOF2_SCK) F_(0, 0) FM(USB0_IDPU) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) |
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#define IP0_3_0 FM(IRQ0_A) FM(MSIOF2_SYNC_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) |
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#define IP0_7_4 FM(MSIOF2_SCK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) |
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#define IP0_11_8 FM(MSIOF2_TXD) FM(SCL3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) |
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#define IP0_15_12 FM(MSIOF2_RXD) FM(SDA3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) |
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#define IP0_19_16 FM(MLB_CLK) FM(MSIOF2_SYNC_A) FM(SCK5_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) |
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@ -518,14 +518,14 @@ static const u16 pinmux_data[] = { |
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PINMUX_SINGLE(QSPI0_MISO_IO1), |
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PINMUX_SINGLE(QSPI0_MOSI_IO0), |
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PINMUX_SINGLE(QSPI0_SPCLK), |
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PINMUX_SINGLE(SCL0), |
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PINMUX_SINGLE(SDA0), |
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/* IPSR0 */ |
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PINMUX_IPSR_MSEL(IP0_3_0, IRQ0_A, SEL_IRQ_0_0), |
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PINMUX_IPSR_MSEL(IP0_3_0, MSIOF2_SYNC_B, SEL_MSIOF2_1), |
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PINMUX_IPSR_GPSR(IP0_3_0, USB0_IDIN), |
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PINMUX_IPSR_GPSR(IP0_7_4, MSIOF2_SCK), |
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PINMUX_IPSR_GPSR(IP0_7_4, USB0_IDPU), |
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PINMUX_IPSR_GPSR(IP0_11_8, MSIOF2_TXD), |
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PINMUX_IPSR_MSEL(IP0_11_8, SCL3_A, SEL_I2C3_0), |
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@ -936,6 +936,265 @@ static const struct sh_pfc_pin pinmux_pins[] = { |
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PINMUX_GPIO_GP_ALL(), |
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}; |
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/* - AUDIO CLOCK ------------------------------------------------------------- */ |
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static const unsigned int audio_clk_a_pins[] = { |
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/* CLK A */ |
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RCAR_GP_PIN(4, 1), |
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}; |
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static const unsigned int audio_clk_a_mux[] = { |
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AUDIO_CLKA_MARK, |
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}; |
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static const unsigned int audio_clk_b_pins[] = { |
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/* CLK B */ |
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RCAR_GP_PIN(2, 27), |
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}; |
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static const unsigned int audio_clk_b_mux[] = { |
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AUDIO_CLKB_MARK, |
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}; |
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static const unsigned int audio_clkout_pins[] = { |
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/* CLKOUT */ |
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RCAR_GP_PIN(4, 5), |
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}; |
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static const unsigned int audio_clkout_mux[] = { |
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AUDIO_CLKOUT_MARK, |
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}; |
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static const unsigned int audio_clkout1_pins[] = { |
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/* CLKOUT1 */ |
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RCAR_GP_PIN(4, 22), |
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}; |
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static const unsigned int audio_clkout1_mux[] = { |
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AUDIO_CLKOUT1_MARK, |
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}; |
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/* - EtherAVB --------------------------------------------------------------- */ |
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static const unsigned int avb0_link_pins[] = { |
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/* AVB0_LINK */ |
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RCAR_GP_PIN(5, 20), |
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}; |
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static const unsigned int avb0_link_mux[] = { |
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AVB0_LINK_MARK, |
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}; |
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static const unsigned int avb0_magic_pins[] = { |
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/* AVB0_MAGIC */ |
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RCAR_GP_PIN(5, 18), |
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}; |
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static const unsigned int avb0_magic_mux[] = { |
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AVB0_MAGIC_MARK, |
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}; |
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static const unsigned int avb0_phy_int_pins[] = { |
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/* AVB0_PHY_INT */ |
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RCAR_GP_PIN(5, 19), |
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}; |
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static const unsigned int avb0_phy_int_mux[] = { |
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AVB0_PHY_INT_MARK, |
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}; |
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static const unsigned int avb0_mdio_pins[] = { |
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/* AVB0_MDC, AVB0_MDIO */ |
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RCAR_GP_PIN(5, 17), RCAR_GP_PIN(5, 16), |
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}; |
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static const unsigned int avb0_mdio_mux[] = { |
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AVB0_MDC_MARK, AVB0_MDIO_MARK, |
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}; |
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static const unsigned int avb0_mii_pins[] = { |
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/*
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* AVB0_TX_CTL, AVB0_TXC, AVB0_TD0, |
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* AVB0_TD1, AVB0_TD2, AVB0_TD3, |
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* AVB0_RX_CTL, AVB0_RXC, AVB0_RD0, |
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* AVB0_RD1, AVB0_RD2, AVB0_RD3, |
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* AVB0_TXCREFCLK |
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*/ |
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RCAR_GP_PIN(5, 9), RCAR_GP_PIN(5, 10), RCAR_GP_PIN(5, 11), |
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RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 14), |
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RCAR_GP_PIN(5, 3), RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 5), |
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RCAR_GP_PIN(5, 6), RCAR_GP_PIN(5, 7), RCAR_GP_PIN(5, 8), |
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RCAR_GP_PIN(5, 15), |
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}; |
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static const unsigned int avb0_mii_mux[] = { |
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AVB0_TX_CTL_MARK, AVB0_TXC_MARK, AVB0_TD0_MARK, |
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AVB0_TD1_MARK, AVB0_TD2_MARK, AVB0_TD3_MARK, |
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AVB0_RX_CTL_MARK, AVB0_RXC_MARK, AVB0_RD0_MARK, |
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AVB0_RD1_MARK, AVB0_RD2_MARK, AVB0_RD3_MARK, |
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AVB0_TXCREFCLK_MARK, |
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}; |
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static const unsigned int avb0_avtp_pps_a_pins[] = { |
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/* AVB0_AVTP_PPS_A */ |
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RCAR_GP_PIN(5, 2), |
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}; |
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static const unsigned int avb0_avtp_pps_a_mux[] = { |
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AVB0_AVTP_PPS_A_MARK, |
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}; |
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static const unsigned int avb0_avtp_match_a_pins[] = { |
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/* AVB0_AVTP_MATCH_A */ |
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RCAR_GP_PIN(5, 1), |
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}; |
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static const unsigned int avb0_avtp_match_a_mux[] = { |
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AVB0_AVTP_MATCH_A_MARK, |
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}; |
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static const unsigned int avb0_avtp_capture_a_pins[] = { |
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/* AVB0_AVTP_CAPTURE_A */ |
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RCAR_GP_PIN(5, 0), |
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}; |
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static const unsigned int avb0_avtp_capture_a_mux[] = { |
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AVB0_AVTP_CAPTURE_A_MARK, |
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}; |
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static const unsigned int avb0_avtp_pps_b_pins[] = { |
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/* AVB0_AVTP_PPS_B */ |
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RCAR_GP_PIN(4, 16), |
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}; |
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static const unsigned int avb0_avtp_pps_b_mux[] = { |
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AVB0_AVTP_PPS_B_MARK, |
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}; |
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static const unsigned int avb0_avtp_match_b_pins[] = { |
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/* AVB0_AVTP_MATCH_B */ |
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RCAR_GP_PIN(4, 18), |
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}; |
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static const unsigned int avb0_avtp_match_b_mux[] = { |
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AVB0_AVTP_MATCH_B_MARK, |
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}; |
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static const unsigned int avb0_avtp_capture_b_pins[] = { |
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/* AVB0_AVTP_CAPTURE_B */ |
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RCAR_GP_PIN(4, 17), |
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}; |
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static const unsigned int avb0_avtp_capture_b_mux[] = { |
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AVB0_AVTP_CAPTURE_B_MARK, |
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}; |
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/* - CAN ------------------------------------------------------------------ */ |
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static const unsigned int can0_data_a_pins[] = { |
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/* TX, RX */ |
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RCAR_GP_PIN(4, 28), RCAR_GP_PIN(4, 31), |
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}; |
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static const unsigned int can0_data_a_mux[] = { |
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CAN0_TX_A_MARK, CAN0_RX_A_MARK, |
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}; |
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static const unsigned int can0_data_b_pins[] = { |
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/* TX, RX */ |
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RCAR_GP_PIN(4, 22), RCAR_GP_PIN(4, 5), |
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}; |
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static const unsigned int can0_data_b_mux[] = { |
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CAN0_TX_B_MARK, CAN0_RX_B_MARK, |
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}; |
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static const unsigned int can1_data_a_pins[] = { |
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/* TX, RX */ |
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RCAR_GP_PIN(4, 30), RCAR_GP_PIN(4, 29), |
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}; |
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static const unsigned int can1_data_a_mux[] = { |
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CAN1_TX_A_MARK, CAN1_RX_A_MARK, |
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}; |
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static const unsigned int can1_data_b_pins[] = { |
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/* TX, RX */ |
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RCAR_GP_PIN(4, 7), RCAR_GP_PIN(4, 6), |
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}; |
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static const unsigned int can1_data_b_mux[] = { |
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CAN1_TX_B_MARK, CAN1_RX_B_MARK, |
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}; |
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/* - CAN Clock -------------------------------------------------------------- */ |
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static const unsigned int can_clk_pins[] = { |
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/* CLK */ |
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RCAR_GP_PIN(5, 2), |
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}; |
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static const unsigned int can_clk_mux[] = { |
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CAN_CLK_MARK, |
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}; |
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/* - CAN FD ----------------------------------------------------------------- */ |
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static const unsigned int canfd0_data_pins[] = { |
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/* TX, RX */ |
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RCAR_GP_PIN(4, 28), RCAR_GP_PIN(4, 31), |
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}; |
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static const unsigned int canfd0_data_mux[] = { |
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CANFD0_TX_MARK, CANFD0_RX_MARK, |
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}; |
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static const unsigned int canfd1_data_pins[] = { |
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/* TX, RX */ |
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RCAR_GP_PIN(4, 30), RCAR_GP_PIN(4, 29), |
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}; |
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static const unsigned int canfd1_data_mux[] = { |
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CANFD1_TX_MARK, CANFD1_RX_MARK, |
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}; |
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/* - DU --------------------------------------------------------------------- */ |
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static const unsigned int du_rgb666_pins[] = { |
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/* R[7:2], G[7:2], B[7:2] */ |
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RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 21), |
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RCAR_GP_PIN(1, 20), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18), |
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RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13), |
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RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 11), RCAR_GP_PIN(1, 10), |
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RCAR_GP_PIN(1, 7), RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 5), |
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RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 3), RCAR_GP_PIN(1, 2), |
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}; |
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static const unsigned int du_rgb666_mux[] = { |
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DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK, DU_DR4_MARK, |
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DU_DR3_MARK, DU_DR2_MARK, |
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DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK, DU_DG4_MARK, |
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DU_DG3_MARK, DU_DG2_MARK, |
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DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK, DU_DB4_MARK, |
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DU_DB3_MARK, DU_DB2_MARK, |
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}; |
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static const unsigned int du_rgb888_pins[] = { |
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/* R[7:0], G[7:0], B[7:0] */ |
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RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 21), |
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RCAR_GP_PIN(1, 20), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18), |
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RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 16), |
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RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13), |
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RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 11), RCAR_GP_PIN(1, 10), |
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RCAR_GP_PIN(1, 9), RCAR_GP_PIN(1, 8), |
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RCAR_GP_PIN(1, 7), RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 5), |
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RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 3), RCAR_GP_PIN(1, 2), |
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RCAR_GP_PIN(1, 1), RCAR_GP_PIN(1, 0), |
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}; |
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static const unsigned int du_rgb888_mux[] = { |
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DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK, DU_DR4_MARK, |
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DU_DR3_MARK, DU_DR2_MARK, DU_DR1_MARK, DU_DR0_MARK, |
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DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK, DU_DG4_MARK, |
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DU_DG3_MARK, DU_DG2_MARK, DU_DG1_MARK, DU_DG0_MARK, |
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DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK, DU_DB4_MARK, |
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DU_DB3_MARK, DU_DB2_MARK, DU_DB1_MARK, DU_DB0_MARK, |
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}; |
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static const unsigned int du_clk_in_1_pins[] = { |
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/* CLKIN */ |
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RCAR_GP_PIN(1, 28), |
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}; |
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static const unsigned int du_clk_in_1_mux[] = { |
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DU_DOTCLKIN1_MARK |
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}; |
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static const unsigned int du_clk_out_0_pins[] = { |
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/* CLKOUT */ |
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RCAR_GP_PIN(1, 24), |
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}; |
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static const unsigned int du_clk_out_0_mux[] = { |
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DU_DOTCLKOUT0_MARK |
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}; |
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static const unsigned int du_sync_pins[] = { |
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/* VSYNC, HSYNC */ |
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RCAR_GP_PIN(1, 26), RCAR_GP_PIN(1, 25), |
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}; |
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static const unsigned int du_sync_mux[] = { |
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DU_VSYNC_MARK, DU_HSYNC_MARK |
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}; |
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static const unsigned int du_disp_cde_pins[] = { |
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/* DISP_CDE */ |
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RCAR_GP_PIN(1, 28), |
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}; |
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static const unsigned int du_disp_cde_mux[] = { |
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DU_DISP_CDE_MARK, |
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}; |
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static const unsigned int du_cde_pins[] = { |
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/* CDE */ |
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RCAR_GP_PIN(1, 29), |
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}; |
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static const unsigned int du_cde_mux[] = { |
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DU_CDE_MARK, |
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}; |
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static const unsigned int du_disp_pins[] = { |
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/* DISP */ |
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RCAR_GP_PIN(1, 27), |
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}; |
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static const unsigned int du_disp_mux[] = { |
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DU_DISP_MARK, |
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}; |
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/* - I2C -------------------------------------------------------------------- */ |
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static const unsigned int i2c0_pins[] = { |
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/* SCL, SDA */ |
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@ -1018,6 +1277,118 @@ static const unsigned int mmc_ctrl_mux[] = { |
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MMC_CLK_MARK, MMC_CMD_MARK, |
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}; |
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/* - PWM0 ------------------------------------------------------------------ */ |
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static const unsigned int pwm0_a_pins[] = { |
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/* PWM */ |
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RCAR_GP_PIN(2, 1), |
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}; |
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static const unsigned int pwm0_a_mux[] = { |
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PWM0_A_MARK, |
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}; |
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static const unsigned int pwm0_b_pins[] = { |
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/* PWM */ |
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RCAR_GP_PIN(1, 18), |
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}; |
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static const unsigned int pwm0_b_mux[] = { |
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PWM0_B_MARK, |
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}; |
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static const unsigned int pwm0_c_pins[] = { |
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/* PWM */ |
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RCAR_GP_PIN(2, 29), |
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}; |
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static const unsigned int pwm0_c_mux[] = { |
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PWM0_C_MARK, |
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}; |
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/* - PWM1 ------------------------------------------------------------------ */ |
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static const unsigned int pwm1_a_pins[] = { |
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/* PWM */ |
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RCAR_GP_PIN(2, 2), |
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}; |
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static const unsigned int pwm1_a_mux[] = { |
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PWM1_A_MARK, |
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}; |
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static const unsigned int pwm1_b_pins[] = { |
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/* PWM */ |
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RCAR_GP_PIN(1, 19), |
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}; |
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static const unsigned int pwm1_b_mux[] = { |
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PWM1_B_MARK, |
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}; |
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static const unsigned int pwm1_c_pins[] = { |
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/* PWM */ |
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RCAR_GP_PIN(2, 30), |
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}; |
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static const unsigned int pwm1_c_mux[] = { |
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PWM1_C_MARK, |
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}; |
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/* - PWM2 ------------------------------------------------------------------ */ |
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static const unsigned int pwm2_a_pins[] = { |
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/* PWM */ |
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RCAR_GP_PIN(2, 3), |
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}; |
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static const unsigned int pwm2_a_mux[] = { |
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PWM2_A_MARK, |
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}; |
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static const unsigned int pwm2_b_pins[] = { |
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/* PWM */ |
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RCAR_GP_PIN(1, 22), |
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}; |
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static const unsigned int pwm2_b_mux[] = { |
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PWM2_B_MARK, |
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}; |
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static const unsigned int pwm2_c_pins[] = { |
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|
/* PWM */ |
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RCAR_GP_PIN(2, 31), |
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}; |
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static const unsigned int pwm2_c_mux[] = { |
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PWM2_C_MARK, |
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|
}; |
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/* - PWM3 ------------------------------------------------------------------ */ |
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|
static const unsigned int pwm3_a_pins[] = { |
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|
/* PWM */ |
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|
RCAR_GP_PIN(2, 4), |
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|
}; |
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static const unsigned int pwm3_a_mux[] = { |
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PWM3_A_MARK, |
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|
}; |
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|
static const unsigned int pwm3_b_pins[] = { |
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|
|
/* PWM */ |
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|
RCAR_GP_PIN(1, 27), |
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|
}; |
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|
static const unsigned int pwm3_b_mux[] = { |
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|
PWM3_B_MARK, |
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|
|
}; |
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|
|
static const unsigned int pwm3_c_pins[] = { |
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|
|
/* PWM */ |
|
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|
|
RCAR_GP_PIN(4, 0), |
|
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|
|
}; |
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|
|
static const unsigned int pwm3_c_mux[] = { |
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|
|
PWM3_C_MARK, |
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|
|
}; |
|
|
|
|
|
|
|
|
|
/* - SCIF0 ------------------------------------------------------------------ */ |
|
|
|
|
static const unsigned int scif0_data_a_pins[] = { |
|
|
|
|
/* RX, TX */ |
|
|
|
@ -1202,7 +1573,175 @@ static const unsigned int scif_clk_mux[] = { |
|
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|
|
SCIF_CLK_MARK, |
|
|
|
|
}; |
|
|
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|
|
|
|
|
|
/* - SSI ---------------------------------------------------------------*/ |
|
|
|
|
static const unsigned int ssi3_data_pins[] = { |
|
|
|
|
/* SDATA */ |
|
|
|
|
RCAR_GP_PIN(4, 3), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int ssi3_data_mux[] = { |
|
|
|
|
SSI_SDATA3_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int ssi34_ctrl_pins[] = { |
|
|
|
|
/* SCK, WS */ |
|
|
|
|
RCAR_GP_PIN(4, 2), RCAR_GP_PIN(4, 4), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int ssi34_ctrl_mux[] = { |
|
|
|
|
SSI_SCK34_MARK, SSI_WS34_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int ssi4_ctrl_a_pins[] = { |
|
|
|
|
/* SCK, WS */ |
|
|
|
|
RCAR_GP_PIN(4, 5), RCAR_GP_PIN(4, 7), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int ssi4_ctrl_a_mux[] = { |
|
|
|
|
SSI_SCK4_A_MARK, SSI_WS4_A_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int ssi4_data_a_pins[] = { |
|
|
|
|
/* SDATA */ |
|
|
|
|
RCAR_GP_PIN(4, 6), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int ssi4_data_a_mux[] = { |
|
|
|
|
SSI_SDATA4_A_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int ssi4_ctrl_b_pins[] = { |
|
|
|
|
/* SCK, WS */ |
|
|
|
|
RCAR_GP_PIN(2, 15), RCAR_GP_PIN(2, 20), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int ssi4_ctrl_b_mux[] = { |
|
|
|
|
SSI_SCK4_B_MARK, SSI_WS4_B_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int ssi4_data_b_pins[] = { |
|
|
|
|
/* SDATA */ |
|
|
|
|
RCAR_GP_PIN(2, 16), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int ssi4_data_b_mux[] = { |
|
|
|
|
SSI_SDATA4_B_MARK, |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
/* - USB0 ------------------------------------------------------------------- */ |
|
|
|
|
static const unsigned int usb0_pins[] = { |
|
|
|
|
/* PWEN, OVC */ |
|
|
|
|
RCAR_GP_PIN(0, 0), RCAR_GP_PIN(0, 1), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int usb0_mux[] = { |
|
|
|
|
USB0_PWEN_MARK, USB0_OVC_MARK, |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
/* - VIN4 ------------------------------------------------------------------- */ |
|
|
|
|
static const unsigned int vin4_data18_pins[] = { |
|
|
|
|
RCAR_GP_PIN(2, 3), RCAR_GP_PIN(2, 4), |
|
|
|
|
RCAR_GP_PIN(2, 5), RCAR_GP_PIN(2, 6), |
|
|
|
|
RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8), |
|
|
|
|
RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 12), |
|
|
|
|
RCAR_GP_PIN(2, 13), RCAR_GP_PIN(2, 14), |
|
|
|
|
RCAR_GP_PIN(2, 15), RCAR_GP_PIN(2, 16), |
|
|
|
|
RCAR_GP_PIN(2, 19), RCAR_GP_PIN(2, 20), |
|
|
|
|
RCAR_GP_PIN(2, 21), RCAR_GP_PIN(2, 22), |
|
|
|
|
RCAR_GP_PIN(2, 23), RCAR_GP_PIN(2, 24), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int vin4_data18_mux[] = { |
|
|
|
|
VI4_DATA2_MARK, VI4_DATA3_MARK, |
|
|
|
|
VI4_DATA4_MARK, VI4_DATA5_MARK, |
|
|
|
|
VI4_DATA6_MARK, VI4_DATA7_MARK, |
|
|
|
|
VI4_DATA10_MARK, VI4_DATA11_MARK, |
|
|
|
|
VI4_DATA12_MARK, VI4_DATA13_MARK, |
|
|
|
|
VI4_DATA14_MARK, VI4_DATA15_MARK, |
|
|
|
|
VI4_DATA18_MARK, VI4_DATA19_MARK, |
|
|
|
|
VI4_DATA20_MARK, VI4_DATA21_MARK, |
|
|
|
|
VI4_DATA22_MARK, VI4_DATA23_MARK, |
|
|
|
|
}; |
|
|
|
|
static const union vin_data vin4_data_pins = { |
|
|
|
|
.data24 = { |
|
|
|
|
RCAR_GP_PIN(2, 1), RCAR_GP_PIN(2, 2), |
|
|
|
|
RCAR_GP_PIN(2, 3), RCAR_GP_PIN(2, 4), |
|
|
|
|
RCAR_GP_PIN(2, 5), RCAR_GP_PIN(2, 6), |
|
|
|
|
RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8), |
|
|
|
|
RCAR_GP_PIN(2, 9), RCAR_GP_PIN(2, 10), |
|
|
|
|
RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 12), |
|
|
|
|
RCAR_GP_PIN(2, 13), RCAR_GP_PIN(2, 14), |
|
|
|
|
RCAR_GP_PIN(2, 15), RCAR_GP_PIN(2, 16), |
|
|
|
|
RCAR_GP_PIN(2, 17), RCAR_GP_PIN(2, 18), |
|
|
|
|
RCAR_GP_PIN(2, 19), RCAR_GP_PIN(2, 20), |
|
|
|
|
RCAR_GP_PIN(2, 21), RCAR_GP_PIN(2, 22), |
|
|
|
|
RCAR_GP_PIN(2, 23), RCAR_GP_PIN(2, 24), |
|
|
|
|
}, |
|
|
|
|
}; |
|
|
|
|
static const union vin_data vin4_data_mux = { |
|
|
|
|
.data24 = { |
|
|
|
|
VI4_DATA0_MARK, VI4_DATA1_MARK, |
|
|
|
|
VI4_DATA2_MARK, VI4_DATA3_MARK, |
|
|
|
|
VI4_DATA4_MARK, VI4_DATA5_MARK, |
|
|
|
|
VI4_DATA6_MARK, VI4_DATA7_MARK, |
|
|
|
|
VI4_DATA8_MARK, VI4_DATA9_MARK, |
|
|
|
|
VI4_DATA10_MARK, VI4_DATA11_MARK, |
|
|
|
|
VI4_DATA12_MARK, VI4_DATA13_MARK, |
|
|
|
|
VI4_DATA14_MARK, VI4_DATA15_MARK, |
|
|
|
|
VI4_DATA16_MARK, VI4_DATA17_MARK, |
|
|
|
|
VI4_DATA18_MARK, VI4_DATA19_MARK, |
|
|
|
|
VI4_DATA20_MARK, VI4_DATA21_MARK, |
|
|
|
|
VI4_DATA22_MARK, VI4_DATA23_MARK, |
|
|
|
|
}, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int vin4_sync_pins[] = { |
|
|
|
|
/* HSYNC#, VSYNC# */ |
|
|
|
|
RCAR_GP_PIN(2, 26), RCAR_GP_PIN(2, 25), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int vin4_sync_mux[] = { |
|
|
|
|
VI4_HSYNC_N_MARK, VI4_VSYNC_N_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int vin4_field_pins[] = { |
|
|
|
|
/* FIELD */ |
|
|
|
|
RCAR_GP_PIN(2, 27), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int vin4_field_mux[] = { |
|
|
|
|
VI4_FIELD_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int vin4_clkenb_pins[] = { |
|
|
|
|
/* CLKENB */ |
|
|
|
|
RCAR_GP_PIN(2, 28), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int vin4_clkenb_mux[] = { |
|
|
|
|
VI4_CLKENB_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int vin4_clk_pins[] = { |
|
|
|
|
/* CLK */ |
|
|
|
|
RCAR_GP_PIN(2, 0), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int vin4_clk_mux[] = { |
|
|
|
|
VI4_CLK_MARK, |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const struct sh_pfc_pin_group pinmux_groups[] = { |
|
|
|
|
SH_PFC_PIN_GROUP(audio_clk_a), |
|
|
|
|
SH_PFC_PIN_GROUP(audio_clk_b), |
|
|
|
|
SH_PFC_PIN_GROUP(audio_clkout), |
|
|
|
|
SH_PFC_PIN_GROUP(audio_clkout1), |
|
|
|
|
SH_PFC_PIN_GROUP(avb0_link), |
|
|
|
|
SH_PFC_PIN_GROUP(avb0_magic), |
|
|
|
|
SH_PFC_PIN_GROUP(avb0_phy_int), |
|
|
|
|
SH_PFC_PIN_GROUP_ALIAS(avb0_mdc, avb0_mdio), /* Deprecated */ |
|
|
|
|
SH_PFC_PIN_GROUP(avb0_mdio), |
|
|
|
|
SH_PFC_PIN_GROUP(avb0_mii), |
|
|
|
|
SH_PFC_PIN_GROUP(avb0_avtp_pps_a), |
|
|
|
|
SH_PFC_PIN_GROUP(avb0_avtp_match_a), |
|
|
|
|
SH_PFC_PIN_GROUP(avb0_avtp_capture_a), |
|
|
|
|
SH_PFC_PIN_GROUP(avb0_avtp_pps_b), |
|
|
|
|
SH_PFC_PIN_GROUP(avb0_avtp_match_b), |
|
|
|
|
SH_PFC_PIN_GROUP(avb0_avtp_capture_b), |
|
|
|
|
SH_PFC_PIN_GROUP(can0_data_a), |
|
|
|
|
SH_PFC_PIN_GROUP(can0_data_b), |
|
|
|
|
SH_PFC_PIN_GROUP(can1_data_a), |
|
|
|
|
SH_PFC_PIN_GROUP(can1_data_b), |
|
|
|
|
SH_PFC_PIN_GROUP(can_clk), |
|
|
|
|
SH_PFC_PIN_GROUP(canfd0_data), |
|
|
|
|
SH_PFC_PIN_GROUP(canfd1_data), |
|
|
|
|
SH_PFC_PIN_GROUP(du_rgb666), |
|
|
|
|
SH_PFC_PIN_GROUP(du_rgb888), |
|
|
|
|
SH_PFC_PIN_GROUP(du_clk_in_1), |
|
|
|
|
SH_PFC_PIN_GROUP(du_clk_out_0), |
|
|
|
|
SH_PFC_PIN_GROUP(du_sync), |
|
|
|
|
SH_PFC_PIN_GROUP(du_disp_cde), |
|
|
|
|
SH_PFC_PIN_GROUP(du_cde), |
|
|
|
|
SH_PFC_PIN_GROUP(du_disp), |
|
|
|
|
SH_PFC_PIN_GROUP(i2c0), |
|
|
|
|
SH_PFC_PIN_GROUP(i2c1), |
|
|
|
|
SH_PFC_PIN_GROUP(i2c2_a), |
|
|
|
@ -1213,6 +1752,18 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { |
|
|
|
|
SH_PFC_PIN_GROUP(mmc_data4), |
|
|
|
|
SH_PFC_PIN_GROUP(mmc_data8), |
|
|
|
|
SH_PFC_PIN_GROUP(mmc_ctrl), |
|
|
|
|
SH_PFC_PIN_GROUP(pwm0_a), |
|
|
|
|
SH_PFC_PIN_GROUP(pwm0_b), |
|
|
|
|
SH_PFC_PIN_GROUP(pwm0_c), |
|
|
|
|
SH_PFC_PIN_GROUP(pwm1_a), |
|
|
|
|
SH_PFC_PIN_GROUP(pwm1_b), |
|
|
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SH_PFC_PIN_GROUP(pwm1_c), |
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SH_PFC_PIN_GROUP(pwm2_a), |
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SH_PFC_PIN_GROUP(pwm2_b), |
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SH_PFC_PIN_GROUP(pwm2_c), |
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SH_PFC_PIN_GROUP(pwm3_a), |
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SH_PFC_PIN_GROUP(pwm3_b), |
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SH_PFC_PIN_GROUP(pwm3_c), |
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SH_PFC_PIN_GROUP(scif0_data_a), |
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SH_PFC_PIN_GROUP(scif0_clk_a), |
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SH_PFC_PIN_GROUP(scif0_data_b), |
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@ -1238,6 +1789,76 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { |
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SH_PFC_PIN_GROUP(scif5_data_b), |
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SH_PFC_PIN_GROUP(scif5_clk_b), |
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SH_PFC_PIN_GROUP(scif_clk), |
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SH_PFC_PIN_GROUP(ssi3_data), |
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SH_PFC_PIN_GROUP(ssi34_ctrl), |
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SH_PFC_PIN_GROUP(ssi4_ctrl_a), |
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SH_PFC_PIN_GROUP(ssi4_data_a), |
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SH_PFC_PIN_GROUP(ssi4_ctrl_b), |
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SH_PFC_PIN_GROUP(ssi4_data_b), |
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SH_PFC_PIN_GROUP(usb0), |
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VIN_DATA_PIN_GROUP(vin4_data, 8), |
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VIN_DATA_PIN_GROUP(vin4_data, 10), |
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VIN_DATA_PIN_GROUP(vin4_data, 12), |
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VIN_DATA_PIN_GROUP(vin4_data, 16), |
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SH_PFC_PIN_GROUP(vin4_data18), |
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VIN_DATA_PIN_GROUP(vin4_data, 20), |
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VIN_DATA_PIN_GROUP(vin4_data, 24), |
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SH_PFC_PIN_GROUP(vin4_sync), |
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SH_PFC_PIN_GROUP(vin4_field), |
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SH_PFC_PIN_GROUP(vin4_clkenb), |
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SH_PFC_PIN_GROUP(vin4_clk), |
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}; |
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static const char * const audio_clk_groups[] = { |
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"audio_clk_a", |
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"audio_clk_b", |
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"audio_clkout", |
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"audio_clkout1", |
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}; |
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static const char * const avb0_groups[] = { |
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"avb0_link", |
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"avb0_magic", |
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"avb0_phy_int", |
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"avb0_mdc", /* Deprecated, please use "avb0_mdio" instead */ |
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"avb0_mdio", |
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"avb0_mii", |
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"avb0_avtp_pps_a", |
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"avb0_avtp_match_a", |
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"avb0_avtp_capture_a", |
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"avb0_avtp_pps_b", |
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"avb0_avtp_match_b", |
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"avb0_avtp_capture_b", |
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}; |
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static const char * const can0_groups[] = { |
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"can0_data_a", |
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"can0_data_b", |
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}; |
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static const char * const can1_groups[] = { |
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"can1_data_a", |
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"can1_data_b", |
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}; |
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static const char * const can_clk_groups[] = { |
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"can_clk", |
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}; |
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static const char * const canfd0_groups[] = { |
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"canfd0_data", |
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}; |
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static const char * const canfd1_groups[] = { |
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"canfd1_data", |
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}; |
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static const char * const du_groups[] = { |
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"du_rgb666", |
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"du_rgb888", |
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"du_clk_in_1", |
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"du_clk_out_0", |
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"du_sync", |
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"du_disp_cde", |
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"du_cde", |
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"du_disp", |
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}; |
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static const char * const i2c0_groups[] = { |
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@ -1264,6 +1885,30 @@ static const char * const mmc_groups[] = { |
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"mmc_ctrl", |
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}; |
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static const char * const pwm0_groups[] = { |
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"pwm0_a", |
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"pwm0_b", |
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"pwm0_c", |
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}; |
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static const char * const pwm1_groups[] = { |
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"pwm1_a", |
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"pwm1_b", |
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"pwm1_c", |
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}; |
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static const char * const pwm2_groups[] = { |
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"pwm2_a", |
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"pwm2_b", |
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"pwm2_c", |
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}; |
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static const char * const pwm3_groups[] = { |
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"pwm3_a", |
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"pwm3_b", |
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"pwm3_c", |
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}; |
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static const char * const scif0_groups[] = { |
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"scif0_data_a", |
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"scif0_clk_a", |
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@ -1310,12 +1955,51 @@ static const char * const scif_clk_groups[] = { |
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"scif_clk", |
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}; |
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static const char * const ssi_groups[] = { |
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"ssi3_data", |
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"ssi34_ctrl", |
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"ssi4_ctrl_a", |
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"ssi4_data_a", |
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"ssi4_ctrl_b", |
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"ssi4_data_b", |
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}; |
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static const char * const usb0_groups[] = { |
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"usb0", |
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}; |
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static const char * const vin4_groups[] = { |
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"vin4_data8", |
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"vin4_data10", |
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"vin4_data12", |
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"vin4_data16", |
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"vin4_data18", |
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"vin4_data20", |
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"vin4_data24", |
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"vin4_sync", |
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"vin4_field", |
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"vin4_clkenb", |
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"vin4_clk", |
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}; |
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static const struct sh_pfc_function pinmux_functions[] = { |
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SH_PFC_FUNCTION(audio_clk), |
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SH_PFC_FUNCTION(avb0), |
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SH_PFC_FUNCTION(can0), |
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SH_PFC_FUNCTION(can1), |
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SH_PFC_FUNCTION(can_clk), |
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SH_PFC_FUNCTION(canfd0), |
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SH_PFC_FUNCTION(canfd1), |
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SH_PFC_FUNCTION(du), |
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SH_PFC_FUNCTION(i2c0), |
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SH_PFC_FUNCTION(i2c1), |
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SH_PFC_FUNCTION(i2c2), |
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SH_PFC_FUNCTION(i2c3), |
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SH_PFC_FUNCTION(mmc), |
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SH_PFC_FUNCTION(pwm0), |
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SH_PFC_FUNCTION(pwm1), |
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SH_PFC_FUNCTION(pwm2), |
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SH_PFC_FUNCTION(pwm3), |
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SH_PFC_FUNCTION(scif0), |
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SH_PFC_FUNCTION(scif1), |
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SH_PFC_FUNCTION(scif2), |
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@ -1323,6 +2007,9 @@ static const struct sh_pfc_function pinmux_functions[] = { |
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SH_PFC_FUNCTION(scif4), |
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SH_PFC_FUNCTION(scif5), |
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SH_PFC_FUNCTION(scif_clk), |
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SH_PFC_FUNCTION(ssi), |
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SH_PFC_FUNCTION(usb0), |
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SH_PFC_FUNCTION(vin4), |
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}; |
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static const struct pinmux_cfg_reg pinmux_config_regs[] = { |
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