parent
cfc67116a7
commit
1798049522
@ -1,56 +1,48 @@ |
||||
/*
|
||||
* (C) Copyright 2007 Michal Simek |
||||
* |
||||
* Michal SIMEK <monstr@monstr.eu> |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
/* DDR SDRAM */ |
||||
#define CONFIG_XILINX_ERAM_START 0x10000000 |
||||
#define CONFIG_XILINX_ERAM_SIZE 0x04000000 |
||||
|
||||
/* FLASH_MEMORY Settings */ |
||||
#define CONFIG_XILINX_FLASH_START 0x28000000 |
||||
#define CONFIG_XILINX_FLASH_SIZE 0x00800000 |
||||
|
||||
/* serial line */ |
||||
#define CONFIG_XILINX_UARTLITE_0_BASEADDR 0xA0000000 |
||||
#define CONFIG_XILINX_UARTLITE_0_BAUDRATE 115200 |
||||
|
||||
/* GPIO */ |
||||
#define CONFIG_XILINX_GPIO_0_BASEADDR 0x90000000 |
||||
|
||||
/* INTC */ |
||||
#define CONFIG_XILINX_INTC_0_BASEADDR 0xD1000FC0 |
||||
#define CONFIG_XILINX_INTC_0_NUM_INTR_INPUTS 12 |
||||
|
||||
/* TIMER */ |
||||
#define CONFIG_XILINX_TIMER_0_BASEADDR 0xA2000000 |
||||
#define CONFIG_XILINX_TIMER_0_IRQ 0 |
||||
|
||||
/* ethernet */ |
||||
#define XPAR_XEMAC_NUM_INSTANCES 1 |
||||
#define XPAR_OPB_ETHERNET_0_BASEADDR 0x60000000 |
||||
#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x60003FFF |
||||
#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0 |
||||
#define XPAR_EMAC_0_DEVICE_ID 0 |
||||
#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1 |
||||
#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1 |
||||
#define XPAR_OPB_ETHERNET_0_MII_EXIST 1 |
||||
/*********************************************************************
|
||||
# |
||||
# CAUTION: This file is automatically generated by libgen. |
||||
# Version: Xilinx EDK 6.3 EDK_Gmm.12.3 |
||||
# Description: U-BOOT Configuration File |
||||
# Michal Simek - monstr@monstr.eu |
||||
# |
||||
**********************************************************************/ |
||||
|
||||
/* System Clock Frequency */ |
||||
#define XILINX_CLOCK_FREQ 66666667 |
||||
|
||||
/* Interrupt controller is intc_0 */ |
||||
#define XILINX_INTC_BASEADDR 0xd1000fc0 |
||||
#define XILINX_INTC_NUM_INTR_INPUTS 12 |
||||
|
||||
/* Timer pheriphery is opb_timer_0 */ |
||||
#define XILINX_TIMER_BASEADDR 0xa2000000 |
||||
#define XILINX_TIMER_IRQ 0 |
||||
|
||||
/* Uart pheriphery is console_uart */ |
||||
#define XILINX_UART_BASEADDR 0xa0000000 |
||||
#define XILINX_UART_BAUDRATE 115200 |
||||
|
||||
/* GPIO is opb_gpio_0*/ |
||||
#define XILINX_GPIO_BASEADDR 0x90000000 |
||||
|
||||
/* Flash Memory is opb_emc_0 */ |
||||
#define XILINX_FLASH_START 0x28000000 |
||||
#define XILINX_FLASH_SIZE 0x00800000 |
||||
|
||||
/* Main Memory is plb_ddr_0 */ |
||||
#define XILINX_RAM_START 0x10000000 |
||||
#define XILINX_RAM_SIZE 0x10000000 |
||||
|
||||
/* Sysace Controller is opb_sysace_0 */ |
||||
#define XILINX_SYSACE_BASEADDR 0xCF000000 |
||||
#define XILINX_SYSACE_HIGHADDR 0xCF0001FF |
||||
#define XILINX_SYSACE_MEM_WIDTH 16 |
||||
|
||||
/* Ethernet controller is opb_ethernet_0 */ |
||||
#define XPAR_XEMAC_NUM_INSTANCES 1 |
||||
#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0 |
||||
#define XPAR_OPB_ETHERNET_0_BASEADDR 0x60000000 |
||||
#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x60003FFF |
||||
#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1 |
||||
#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1 |
||||
#define XPAR_OPB_ETHERNET_0_MII_EXIST 1 |
||||
|
@ -0,0 +1,65 @@ |
||||
#
|
||||
# (C) Copyright 2000-2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk |
||||
ifneq ($(OBJTREE),$(SRCTREE)) |
||||
$(shell mkdir -p $(obj)../common) |
||||
$(shell mkdir -p $(obj)../xilinx_enet) |
||||
endif |
||||
|
||||
INCS := -I../common -I../xilinx_enet
|
||||
CFLAGS += $(INCS)
|
||||
HOST_CFLAGS += $(INCS)
|
||||
|
||||
LIB = $(obj)lib$(BOARD).a
|
||||
|
||||
COBJS = $(BOARD).o \
|
||||
../xilinx_enet/emac_adapter.o ../xilinx_enet/xemac.o \
|
||||
../xilinx_enet/xemac_options.o ../xilinx_enet/xemac_polled.o \
|
||||
../xilinx_enet/xemac_intr.o ../xilinx_enet/xemac_g.o \
|
||||
../xilinx_enet/xemac_intr_dma.o ../common/xipif_v1_23_b.o \
|
||||
../common/xbasic_types.o ../common/xdma_channel.o \
|
||||
../common/xdma_channel_sg.o ../common/xpacket_fifo_v1_00_b.o \
|
||||
../common/xversion.o \
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS))
|
||||
SOBJS := $(addprefix $(obj),$(SOBJS))
|
||||
|
||||
$(LIB): $(OBJS) $(SOBJS) |
||||
$(AR) $(ARFLAGS) $@ $^
|
||||
|
||||
clean: |
||||
rm -f $(SOBJS) $(OBJS)
|
||||
|
||||
distclean: clean |
||||
rm -f $(LIB) core *.bak .depend
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk |
||||
|
||||
sinclude $(obj).depend |
||||
|
||||
#########################################################################
|
@ -0,0 +1,14 @@ |
||||
#*********************************************************************
|
||||
#
|
||||
# CAUTION: This file is automatically generated by libgen.
|
||||
# Version: Xilinx EDK 8.2.02 EDK_Im_Sp2.4
|
||||
# Description: U-BOOT Configuration File
|
||||
# Michal Simek - monstr@monstr.eu
|
||||
#
|
||||
#**********************************************************************
|
||||
|
||||
TEXT_BASE = 0x38000000
|
||||
|
||||
PLATFORM_CPPFLAGS += -mno-xl-soft-mul
|
||||
PLATFORM_CPPFLAGS += -mno-xl-soft-div
|
||||
PLATFORM_CPPFLAGS += -mxl-barrel-shift
|
@ -0,0 +1,67 @@ |
||||
/* |
||||
* (C) Copyright 2004 Atmark Techno, Inc. |
||||
* |
||||
* Yasushi SHOJI <yashi@atmark-techno.com> |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
OUTPUT_ARCH(microblaze) |
||||
ENTRY(_start) |
||||
|
||||
SECTIONS |
||||
{ |
||||
.text ALIGN(0x4): |
||||
{ |
||||
__text_start = .; |
||||
cpu/microblaze/start.o (.text) |
||||
*(.text) |
||||
__text_end = .; |
||||
} |
||||
|
||||
.rodata ALIGN(0x4): |
||||
{ |
||||
__rodata_start = .; |
||||
*(.rodata) |
||||
__rodata_end = .; |
||||
} |
||||
|
||||
.data ALIGN(0x4): |
||||
{ |
||||
__data_start = .; |
||||
*(.data) |
||||
__data_end = .; |
||||
} |
||||
|
||||
.u_boot_cmd ALIGN(0x4): |
||||
{ |
||||
. = .; |
||||
__u_boot_cmd_start = .; |
||||
*(.u_boot_cmd) |
||||
__u_boot_cmd_end = .; |
||||
} |
||||
|
||||
.bss ALIGN(0x4): |
||||
{ |
||||
__bss_start = .; |
||||
*(.bss) |
||||
__bss_end = .; |
||||
} |
||||
__end = . ; |
||||
} |
@ -0,0 +1,46 @@ |
||||
/*********************************************************************
|
||||
# |
||||
# CAUTION: This file is automatically generated by libgen. |
||||
# Version: Xilinx EDK 8.2.02 EDK_Im_Sp2.4 |
||||
# Description: U-BOOT Configuration File |
||||
# Michal Simek - monstr@monstr.eu |
||||
# |
||||
**********************************************************************/ |
||||
|
||||
/* System Clock Frequency */ |
||||
#define XILINX_CLOCK_FREQ 100000000 |
||||
|
||||
/* Interrupt controller is opb_intc_0 */ |
||||
#define XILINX_INTC_BASEADDR 0x41200000 |
||||
#define XILINX_INTC_NUM_INTR_INPUTS 11 |
||||
|
||||
/* Timer pheriphery is opb_timer_1 */ |
||||
#define XILINX_TIMER_BASEADDR 0x41c00000 |
||||
#define XILINX_TIMER_IRQ 1 |
||||
|
||||
/* Uart pheriphery is RS232_Uart_1 */ |
||||
#define XILINX_UART_BASEADDR 0x40600000 |
||||
#define XILINX_UART_BAUDRATE 115200 |
||||
|
||||
/* GPIO is LEDs_4Bit*/ |
||||
#define XILINX_GPIO_BASEADDR 0x40000000 |
||||
|
||||
/* FLASH doesn't exist none */ |
||||
|
||||
/* Main Memory is DDR_256MB_32MX64_rank1_row13_col10_cl2_5 */ |
||||
#define XILINX_RAM_START 0x30000000 |
||||
#define XILINX_RAM_SIZE 0x10000000 |
||||
|
||||
/* Sysace Controller is SysACE_CompactFlash */ |
||||
#define XILINX_SYSACE_BASEADDR 0x41800000 |
||||
#define XILINX_SYSACE_HIGHADDR 0x4180ffff |
||||
#define XILINX_SYSACE_MEM_WIDTH 16 |
||||
|
||||
/* Ethernet controller is Ethernet_MAC */ |
||||
#define XPAR_XEMAC_NUM_INSTANCES 1 |
||||
#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0 |
||||
#define XPAR_OPB_ETHERNET_0_BASEADDR 0x40c00000 |
||||
#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x40c0ffff |
||||
#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1 |
||||
#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1 |
||||
#define XPAR_OPB_ETHERNET_0_MII_EXIST 1 |
@ -0,0 +1,49 @@ |
||||
/*
|
||||
* (C) Copyright 2007 Michal Simek |
||||
* |
||||
* Michal SIMEK <monstr@monstr.eu> |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
/* This is a board specific file. It's OK to include board specific
|
||||
* header files */ |
||||
|
||||
#include <common.h> |
||||
#include <configs/ml401.h> |
||||
|
||||
void do_reset (void) |
||||
{ |
||||
#ifdef CFG_GPIO_0 |
||||
*((unsigned long *)(CFG_GPIO_0_ADDR)) = |
||||
++(*((unsigned long *)(CFG_GPIO_0_ADDR))); |
||||
#endif |
||||
#ifdef CFG_RESET_ADDRESS |
||||
puts ("Reseting board\n"); |
||||
asm ("bra r0"); |
||||
#endif |
||||
} |
||||
|
||||
int gpio_init (void) |
||||
{ |
||||
#ifdef CFG_GPIO_0 |
||||
*((unsigned long *)(CFG_GPIO_0_ADDR)) = 0x0; |
||||
#endif |
||||
return 0; |
||||
} |
@ -0,0 +1,174 @@ |
||||
/*
|
||||
* (C) Copyright 2007 Czech Technical University. |
||||
* |
||||
* Michal SIMEK <monstr@monstr.eu> |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#ifndef __CONFIG_H |
||||
#define __CONFIG_H |
||||
|
||||
#include "../board/xilinx/xupv2p/xparameters.h" |
||||
|
||||
#define CONFIG_MICROBLAZE 1 /* MicroBlaze CPU */ |
||||
#define CONFIG_XUPV2P 1 |
||||
|
||||
/* uart */ |
||||
#define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR |
||||
#define CONFIG_BAUDRATE XILINX_UART_BAUDRATE |
||||
#define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } |
||||
|
||||
/* ethernet */ |
||||
#define CONFIG_EMAC 1 |
||||
#define XPAR_EMAC_0_DEVICE_ID XPAR_XEMAC_NUM_INSTANCES |
||||
|
||||
/*
|
||||
* setting reset address |
||||
*
|
||||
* TEXT_BASE is set to place, where the U-BOOT run in RAM, but |
||||
* if you want to store U-BOOT in flash, set CFG_RESET_ADDRESS |
||||
* to FLASH memory and after loading bitstream jump to FLASH. |
||||
* U-BOOT auto-relocate to TEXT_BASE. After RESET command Microblaze |
||||
* jump to CFG_RESET_ADDRESS where is the original U-BOOT code. |
||||
*/ |
||||
#define CFG_RESET_ADDRESS 0x36000000 |
||||
|
||||
/* gpio */ |
||||
#define CFG_GPIO_0 1 |
||||
#define CFG_GPIO_0_ADDR XILINX_GPIO_BASEADDR |
||||
|
||||
/* interrupt controller */ |
||||
#define CFG_INTC_0 1 |
||||
#define CFG_INTC_0_ADDR XILINX_INTC_BASEADDR |
||||
#define CFG_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS |
||||
|
||||
/* timer */ |
||||
#define CFG_TIMER_0 1 |
||||
#define CFG_TIMER_0_ADDR XILINX_TIMER_BASEADDR |
||||
#define CFG_TIMER_0_IRQ XILINX_TIMER_IRQ |
||||
#define FREQUENCE XILINX_CLOCK_FREQ |
||||
#define CFG_TIMER_0_PRELOAD ( FREQUENCE/1000 ) |
||||
|
||||
/*
|
||||
* memory layout - Example |
||||
* TEXT_BASE = 0x3600_0000; |
||||
* CFG_SRAM_BASE = 0x3000_0000; |
||||
* CFG_SRAM_SIZE = 0x1000_0000; |
||||
* |
||||
* CFG_GBL_DATA_OFFSET = 0x3000_0000 + 0x1000_0000 - 0x1000 = 0x3FFF_F000 |
||||
* CFG_MONITOR_BASE = 0x3FFF_F000 - 0x40000 = 0x3FFB_F000 |
||||
* CFG_MALLOC_BASE = 0x3FFB_F000 - 0x40000 = 0x3FF7_F000 |
||||
* |
||||
* 0x3000_0000 CFG_SDRAM_BASE |
||||
* FREE |
||||
* 0x3600_0000 TEXT_BASE |
||||
* U-BOOT code |
||||
* 0x3602_0000 |
||||
* FREE |
||||
* |
||||
* STACK |
||||
* 0x3FF7_F000 CFG_MALLOC_BASE |
||||
* MALLOC_AREA 256kB Alloc |
||||
* 0x3FFB_F000 CFG_MONITOR_BASE |
||||
* MONITOR_CODE 256kB Env |
||||
* 0x3FFF_F000 CFG_GBL_DATA_OFFSET |
||||
* GLOBAL_DATA 4kB bd, gd |
||||
* 0x4000_0000 CFG_SDRAM_BASE + CFG_SDRAM_SIZE |
||||
*/ |
||||
|
||||
/* ddr sdram - main memory */ |
||||
#define CFG_SDRAM_BASE XILINX_RAM_START |
||||
#define CFG_SDRAM_SIZE XILINX_RAM_SIZE |
||||
#define CFG_MEMTEST_START CFG_SDRAM_BASE |
||||
#define CFG_MEMTEST_END (CFG_SDRAM_BASE + 0x1000) |
||||
|
||||
/* global pointer */ |
||||
#define CFG_GBL_DATA_SIZE 0x1000 /* size of global data */ |
||||
#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE) /* start of global data */ |
||||
|
||||
/* monitor code */ |
||||
#define SIZE 0x40000 |
||||
#define CFG_MONITOR_LEN SIZE |
||||
#define CFG_MONITOR_BASE (CFG_GBL_DATA_OFFSET - CFG_MONITOR_LEN) |
||||
#define CFG_MONITOR_END (CFG_MONITOR_BASE + CFG_MONITOR_LEN) |
||||
#define CFG_MALLOC_LEN SIZE |
||||
#define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN) |
||||
|
||||
/* stack */ |
||||
#define CFG_INIT_SP_OFFSET CFG_MALLOC_BASE |
||||
|
||||
#define CFG_NO_FLASH 1 |
||||
#define CFG_ENV_IS_NOWHERE 1 |
||||
#define CFG_ENV_SIZE 0x1000 |
||||
#define CFG_ENV_ADDR (CFG_MONITOR_BASE - CFG_ENV_SIZE) |
||||
#define CONFIG_COMMANDS (CONFIG__CMD_DFL |\ |
||||
CFG_CMD_MEMORY |\
|
||||
CFG_CMD_IRQ |\
|
||||
CFG_CMD_BDI |\
|
||||
CFG_CMD_NET |\
|
||||
CFG_CMD_IMI |\
|
||||
CFG_CMD_ECHO |\
|
||||
CFG_CMD_CACHE |\
|
||||
CFG_CMD_RUN |\
|
||||
CFG_CMD_AUTOSCRIPT |\
|
||||
CFG_CMD_ASKENV |\
|
||||
CFG_CMD_LOADS |\
|
||||
CFG_CMD_LOADB |\
|
||||
CFG_CMD_MISC |\
|
||||
CFG_CMD_PING \
|
||||
) |
||||
|
||||
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ |
||||
#include <cmd_confdefs.h> |
||||
|
||||
/* Miscellaneous configurable options */ |
||||
#define CFG_PROMPT "U-Boot-mONStR> " |
||||
#define CFG_CBSIZE 512 /* size of console buffer */ |
||||
#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) /* print buffer size */ |
||||
#define CFG_MAXARGS 15 /* max number of command args */ |
||||
#define CFG_LONGHELP |
||||
#define CFG_LOAD_ADDR 0x12000000 /* default load address */ |
||||
|
||||
#define CONFIG_BOOTDELAY 30 |
||||
#define CONFIG_BOOTARGS "root=romfs" |
||||
#define CONFIG_HOSTNAME "ml401" |
||||
#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" |
||||
#define CONFIG_IPADDR 192.168.0.3 |
||||
#define CONFIG_SERVERIP 192.168.0.5 |
||||
#define CONFIG_GATEWAYIP 192.168.0.1 |
||||
#define CONFIG_ETHADDR 00:E0:0C:00:00:FD |
||||
|
||||
/* architecture dependent code */ |
||||
#define CFG_USR_EXCEP /* user exception */ |
||||
#define CFG_HZ 1000 |
||||
|
||||
#define CONFIG_PREBOOT "echo U-BOOT by mONStR;" \ |
||||
"base 0;" \
|
||||
"echo" |
||||
|
||||
|
||||
/* system ace */ |
||||
/*#define CONFIG_SYSTEMACE
|
||||
#define DEBUG_SYSTEMACE |
||||
#define CFG_SYSTEMACE_BASE 0xCF000000 |
||||
#define CFG_SYSTEMACE_WIDTH 16 |
||||
#define CONFIG_DOS_PARTITION*/ |
||||
|
||||
#endif /* __CONFIG_H */ |
Loading…
Reference in new issue