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@ -1,56 +1,48 @@ |
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/*
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/*********************************************************************
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* (C) Copyright 2007 Michal Simek |
# |
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* |
# CAUTION: This file is automatically generated by libgen. |
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* Michal SIMEK <monstr@monstr.eu> |
# Version: Xilinx EDK 6.3 EDK_Gmm.12.3 |
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* |
# Description: U-BOOT Configuration File |
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* See file CREDITS for list of people who contributed to this |
# Michal Simek - monstr@monstr.eu |
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* project. |
# |
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* |
**********************************************************************/ |
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* This program is free software; you can redistribute it and/or |
|
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* modify it under the terms of the GNU General Public License as |
/* System Clock Frequency */ |
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* published by the Free Software Foundation; either version 2 of |
#define XILINX_CLOCK_FREQ 66666667 |
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* the License, or (at your option) any later version. |
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* |
/* Interrupt controller is intc_0 */ |
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* This program is distributed in the hope that it will be useful, |
#define XILINX_INTC_BASEADDR 0xd1000fc0 |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
#define XILINX_INTC_NUM_INTR_INPUTS 12 |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
/* Timer pheriphery is opb_timer_0 */ |
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* |
#define XILINX_TIMER_BASEADDR 0xa2000000 |
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* You should have received a copy of the GNU General Public License |
#define XILINX_TIMER_IRQ 0 |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
/* Uart pheriphery is console_uart */ |
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* MA 02111-1307 USA |
#define XILINX_UART_BASEADDR 0xa0000000 |
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*/ |
#define XILINX_UART_BAUDRATE 115200 |
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/* DDR SDRAM */ |
/* GPIO is opb_gpio_0*/ |
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#define CONFIG_XILINX_ERAM_START 0x10000000 |
#define XILINX_GPIO_BASEADDR 0x90000000 |
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#define CONFIG_XILINX_ERAM_SIZE 0x04000000 |
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/* Flash Memory is opb_emc_0 */ |
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/* FLASH_MEMORY Settings */ |
#define XILINX_FLASH_START 0x28000000 |
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#define CONFIG_XILINX_FLASH_START 0x28000000 |
#define XILINX_FLASH_SIZE 0x00800000 |
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#define CONFIG_XILINX_FLASH_SIZE 0x00800000 |
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/* Main Memory is plb_ddr_0 */ |
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/* serial line */ |
#define XILINX_RAM_START 0x10000000 |
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#define CONFIG_XILINX_UARTLITE_0_BASEADDR 0xA0000000 |
#define XILINX_RAM_SIZE 0x10000000 |
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#define CONFIG_XILINX_UARTLITE_0_BAUDRATE 115200 |
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/* Sysace Controller is opb_sysace_0 */ |
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/* GPIO */ |
#define XILINX_SYSACE_BASEADDR 0xCF000000 |
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#define CONFIG_XILINX_GPIO_0_BASEADDR 0x90000000 |
#define XILINX_SYSACE_HIGHADDR 0xCF0001FF |
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#define XILINX_SYSACE_MEM_WIDTH 16 |
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/* INTC */ |
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#define CONFIG_XILINX_INTC_0_BASEADDR 0xD1000FC0 |
/* Ethernet controller is opb_ethernet_0 */ |
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#define CONFIG_XILINX_INTC_0_NUM_INTR_INPUTS 12 |
#define XPAR_XEMAC_NUM_INSTANCES 1 |
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#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0 |
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/* TIMER */ |
#define XPAR_OPB_ETHERNET_0_BASEADDR 0x60000000 |
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#define CONFIG_XILINX_TIMER_0_BASEADDR 0xA2000000 |
#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x60003FFF |
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#define CONFIG_XILINX_TIMER_0_IRQ 0 |
#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1 |
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#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1 |
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/* ethernet */ |
#define XPAR_OPB_ETHERNET_0_MII_EXIST 1 |
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#define XPAR_XEMAC_NUM_INSTANCES 1 |
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#define XPAR_OPB_ETHERNET_0_BASEADDR 0x60000000 |
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#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x60003FFF |
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#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0 |
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#define XPAR_EMAC_0_DEVICE_ID 0 |
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#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1 |
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#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1 |
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#define XPAR_OPB_ETHERNET_0_MII_EXIST 1 |
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@ -0,0 +1,65 @@ |
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#
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# (C) Copyright 2000-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk |
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ifneq ($(OBJTREE),$(SRCTREE)) |
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$(shell mkdir -p $(obj)../common) |
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$(shell mkdir -p $(obj)../xilinx_enet) |
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endif |
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INCS := -I../common -I../xilinx_enet
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CFLAGS += $(INCS)
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HOST_CFLAGS += $(INCS)
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LIB = $(obj)lib$(BOARD).a
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COBJS = $(BOARD).o \
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../xilinx_enet/emac_adapter.o ../xilinx_enet/xemac.o \
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../xilinx_enet/xemac_options.o ../xilinx_enet/xemac_polled.o \
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../xilinx_enet/xemac_intr.o ../xilinx_enet/xemac_g.o \
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../xilinx_enet/xemac_intr_dma.o ../common/xipif_v1_23_b.o \
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../common/xbasic_types.o ../common/xdma_channel.o \
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../common/xdma_channel_sg.o ../common/xpacket_fifo_v1_00_b.o \
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../common/xversion.o \
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(OBJS) $(SOBJS) |
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$(AR) $(ARFLAGS) $@ $^
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clean: |
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rm -f $(SOBJS) $(OBJS)
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distclean: clean |
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rm -f $(LIB) core *.bak .depend
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk |
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sinclude $(obj).depend |
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#########################################################################
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@ -0,0 +1,14 @@ |
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#*********************************************************************
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#
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# CAUTION: This file is automatically generated by libgen.
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# Version: Xilinx EDK 8.2.02 EDK_Im_Sp2.4
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# Description: U-BOOT Configuration File
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# Michal Simek - monstr@monstr.eu
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#
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#**********************************************************************
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TEXT_BASE = 0x38000000
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PLATFORM_CPPFLAGS += -mno-xl-soft-mul
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PLATFORM_CPPFLAGS += -mno-xl-soft-div
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PLATFORM_CPPFLAGS += -mxl-barrel-shift
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@ -0,0 +1,67 @@ |
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/* |
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* (C) Copyright 2004 Atmark Techno, Inc. |
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* |
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* Yasushi SHOJI <yashi@atmark-techno.com> |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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OUTPUT_ARCH(microblaze) |
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ENTRY(_start) |
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SECTIONS |
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{ |
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.text ALIGN(0x4): |
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{ |
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__text_start = .; |
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cpu/microblaze/start.o (.text) |
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*(.text) |
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__text_end = .; |
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} |
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.rodata ALIGN(0x4): |
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{ |
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__rodata_start = .; |
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*(.rodata) |
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__rodata_end = .; |
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} |
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.data ALIGN(0x4): |
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{ |
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__data_start = .; |
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*(.data) |
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__data_end = .; |
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} |
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.u_boot_cmd ALIGN(0x4): |
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{ |
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. = .; |
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__u_boot_cmd_start = .; |
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*(.u_boot_cmd) |
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__u_boot_cmd_end = .; |
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} |
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.bss ALIGN(0x4): |
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{ |
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__bss_start = .; |
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*(.bss) |
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__bss_end = .; |
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} |
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__end = . ; |
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} |
@ -0,0 +1,46 @@ |
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/*********************************************************************
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# |
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# CAUTION: This file is automatically generated by libgen. |
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# Version: Xilinx EDK 8.2.02 EDK_Im_Sp2.4 |
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# Description: U-BOOT Configuration File |
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# Michal Simek - monstr@monstr.eu |
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# |
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**********************************************************************/ |
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/* System Clock Frequency */ |
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#define XILINX_CLOCK_FREQ 100000000 |
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/* Interrupt controller is opb_intc_0 */ |
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#define XILINX_INTC_BASEADDR 0x41200000 |
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#define XILINX_INTC_NUM_INTR_INPUTS 11 |
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/* Timer pheriphery is opb_timer_1 */ |
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#define XILINX_TIMER_BASEADDR 0x41c00000 |
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#define XILINX_TIMER_IRQ 1 |
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/* Uart pheriphery is RS232_Uart_1 */ |
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#define XILINX_UART_BASEADDR 0x40600000 |
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#define XILINX_UART_BAUDRATE 115200 |
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/* GPIO is LEDs_4Bit*/ |
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#define XILINX_GPIO_BASEADDR 0x40000000 |
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/* FLASH doesn't exist none */ |
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/* Main Memory is DDR_256MB_32MX64_rank1_row13_col10_cl2_5 */ |
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#define XILINX_RAM_START 0x30000000 |
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#define XILINX_RAM_SIZE 0x10000000 |
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/* Sysace Controller is SysACE_CompactFlash */ |
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#define XILINX_SYSACE_BASEADDR 0x41800000 |
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#define XILINX_SYSACE_HIGHADDR 0x4180ffff |
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#define XILINX_SYSACE_MEM_WIDTH 16 |
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/* Ethernet controller is Ethernet_MAC */ |
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#define XPAR_XEMAC_NUM_INSTANCES 1 |
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#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0 |
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#define XPAR_OPB_ETHERNET_0_BASEADDR 0x40c00000 |
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#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x40c0ffff |
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#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1 |
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#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1 |
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#define XPAR_OPB_ETHERNET_0_MII_EXIST 1 |
@ -0,0 +1,49 @@ |
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/*
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* (C) Copyright 2007 Michal Simek |
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* |
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* Michal SIMEK <monstr@monstr.eu> |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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/* This is a board specific file. It's OK to include board specific
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* header files */ |
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#include <common.h> |
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#include <configs/ml401.h> |
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void do_reset (void) |
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{ |
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#ifdef CFG_GPIO_0 |
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*((unsigned long *)(CFG_GPIO_0_ADDR)) = |
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++(*((unsigned long *)(CFG_GPIO_0_ADDR))); |
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#endif |
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#ifdef CFG_RESET_ADDRESS |
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puts ("Reseting board\n"); |
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asm ("bra r0"); |
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#endif |
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} |
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int gpio_init (void) |
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{ |
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#ifdef CFG_GPIO_0 |
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*((unsigned long *)(CFG_GPIO_0_ADDR)) = 0x0; |
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#endif |
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return 0; |
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} |
@ -0,0 +1,174 @@ |
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/*
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* (C) Copyright 2007 Czech Technical University. |
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* |
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* Michal SIMEK <monstr@monstr.eu> |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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|
* |
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* You should have received a copy of the GNU General Public License |
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|
* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#ifndef __CONFIG_H |
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#define __CONFIG_H |
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#include "../board/xilinx/xupv2p/xparameters.h" |
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#define CONFIG_MICROBLAZE 1 /* MicroBlaze CPU */ |
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#define CONFIG_XUPV2P 1 |
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/* uart */ |
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#define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR |
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#define CONFIG_BAUDRATE XILINX_UART_BAUDRATE |
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#define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } |
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/* ethernet */ |
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#define CONFIG_EMAC 1 |
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#define XPAR_EMAC_0_DEVICE_ID XPAR_XEMAC_NUM_INSTANCES |
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/*
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* setting reset address |
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*
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* TEXT_BASE is set to place, where the U-BOOT run in RAM, but |
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* if you want to store U-BOOT in flash, set CFG_RESET_ADDRESS |
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* to FLASH memory and after loading bitstream jump to FLASH. |
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* U-BOOT auto-relocate to TEXT_BASE. After RESET command Microblaze |
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* jump to CFG_RESET_ADDRESS where is the original U-BOOT code. |
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*/ |
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#define CFG_RESET_ADDRESS 0x36000000 |
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/* gpio */ |
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#define CFG_GPIO_0 1 |
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#define CFG_GPIO_0_ADDR XILINX_GPIO_BASEADDR |
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/* interrupt controller */ |
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#define CFG_INTC_0 1 |
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#define CFG_INTC_0_ADDR XILINX_INTC_BASEADDR |
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#define CFG_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS |
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/* timer */ |
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#define CFG_TIMER_0 1 |
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#define CFG_TIMER_0_ADDR XILINX_TIMER_BASEADDR |
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#define CFG_TIMER_0_IRQ XILINX_TIMER_IRQ |
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#define FREQUENCE XILINX_CLOCK_FREQ |
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#define CFG_TIMER_0_PRELOAD ( FREQUENCE/1000 ) |
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/*
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* memory layout - Example |
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* TEXT_BASE = 0x3600_0000; |
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* CFG_SRAM_BASE = 0x3000_0000; |
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* CFG_SRAM_SIZE = 0x1000_0000; |
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* |
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* CFG_GBL_DATA_OFFSET = 0x3000_0000 + 0x1000_0000 - 0x1000 = 0x3FFF_F000 |
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|
* CFG_MONITOR_BASE = 0x3FFF_F000 - 0x40000 = 0x3FFB_F000 |
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* CFG_MALLOC_BASE = 0x3FFB_F000 - 0x40000 = 0x3FF7_F000 |
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* |
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|
* 0x3000_0000 CFG_SDRAM_BASE |
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* FREE |
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|
* 0x3600_0000 TEXT_BASE |
||||||
|
* U-BOOT code |
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|
* 0x3602_0000 |
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|
* FREE |
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|
* |
||||||
|
* STACK |
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|
* 0x3FF7_F000 CFG_MALLOC_BASE |
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|
* MALLOC_AREA 256kB Alloc |
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|
* 0x3FFB_F000 CFG_MONITOR_BASE |
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|
* MONITOR_CODE 256kB Env |
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|
* 0x3FFF_F000 CFG_GBL_DATA_OFFSET |
||||||
|
* GLOBAL_DATA 4kB bd, gd |
||||||
|
* 0x4000_0000 CFG_SDRAM_BASE + CFG_SDRAM_SIZE |
||||||
|
*/ |
||||||
|
|
||||||
|
/* ddr sdram - main memory */ |
||||||
|
#define CFG_SDRAM_BASE XILINX_RAM_START |
||||||
|
#define CFG_SDRAM_SIZE XILINX_RAM_SIZE |
||||||
|
#define CFG_MEMTEST_START CFG_SDRAM_BASE |
||||||
|
#define CFG_MEMTEST_END (CFG_SDRAM_BASE + 0x1000) |
||||||
|
|
||||||
|
/* global pointer */ |
||||||
|
#define CFG_GBL_DATA_SIZE 0x1000 /* size of global data */ |
||||||
|
#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE) /* start of global data */ |
||||||
|
|
||||||
|
/* monitor code */ |
||||||
|
#define SIZE 0x40000 |
||||||
|
#define CFG_MONITOR_LEN SIZE |
||||||
|
#define CFG_MONITOR_BASE (CFG_GBL_DATA_OFFSET - CFG_MONITOR_LEN) |
||||||
|
#define CFG_MONITOR_END (CFG_MONITOR_BASE + CFG_MONITOR_LEN) |
||||||
|
#define CFG_MALLOC_LEN SIZE |
||||||
|
#define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN) |
||||||
|
|
||||||
|
/* stack */ |
||||||
|
#define CFG_INIT_SP_OFFSET CFG_MALLOC_BASE |
||||||
|
|
||||||
|
#define CFG_NO_FLASH 1 |
||||||
|
#define CFG_ENV_IS_NOWHERE 1 |
||||||
|
#define CFG_ENV_SIZE 0x1000 |
||||||
|
#define CFG_ENV_ADDR (CFG_MONITOR_BASE - CFG_ENV_SIZE) |
||||||
|
#define CONFIG_COMMANDS (CONFIG__CMD_DFL |\ |
||||||
|
CFG_CMD_MEMORY |\
|
||||||
|
CFG_CMD_IRQ |\
|
||||||
|
CFG_CMD_BDI |\
|
||||||
|
CFG_CMD_NET |\
|
||||||
|
CFG_CMD_IMI |\
|
||||||
|
CFG_CMD_ECHO |\
|
||||||
|
CFG_CMD_CACHE |\
|
||||||
|
CFG_CMD_RUN |\
|
||||||
|
CFG_CMD_AUTOSCRIPT |\
|
||||||
|
CFG_CMD_ASKENV |\
|
||||||
|
CFG_CMD_LOADS |\
|
||||||
|
CFG_CMD_LOADB |\
|
||||||
|
CFG_CMD_MISC |\
|
||||||
|
CFG_CMD_PING \
|
||||||
|
) |
||||||
|
|
||||||
|
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ |
||||||
|
#include <cmd_confdefs.h> |
||||||
|
|
||||||
|
/* Miscellaneous configurable options */ |
||||||
|
#define CFG_PROMPT "U-Boot-mONStR> " |
||||||
|
#define CFG_CBSIZE 512 /* size of console buffer */ |
||||||
|
#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) /* print buffer size */ |
||||||
|
#define CFG_MAXARGS 15 /* max number of command args */ |
||||||
|
#define CFG_LONGHELP |
||||||
|
#define CFG_LOAD_ADDR 0x12000000 /* default load address */ |
||||||
|
|
||||||
|
#define CONFIG_BOOTDELAY 30 |
||||||
|
#define CONFIG_BOOTARGS "root=romfs" |
||||||
|
#define CONFIG_HOSTNAME "ml401" |
||||||
|
#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" |
||||||
|
#define CONFIG_IPADDR 192.168.0.3 |
||||||
|
#define CONFIG_SERVERIP 192.168.0.5 |
||||||
|
#define CONFIG_GATEWAYIP 192.168.0.1 |
||||||
|
#define CONFIG_ETHADDR 00:E0:0C:00:00:FD |
||||||
|
|
||||||
|
/* architecture dependent code */ |
||||||
|
#define CFG_USR_EXCEP /* user exception */ |
||||||
|
#define CFG_HZ 1000 |
||||||
|
|
||||||
|
#define CONFIG_PREBOOT "echo U-BOOT by mONStR;" \ |
||||||
|
"base 0;" \
|
||||||
|
"echo" |
||||||
|
|
||||||
|
|
||||||
|
/* system ace */ |
||||||
|
/*#define CONFIG_SYSTEMACE
|
||||||
|
#define DEBUG_SYSTEMACE |
||||||
|
#define CFG_SYSTEMACE_BASE 0xCF000000 |
||||||
|
#define CFG_SYSTEMACE_WIDTH 16 |
||||||
|
#define CONFIG_DOS_PARTITION*/ |
||||||
|
|
||||||
|
#endif /* __CONFIG_H */ |
Loading…
Reference in new issue