Coding Style cleanup; update CHANGELOG

Signed-off-by: Wolfgang Denk <wd@denx.de>

board/MigoR/config.mk

@@ -29,4 +29,3 @@
 #
 
 TEXT_BASE = 0x8FFC0000
-

board/MigoR/lowlevel_init.S

@@ -42,7 +42,6 @@
 	.align	2
 
 lowlevel_init:
-
 	mov.l	CCR_A, r1	! Address of Cache Control Register
 	mov.l	CCR_D, r0	! Instruction Cache Invalidate
 	mov.l	r0, @r1
@@ -100,7 +99,6 @@ lowlevel_init:
 	mov.l	r0, @r1
 
 bsc_init:
-
 	mov.l	CMNCR_A, r1	! CMNCR address -> R1
 	mov.l 	CMNCR_D, r0	! CMNCR data    -> R0
 	mov.l	r0, @r1		! CMNCR set
@@ -188,8 +186,6 @@ bsc_init:
 	rts
 	mov	#0, r0
 
-
-
 	.align	4
 
 CCR_A:		.long	CCR
@@ -266,4 +262,3 @@ PSCR_D:		.word	0x0000
 RWTCSR_D_1:	.word	0xA507
 RWTCSR_D_2:	.word	0xA504		! 20080115
 RWTCNT_D:	.word	0x5A00
-

board/MigoR/migo_r.c

@@ -51,4 +51,3 @@ int dram_init (void)
 void led_set_state (unsigned short value)
 {
 }
-

board/MigoR/u-boot.lds

@@ -103,4 +103,3 @@ SECTIONS
 
 	PROVIDE (_end = .);
 }
-

board/mpr2/mpr2.c

@@ -159,4 +159,3 @@ int dram_init(void)
 	printf("SDRAM: %dMB\n", CFG_SDRAM_SIZE / (1024 * 1024));
 	return 0;
 }
-

cpu/mcf52x2/speed.c

@@ -69,9 +69,11 @@ int get_clocks (void)
 
 	/* Setup PLL */
 	pll->syncr = 0x01080000;
-        while (!(pll->synsr & FMPLL_SYNSR_LOCK));
+	while (!(pll->synsr & FMPLL_SYNSR_LOCK)
+		;
 	pll->syncr = 0x01000000;
-        while (!(pll->synsr & FMPLL_SYNSR_LOCK));
+	while (!(pll->synsr & FMPLL_SYNSR_LOCK))
+		;
 #endif
 
 	gd->cpu_clk = CFG_CLK;

drivers/net/e1000.c

@@ -2494,22 +2494,21 @@ e1000_phy_reset(struct e1000_hw *hw)
 	return 0;
 }
 
-static int
-e1000_set_phy_type(struct e1000_hw *hw)
+static int e1000_set_phy_type (struct e1000_hw *hw)
 {
-    DEBUGFUNC();
+	DEBUGFUNC ();
 
-    if(hw->mac_type == e1000_undefined)
+	if (hw->mac_type == e1000_undefined)
 		return -E1000_ERR_PHY_TYPE;
 
-    switch(hw->phy_id) {
+	switch (hw->phy_id) {
 	case M88E1000_E_PHY_ID:
 	case M88E1000_I_PHY_ID:
 	case M88E1011_I_PHY_ID:
 		hw->phy_type = e1000_phy_m88;
 		break;
 	case IGP01E1000_I_PHY_ID:
-        if(hw->mac_type == e1000_82541 ||
+		if (hw->mac_type == e1000_82541 ||
 		    hw->mac_type == e1000_82541_rev_2) {
 			hw->phy_type = e1000_phy_igp;
 			break;

include/ambapp.h

@@ -41,7 +41,7 @@
 /* Max devices this software will support */
 #define LEON3_AHB_MASTERS 16
 #define LEON3_AHB_SLAVES 16
-				/*#define LEON3_APB_MASTERS 1*//* Number of APB buses that has Plug&Play */
+/*#define LEON3_APB_MASTERS 1*/ /* Number of APB buses that has Plug&Play */
 #define LEON3_APB_SLAVES 16	/* Total number of APB slaves per APB bus */
 
 /* Vendor codes */

include/asm-ppc/immap_85xx.h

@@ -57,7 +57,7 @@ typedef struct ccsr_local_ecm {
 	uint	lawbar7;	/* 0xce8 - Local Access Window 7 Base Address Register */
 	char	res19[4];
 	uint	lawar7;		/* 0xcf0 - Local Access Window 7 Attributes Register */
-	char	res20[780];		// XXX: LAW 8, LAW9 for 8572
+	char	res20[780];	/* XXX: LAW 8, LAW9 for 8572 */
 	uint	eebacr;		/* 0x1000 - ECM CCB Address Configuration Register */
 	char	res21[12];
 	uint	eebpcr;		/* 0x1010 - ECM CCB Port Configuration Register */

include/asm-ppc/processor.h

@@ -478,7 +478,6 @@
 #define SPRN_MSSSR0	0x3f7
 #endif
 
-
 /* Short-hand versions for a number of the above SPRNs */
 
 #define CTR	SPRN_CTR	/* Counter Register */
@@ -737,7 +736,6 @@
 #define SVR_MJREV(svr)	(((svr) >>  4) & 0x0F)	 /* Major SOC design revision indicator */
 #define SVR_MNREV(svr)	(((svr) >>  0) & 0x0F)	 /* Minor SOC design revision indicator */
 
-
 /* Processor Version Register */
 
 /* Processor Version Register (PVR) field extraction */
@@ -861,7 +859,6 @@
 #define PVR_5200	0x80822011
 #define PVR_5200B	0x80822014
 
-
 /*
  * System Version Register
  */
@@ -882,7 +879,6 @@
 /* Some parts define SVR[0:23] as the SOC version */
 #define SVR_SOC_VER(svr) (((svr) >> 8) & 0xFFFFFF)	/* SOC Version fields */
 
-
 /*
  * SVR_SOC_VER() Version Values
  */
@@ -915,8 +911,6 @@
 #define SVR_8641	0x809000
 #define SVR_8641D	0x809001
 
-
-
 /* I am just adding a single entry for 8260 boards.  I think we may be
  * able to combine mbx, fads, rpxlite, bseip, and classic into a single
  * generic 8xx as well.  The boards containing these processors are either
@@ -944,7 +938,6 @@
 #define _MACH_tqm8xxL	0x00010000	/* TQM8xxL */
 #define _MACH_hidden_dragon 0x00020000	/* Motorola Hidden Dragon eval board */
 
-
 /* see residual.h for these */
 #define _PREP_Motorola 0x01  /* motorola prep */
 #define _PREP_Firm     0x02  /* firmworks prep */

include/asm-sh/cache.h

@@ -7,27 +7,25 @@
 struct __large_struct { unsigned long buf[100]; };
 #define __m(x) (*(struct __large_struct *)(x))
 
-void dcache_wback_range(u32 start, u32 end)
+void dcache_wback_range (u32 start, u32 end)
 {
 	u32 v;
 
-    start &= ~(L1_CACHE_BYTES-1);
-    for (v = start; v < end; v+=L1_CACHE_BYTES) {
-        asm volatile("ocbwb     %0"
-                     : /* no output */
-                     : "m" (__m(v)));
+	start &= ~(L1_CACHE_BYTES - 1);
+	for (v = start; v < end; v += L1_CACHE_BYTES) {
+		asm volatile ("ocbwb     %0":	/* no output */
+			      :"m" (__m (v)));
 	}
 }
 
-void dcache_invalid_range(u32 start, u32 end)
+void dcache_invalid_range (u32 start, u32 end)
 {
 	u32 v;
 
-    start &= ~(L1_CACHE_BYTES-1);
-    for (v = start; v < end; v+=L1_CACHE_BYTES) {
-        asm volatile("ocbi     %0"
-                     : /* no output */
-                     : "m" (__m(v)));
+	start &= ~(L1_CACHE_BYTES - 1);
+	for (v = start; v < end; v += L1_CACHE_BYTES) {
+		asm volatile ("ocbi     %0":	/* no output */
+			      :"m" (__m (v)));
 	}
 }
 #endif /* CONFIG_SH4 || CONFIG_SH4A */

include/asm-sparc/leon3.h

@@ -33,5 +33,4 @@
  * ctrl, memory controllers etc.
  */
 
-
 #endif

include/pci_ids.h

@@ -2073,4 +2073,3 @@
 #define PCI_DEVICE_ID_MPC8641		0x7010
 #define PCI_DEVICE_ID_MPC8641D		0x7011
 #define PCI_DEVICE_ID_MPC8610		0x7018
-