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@ -49,21 +49,21 @@ int timer_init (void) |
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{ |
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{ |
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/* Divide clock by TMU_CLK_DIVIDER */ |
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/* Divide clock by TMU_CLK_DIVIDER */ |
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u16 bit = 0; |
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u16 bit = 0; |
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switch( TMU_CLK_DIVIDER ){ |
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case 4: |
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switch (TMU_CLK_DIVIDER) { |
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bit = 0; |
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case 1024: |
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break; |
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bit = 4; |
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case 16: |
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bit = 1; |
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break; |
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case 64: bit = 2; |
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break; |
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break; |
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case 256: |
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case 256: |
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bit = 3; |
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bit = 3; |
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break; |
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break; |
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case 1024: |
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case 64: |
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bit = 4; |
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bit = 2; |
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break; |
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break; |
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case 16: |
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bit = 1; |
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break; |
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case 4: |
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default: |
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default: |
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bit = 0; |
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bit = 0; |
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break; |
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break; |
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@ -71,7 +71,7 @@ int timer_init (void) |
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writew(readw(TCR0) | bit, TCR0); |
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writew(readw(TCR0) | bit, TCR0); |
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/* Clock adjustment calc */ |
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/* Clock adjustment calc */ |
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clk_adj = (int)(1.0/((1.0/CONFIG_SYS_HZ)*1000000)); |
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clk_adj = (int)(1.0 / ((1.0 / CONFIG_SYS_HZ) * 1000000)); |
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if (clk_adj < 1) |
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if (clk_adj < 1) |
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clk_adj = 1; |
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clk_adj = 1; |
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@ -102,8 +102,8 @@ void udelay (unsigned long usec) |
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unsigned long get_timer (unsigned long base) |
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unsigned long get_timer (unsigned long base) |
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{ |
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{ |
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/* return msec */ |
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/* return msec */ |
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return ((get_usec()/clk_adj)/1000) - base; |
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return ((get_usec() / clk_adj) / 1000) - base; |
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} |
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} |
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void set_timer (unsigned long t) |
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void set_timer (unsigned long t) |
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