@ -42,7 +42,7 @@ int hold_cores_in_reset(int verbose)
return 0 ;
return 0 ;
}
}
int cpu_reset ( int nr )
int cpu_reset ( u32 nr )
{
{
volatile ccsr_pic_t * pic = ( void * ) ( CONFIG_SYS_MPC8xxx_PIC_ADDR ) ;
volatile ccsr_pic_t * pic = ( void * ) ( CONFIG_SYS_MPC8xxx_PIC_ADDR ) ;
out_be32 ( & pic - > pir , 1 < < nr ) ;
out_be32 ( & pic - > pir , 1 < < nr ) ;
@ -53,7 +53,7 @@ int cpu_reset(int nr)
return 0 ;
return 0 ;
}
}
int cpu_status ( int nr )
int cpu_status ( u32 nr )
{
{
u32 * table , id = get_my_id ( ) ;
u32 * table , id = get_my_id ( ) ;
@ -79,7 +79,7 @@ int cpu_status(int nr)
}
}
# ifdef CONFIG_FSL_CORENET
# ifdef CONFIG_FSL_CORENET
int cpu_disable ( int nr )
int cpu_disable ( u32 nr )
{
{
volatile ccsr_gur_t * gur = ( void * ) ( CONFIG_SYS_MPC85xx_GUTS_ADDR ) ;
volatile ccsr_gur_t * gur = ( void * ) ( CONFIG_SYS_MPC85xx_GUTS_ADDR ) ;
@ -95,7 +95,7 @@ int is_core_disabled(int nr) {
return ( coredisrl & ( 1 < < nr ) ) ;
return ( coredisrl & ( 1 < < nr ) ) ;
}
}
# else
# else
int cpu_disable ( int nr )
int cpu_disable ( u32 nr )
{
{
volatile ccsr_gur_t * gur = ( void * ) ( CONFIG_SYS_MPC85xx_GUTS_ADDR ) ;
volatile ccsr_gur_t * gur = ( void * ) ( CONFIG_SYS_MPC85xx_GUTS_ADDR ) ;
@ -137,7 +137,7 @@ static u8 boot_entry_map[4] = {
BOOT_ENTRY_R3_LOWER ,
BOOT_ENTRY_R3_LOWER ,
} ;
} ;
int cpu_release ( int nr , int argc , char * const argv [ ] )
int cpu_release ( u32 nr , int argc , char * const argv [ ] )
{
{
u32 i , val , * table = ( u32 * ) & __spin_table + nr * NUM_BOOT_ENTRY ;
u32 i , val , * table = ( u32 * ) & __spin_table + nr * NUM_BOOT_ENTRY ;
u64 boot_addr ;
u64 boot_addr ;