arch/powperpc: Fix start_align due to use of __ffs64() instead ffs64()

Incorrect DDR law was created in case of B4860qds after commit
2d2f490d. Return value of ffs64() differs from __ffs64(), eg.
    ffs64(0x80000000) = 0x20
    __ffs64(0x80000000) = 0x1f
As a result of this change, callers need to adjust the expected
return value by removing -1.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

arch/powerpc/cpu/mpc83xx/law.c

@@ -19,7 +19,7 @@ int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)
 	if (start == 0)
 		start_align = 1ull << (LAW_SIZE_2G + 1);
 	else
-		start_align = 1ull << (__ffs64(start) - 1);
+		start_align = 1ull << (__ffs64(start));
 	law_sz = min(start_align, sz);
 	law_sz_enc = __ilog2_u64(law_sz) - 1;
 
@@ -39,7 +39,7 @@ int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)
 	if (sz) {
 		start += law_sz;
 
-		start_align = 1ull << (__ffs64(start) - 1);
+		start_align = 1ull << (__ffs64(start));
 		law_sz = min(start_align, sz);
 		law_sz_enc = __ilog2_u64(law_sz) - 1;
 		ecm = &immap->sysconf.ddrlaw[1];

arch/powerpc/cpu/mpc8xxx/law.c

@@ -188,7 +188,7 @@ int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)
 	if (start == 0)
 		start_align = 1ull << (LAW_SIZE_32G + 1);
 	else
-		start_align = 1ull << (__ffs64(start) - 1);
+		start_align = 1ull << (__ffs64(start));
 	law_sz = min(start_align, sz);
 	law_sz_enc = __ilog2_u64(law_sz) - 1;
 
@@ -203,7 +203,7 @@ int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)
 	if (sz) {
 		start += law_sz;
 
-		start_align = 1ull << (__ffs64(start) - 1);
+		start_align = 1ull << (__ffs64(start));
 		law_sz = min(start_align, sz);
 		law_sz_enc = __ilog2_u64(law_sz) - 1;