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@ -82,11 +82,11 @@ struct mvebu_pcie { |
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/*
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/*
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* MVEBU PCIe controller needs MEMORY and I/O BARs to be mapped |
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* MVEBU PCIe controller needs MEMORY and I/O BARs to be mapped |
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* into SoCs address space. Each controller will map 32M of MEM |
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* into SoCs address space. Each controller will map 128M of MEM |
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* and 64K of I/O space when registered. |
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* and 64K of I/O space when registered. |
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*/ |
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*/ |
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static void __iomem *mvebu_pcie_membase = (void __iomem *)MBUS_PCI_MEM_BASE; |
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static void __iomem *mvebu_pcie_membase = (void __iomem *)MBUS_PCI_MEM_BASE; |
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#define PCIE_MEM_SIZE (32 << 20) |
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#define PCIE_MEM_SIZE (128 << 20) |
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#if defined(CONFIG_ARMADA_38X) |
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#if defined(CONFIG_ARMADA_38X) |
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#define PCIE_BASE(if) \ |
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#define PCIE_BASE(if) \ |
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