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Merge branch 'master' of /home/wd/git/u-boot/lwmon5

Browse Source 
Conflicts:

	common/cmd_bootm.c
	common/cmd_log.c
	include/common.h
	post/board/lwmon5/Makefile
	post/board/lwmon5/dsp.c
	post/board/lwmon5/dspic.c
	post/board/lwmon5/fpga.c
	post/board/lwmon5/gdc.c
	post/board/lwmon5/sysmon.c
	post/board/lwmon5/watchdog.c

Signed-off-by: Wolfgang Denk <wd@denx.de>
master
Wolfgang Denk 17 years ago
parent 926662762e a6e6fc610e
commit 4b7a6dd896
71 changed files with 153 additions and 273 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
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  1. 10
      Makefile
  2. 18
      board/lwmon5/lwmon5.c
  3. 7
      common/cmd_mem.c
  4. 3
      include/asm-ppc/global_data.h
  5. 4
      include/common.h
  6. 10
      include/configs/lwmon5.h
  7. 47
      post/Makefile
  8. 3
      post/board/lwmon/sysmon.c
  9. 3
      post/board/lwmon5/Makefile
  10. 4
      post/board/lwmon5/dsp.c
  11. 33
      post/board/lwmon5/dspic.c
  12. 3
      post/board/lwmon5/fpga.c
  13. 3
      post/board/lwmon5/gdc.c
  14. 44
      post/board/lwmon5/sysmon.c
  15. 47
      post/board/lwmon5/watchdog.c
  16. 3
      post/board/netta/codec.c
  17. 3
      post/board/netta/dsp.c
  18. 3
      post/cpu/mpc8xx/cache.c
  19. 2
      post/cpu/mpc8xx/cache_8xx.S
  20. 4
      post/cpu/mpc8xx/ether.c
  21. 3
      post/cpu/mpc8xx/spr.c
  22. 4
      post/cpu/mpc8xx/uart.c
  23. 4
      post/cpu/mpc8xx/usb.c
  24. 3
      post/cpu/mpc8xx/watchdog.c
  25. 5
      post/cpu/ppc4xx/Makefile
  26. 3
      post/cpu/ppc4xx/cache.c
  27. 3
      post/cpu/ppc4xx/cache_4xx.S
  28. 4
      post/cpu/ppc4xx/denali_ecc.c
  29. 3
      post/cpu/ppc4xx/ether.c
  30. 2
      post/cpu/ppc4xx/fpu.c
  31. 3
      post/cpu/ppc4xx/spr.c
  32. 3
      post/cpu/ppc4xx/uart.c
  33. 3
      post/cpu/ppc4xx/watchdog.c
  34. 6
      post/drivers/Makefile
  35. 3
      post/drivers/i2c.c
  36. 3
      post/drivers/memory.c
  37. 3
      post/drivers/rtc.c
  38. 11
      post/lib_ppc/Makefile
  39. 3
      post/lib_ppc/andi.c
  40. 3
      post/lib_ppc/asm.S
  41. 3
      post/lib_ppc/b.c
  42. 3
      post/lib_ppc/cmp.c
  43. 3
      post/lib_ppc/cmpi.c
  44. 3
      post/lib_ppc/complex.c
  45. 3
      post/lib_ppc/cpu.c
  46. 3
      post/lib_ppc/cr.c
  47. 3
      post/lib_ppc/fpu/20001122-1.c
  48. 3
      post/lib_ppc/fpu/20010114-2.c
  49. 3
      post/lib_ppc/fpu/20010226-1.c
  50. 3
      post/lib_ppc/fpu/980619-1.c
  51. 6
      post/lib_ppc/fpu/Makefile
  52. 3
      post/lib_ppc/fpu/acc1.c
  53. 3
      post/lib_ppc/fpu/compare-fp-1.c
  54. 3
      post/lib_ppc/fpu/fpu.c
  55. 3
      post/lib_ppc/fpu/mul-subnormal-single-1.c
  56. 3
      post/lib_ppc/load.c
  57. 3
      post/lib_ppc/multi.c
  58. 3
      post/lib_ppc/rlwimi.c
  59. 3
      post/lib_ppc/rlwinm.c
  60. 3
      post/lib_ppc/rlwnm.c
  61. 3
      post/lib_ppc/srawi.c
  62. 3
      post/lib_ppc/store.c
  63. 3
      post/lib_ppc/string.c
  64. 3
      post/lib_ppc/three.c
  65. 3
      post/lib_ppc/threei.c
  66. 3
      post/lib_ppc/threex.c
  67. 3
      post/lib_ppc/two.c
  68. 3
      post/lib_ppc/twox.c
  69. 4
      post/post.c
  70. 2
      post/rules.mk
  71. 4
      post/tests.c

10
Makefile
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@ -240,18 +240,10 @@ LIBS += drivers/rtc/librtc.a
LIBS += drivers/serial/libserial.a
LIBS += drivers/usb/libusb.a
LIBS += drivers/video/libvideo.a
LIBS += post/libpost.a post/drivers/libpostdrivers.a
LIBS += $(shell if [ -d post/lib_$(ARCH) ]; then echo \
"post/lib_$(ARCH)/libpost$(ARCH).a"; fi)
LIBS += $(shell if [ -d post/lib_$(ARCH)/fpu ]; then echo \
"post/lib_$(ARCH)/fpu/libpost$(ARCH)fpu.a"; fi)
LIBS += $(shell if [ -d post/cpu/$(CPU) ]; then echo \
"post/cpu/$(CPU)/libpost$(CPU).a"; fi)
LIBS += $(shell if [ -d post/board/$(BOARDDIR) ]; then echo \
"post/board/$(BOARDDIR)/libpost$(BOARD).a"; fi)
LIBS += common/libcommon.a
LIBS += libfdt/libfdt.a
LIBS += api/libapi.a
LIBS += post/libpost.a
LIBS := $(addprefix $(obj),$(LIBS))
.PHONY : $(LIBS) $(VERSION_FILE)

18
board/lwmon5/lwmon5.c
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@ -476,6 +476,24 @@ int is_pci_host(struct pci_controller *hose)
void hw_watchdog_reset(void)
{
int val;
#if defined(CONFIG_WD_MAX_RATE)
unsigned long long ct = get_ticks();
/*
* Don't allow watch-dog triggering more frequently than
* the predefined value CONFIG_WD_MAX_RATE [ticks].
*/
if (ct >= gd->wdt_last) {
if ((ct - gd->wdt_last) < CONFIG_WD_MAX_RATE)
return;
} else {
/* Time base counter had been reset */
if (((unsigned long long)(-1) - gd->wdt_last + ct) <
CONFIG_WD_MAX_RATE)
return;
}
gd->wdt_last = get_ticks();
#endif
/*
* Toggle watchdog output

7
common/cmd_mem.c
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@ -35,6 +35,7 @@
#ifdef CONFIG_HAS_DATAFLASH
#include <dataflash.h>
#endif
#include <watchdog.h>
#if defined(CONFIG_CMD_MEMORY) \
|| defined(CONFIG_CMD_I2C) \
@ -872,6 +873,7 @@ int do_mem_mtest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
}
}
start[test_offset] = pattern;
WATCHDOG_RESET();
/*
* Check for addr bits stuck low or shorted.
@ -909,6 +911,7 @@ int do_mem_mtest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
* Fill memory with a known pattern.
*/
for (pattern = 1, offset = 0; offset < num_words; pattern++, offset++) {
WATCHDOG_RESET();
start[offset] = pattern;
}
@ -916,6 +919,7 @@ int do_mem_mtest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
* Check each location and invert it for the second pass.
*/
for (pattern = 1, offset = 0; offset < num_words; pattern++, offset++) {
WATCHDOG_RESET();
temp = start[offset];
if (temp != pattern) {
printf ("\nFAILURE (read/write) @ 0x%.8lx:"
@ -932,6 +936,7 @@ int do_mem_mtest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
* Check each location for the inverted pattern and zero it.
*/
for (pattern = 1, offset = 0; offset < num_words; pattern++, offset++) {
WATCHDOG_RESET();
anti_pattern = ~pattern;
temp = start[offset];
if (temp != anti_pattern) {
@ -958,6 +963,7 @@ int do_mem_mtest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
pattern, "");
for (addr=start,val=pattern; addr<end; addr++) {
WATCHDOG_RESET();
*addr = val;
val += incr;
}
@ -965,6 +971,7 @@ int do_mem_mtest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
puts ("Reading...");
for (addr=start,val=pattern; addr<end; addr++) {
WATCHDOG_RESET();
readback = *addr;
if (readback != val) {
printf ("\nMem error @ 0x%08X: "

3
include/asm-ppc/global_data.h
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@ -155,6 +155,9 @@ typedef struct global_data {
#if defined(CONFIG_LWMON) || defined(CONFIG_LWMON5)
unsigned long kbd_status;
#endif
#if defined(CONFIG_WD_MAX_RATE)
unsigned long long wdt_last; /* trace watch-dog triggering rate */
#endif
void **jt; /* jump table */
} gd_t;

4
include/common.h
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@ -681,4 +681,8 @@ int cpu_reset(int nr);
int cpu_release(int nr, int argc, char *argv[]);
#endif
#ifdef CONFIG_POST
#define CONFIG_HAS_POST
#endif
#endif /* __COMMON_H_ */

10
include/configs/lwmon5.h
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@ -98,6 +98,15 @@
#define CFG_WATCHDOG_MAGIC_MASK 0xFFFF0000
#define CFG_DSPIC_TEST_MASK 0x00000001
/* Additional registers for watchdog timer post test */
#define CFG_DSPIC_TEST_ADDR (CFG_PERIPHERAL_BASE + GPT0_COMP5)
#define CFG_WATCHDOG_TIME_ADDR (CFG_PERIPHERAL_BASE + GPT0_COMP4)
#define CFG_WATCHDOG_FLAGS_ADDR (CFG_PERIPHERAL_BASE + GPT0_COMP5)
#define CFG_WATCHDOG_MAGIC 0x12480000
#define CFG_WATCHDOG_MAGIC_MASK 0xFFFF0000
#define CFG_DSPIC_TEST_MASK 0x00000001
/*-----------------------------------------------------------------------
* Serial Port
*----------------------------------------------------------------------*/
@ -452,6 +461,7 @@
#define CONFIG_HW_WATCHDOG 1 /* Use external HW-Watchdog */
#define CONFIG_WD_PERIOD 40000 /* in usec */
#define CONFIG_WD_MAX_RATE 66600 /* in ticks */
/*
* For booting Linux, the board info and command line data

47
post/Makefile
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@ -21,11 +21,50 @@
# MA 02111-1307 USA
#
include $(TOPDIR)/include/autoconf.mk
SUBDIRS = drivers cpu lib_$(ARCH) board/$(BOARDDIR)
LIB = libpost.a
GPLIB-$(CONFIG_HAS_POST) += libgenpost.a
COBJS-$(CONFIG_HAS_POST) += post.o tests.o
LIB = libpost.a
SPLIB-$(CONFIG_HAS_POST) = drivers/libpostdrivers.a
SPLIB-$(CONFIG_HAS_POST) += $(shell if [ -d lib_$(ARCH) ]; then echo \
"lib_$(ARCH)/libpost$(ARCH).a"; fi)
SPLIB-$(CONFIG_HAS_POST) += $(shell if [ -d lib_$(ARCH)/fpu ]; then echo \
"lib_$(ARCH)/fpu/libpost$(ARCH)fpu.a"; fi)
SPLIB-$(CONFIG_HAS_POST) += $(shell if [ -d cpu/$(CPU) ]; then echo \
"cpu/$(CPU)/libpost$(CPU).a"; fi)
SPLIB-$(CONFIG_HAS_POST) += $(shell if [ -d board/$(BOARD) ]; then echo \
"board/$(BOARD)/libpost$(BOARD).a"; fi)
COBJS = post.o tests.o
GPLIB := $(GPLIB-y)
SPLIB := $(SPLIB-y)
COBJS := $(COBJS-y)
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
LIB := $(obj)$(LIB)
include $(TOPDIR)/post/rules.mk
all: $(LIB)
# generic POST library
$(GPLIB): $(obj).depend $(OBJS)
$(AR) $(ARFLAGS) $@ $(OBJS)
# specific POST libraries
$(SPLIB): $(obj).depend
$(MAKE) -C $(dir $(subst $(obj),,$@))
# the POST lib archive
$(LIB): $(GPLIB) $(SPLIB)
(echo create $(LIB); for lib in $(GPLIB) $(SPLIB) ; \
do echo addlib $$lib; done; echo save) \
| $(AR) -M
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

3
post/board/lwmon/sysmon.c
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@ -24,8 +24,6 @@
#include <post.h>
#include <common.h>
#ifdef CONFIG_POST
/*
* SYSMON test
*
@ -328,4 +326,3 @@ int sysmon_post_test (int flags)
}
#endif /* CONFIG_POST & CFG_POST_SYSMON */
#endif /* CONFIG_POST */

3
post/board/lwmon5/Makefile
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@ -20,9 +20,10 @@
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
include $(TOPDIR)/include/autoconf.mk
LIB = libpostlwmon5.a
COBJS = sysmon.o watchdog.o dspic.o fpga.o dsp.o gdc.o
COBJS-$(CONFIG_HAS_POST) += sysmon.o watchdog.o dspic.o fpga.o dsp.o gdc.o
include $(TOPDIR)/post/rules.mk

4
post/board/lwmon5/dsp.c
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@ -24,11 +24,8 @@
#include <common.h>
#ifdef CONFIG_POST
#include <post.h>
#if CONFIG_POST & CFG_POST_DSP
#include <asm/io.h>
@ -54,4 +51,3 @@ int dsp_post_test(int flags)
}
#endif /* CONFIG_POST & CFG_POST_DSP */
#endif /* CONFIG_POST */

33
post/board/lwmon5/dspic.c
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@ -24,8 +24,6 @@
#include <common.h>
#ifdef CONFIG_POST
/* There are two tests for dsPIC currently implemented:
* 1. dsPIC ready test. Done in board_early_init_f(). Only result verified here.
* 2. dsPIC POST result test. This test gets dsPIC POST codes and version.
@ -59,27 +57,25 @@ int dspic_init_post_test(int flags)
#if CONFIG_POST & CFG_POST_BSPEC2
/* Read a register from the dsPIC. */
int dspic_read(ushort reg, ushort *data)
int dspic_read(ushort reg)
{
uchar buf[sizeof(*data)];
int rval;
rval = i2c_read(CFG_I2C_DSPIC_IO_ADDR, reg, sizeof(reg),
buf, sizeof(*data));
uchar buf[2];
*data = (buf[0] << 8) | buf[1];
if (i2c_read(CFG_I2C_DSPIC_IO_ADDR, reg, 2, buf, 2))
return -1;
return rval;
return (uint)((buf[0] << 8) | buf[1]);
}
/* Verify error codes regs, display version */
int dspic_post_test(int flags)
{
ushort data;
int data;
int ret = 0;
post_log("\n");
if (dspic_read(DSPIC_VERSION_REG, &data)) {
data = dspic_read(DSPIC_VERSION_REG);
if (data == -1) {
post_log("dsPIC : failed read version\n");
ret = 1;
} else {
@ -87,24 +83,23 @@ int dspic_post_test(int flags)
(data >> 8) & 0xFF, data & 0xFF);
}
if (dspic_read(DSPIC_POST_ERROR_REG, &data)) {
data = dspic_read(DSPIC_POST_ERROR_REG);
if (data != 0) ret = 1;
if (data == -1) {
post_log("dsPIC : failed read POST code\n");
} else {
post_log("dsPIC POST code 0x%04X\n", data);
}
if (data != 0)
ret = 1;
if (dspic_read(DSPIC_SYS_ERROR_REG, &data)) {
data = dspic_read(DSPIC_SYS_ERROR_REG);
if (data == -1) {
post_log("dsPIC : failed read system error\n");
ret = 1;
} else if (data != 0) {
} else {
post_log("dsPIC SYS-ERROR code: 0x%04X\n", data);
ret = 1;
}
return ret;
}
#endif /* CONFIG_POST & CFG_POST_BSPEC2 */
#endif /* CONFIG_POST */

3
post/board/lwmon5/fpga.c
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@ -23,8 +23,6 @@
*/
#include <common.h>
#ifdef CONFIG_POST
/* This test performs testing of FPGA SCRATCH register,
* gets FPGA version and run get_ram_size() on FPGA memory
*/
@ -94,4 +92,3 @@ int fpga_post_test(int flags)
}
#endif /* CONFIG_POST & CFG_POST_BSPEC3 */
#endif /* CONFIG_POST */

3
post/board/lwmon5/gdc.c
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@ -23,8 +23,6 @@
*/
#include <common.h>
#ifdef CONFIG_POST
/* This test attempts to verify board GDC. A scratch register tested, then
* simple memory test (get_ram_size()) run over GDC memory.
*/
@ -96,4 +94,3 @@ int gdc_post_test(int flags)
return ret;
}
#endif /* CONFIG_POST & CFG_POST_BSPEC4 */
#endif /* CONFIG_POST */

44
post/board/lwmon5/sysmon.c
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@ -25,8 +25,6 @@
#include <post.h>
#include <common.h>
#ifdef CONFIG_POST
/*
* SYSMON test
*
@ -34,9 +32,9 @@
* The test passes when all the following voltages and temperatures
* are within allowed ranges:
*
* Temperature -40 .. +85 C
* +5V +4.75 .. +5.25 V
* +5V standby +4.75 .. +5.25 V
* Temperature -40 .. +85 C
* +5V +4.75 .. +5.25 V
* +5V standby +4.75 .. +5.25 V
*
* LCD backlight is not enabled if temperature values are not within
* allowed ranges (-30 .. + 80). The brightness of backlite can be
@ -58,7 +56,7 @@
DECLARE_GLOBAL_DATA_PTR;
/* from dspic.c */
extern int dspic_read(ushort reg, ushort *data);
extern int dspic_read(ushort reg);
#define RELOC(x) if (x != NULL) x = (void *) ((ulong) (x) + gd->reloc_off)
@ -67,7 +65,6 @@ typedef struct sysmon_table_s sysmon_table_t;
static void sysmon_dspic_init (sysmon_t * this);
static int sysmon_dspic_read (sysmon_t * this, uint addr);
static int sysmon_dspic_read_sgn (sysmon_t * this, uint addr);
static void sysmon_backlight_disable (sysmon_table_t * this);
struct sysmon_s
@ -80,13 +77,9 @@ struct sysmon_s
static sysmon_t sysmon_dspic =
{CFG_I2C_DSPIC_IO_ADDR, sysmon_dspic_init, sysmon_dspic_read};
static sysmon_t sysmon_dspic_sgn =
{CFG_I2C_DSPIC_IO_ADDR, sysmon_dspic_init, sysmon_dspic_read_sgn};
static sysmon_t * sysmon_list[] =
{
&sysmon_dspic,
&sysmon_dspic_sgn,
NULL
};
@ -114,17 +107,17 @@ struct sysmon_table_s
static sysmon_table_t sysmon_table[] =
{
{"Temperature", " C", &sysmon_dspic_sgn, NULL, sysmon_backlight_disable,
{"Temperature", " C", &sysmon_dspic, NULL, sysmon_backlight_disable,
1, 1, -32768, 32767, 0xFFFF, 0x8000-40, 0x8000+85, 0,
0x8000-30, 0x8000+80, 0, 0x12BC},
0x8000-30, 0x8000+80, 0, 0x12BC},
{"+ 5 V", "V", &sysmon_dspic, NULL, NULL,
100, 1000, 0, 0xFFFF, 0xFFFF, 4750, 5250, 0,
4750, 5250, 0, 0x12CA},
100, 1000, -0x8000, 0x7FFF, 0xFFFF, 0x8000+4750, 0x8000+5250, 0,
0x8000+4750, 0x8000+5250, 0, 0x12CA},
{"+ 5 V standby", "V", &sysmon_dspic, NULL, NULL,
100, 1000, 0, 0xFFFF, 0xFFFF, 4750, 5250, 0,
4750, 5250, 0, 0x12C6},
100, 1000, -0x8000, 0x7FFF, 0xFFFF, 0x8000+4750, 0x8000+5250, 0,
0x8000+4750, 0x8000+5250, 0, 0x12C6},
};
static int sysmon_table_size = sizeof(sysmon_table) / sizeof(sysmon_table[0]);
@ -161,7 +154,9 @@ static char *sysmon_unit_value (sysmon_table_t *s, uint val)
static char buf[32];
char *p, sign;
int decimal, frac;
int unit_val =
int unit_val;
unit_val =
s->unit_min + (s->unit_max - s->unit_min) * val / s->val_mask;
if (val == -1)
@ -197,18 +192,10 @@ static void sysmon_dspic_init (sysmon_t * this)
static int sysmon_dspic_read (sysmon_t * this, uint addr)
{
ushort data;
return (dspic_read(addr, &data)) ? -1 : data;
}
static int sysmon_dspic_read_sgn (sysmon_t * this, uint addr)
{
ushort data;
int res = dspic_read(addr);
/* To fit into the table range we should add 0x8000 */
return (dspic_read(addr, &data)) ? -1 :
(signed short)data + 0x8000;
return (res == -1) ? -1 : (res + 0x8000);
}
static void sysmon_backlight_disable (sysmon_table_t * this)
@ -256,4 +243,3 @@ int sysmon_post_test (int flags)
}
#endif /* CONFIG_POST & CFG_POST_SYSMON */
#endif /* CONFIG_POST */

47
post/board/lwmon5/watchdog.c
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@ -24,14 +24,11 @@
#include <common.h>
/*
* This test verifies if the reason of last reset was an abnormal voltage
/* This test verifies if the reason of last reset was an abnormal voltage
* condition, than it performs watchdog test, measuing time required to
* trigger watchdog reset.
*/
#ifdef CONFIG_POST
#include <post.h>
#if CONFIG_POST & CFG_POST_WATCHDOG
@ -55,9 +52,8 @@ static void watchdog_magic_write(uint value)
int sysmon1_post_test(int flags)
{
if (gpio_read_in_bit(CFG_GPIO_SYSMON_STATUS) == 0) {
/*
* 3.1. GPIO62 is low
if (gpio_read_in_bit(CFG_GPIO_SYSMON_STATUS)) {
/* 3.1. GPIO62 is low
* Assuming system voltage failure.
*/
post_log("Abnormal voltage detected (GPIO62)\n");
@ -69,14 +65,11 @@ int sysmon1_post_test(int flags)
int lwmon5_watchdog_post_test(int flags)
{
ulong time;
/* On each reset scratch register 1 should be tested,
* but first test GPIO62:
*/
if (!(flags & POST_MANUAL) && sysmon1_post_test(flags)) {
/*
* 3.1. GPIO62 is low
/* 3.1. GPIO62 is low
* Assuming system voltage failure.
*/
/* 3.1.1. Set scratch register 1 to 0x0000xxxx */
@ -86,12 +79,12 @@ int lwmon5_watchdog_post_test(int flags)
}
if (watchdog_magic_read() != CFG_WATCHDOG_MAGIC) {
/*
* 3.2. Scratch register 1 differs from magic value 0x1248xxxx
/* 3.2. Scratch register 1 differs from magic value 0x1248xxxx
* Assuming PowerOn
*/
int ints;
ulong base;
ulong time;
/* 3.2.1. Set magic value to scratch register */
watchdog_magic_write(CFG_WATCHDOG_MAGIC);
@ -109,28 +102,26 @@ int lwmon5_watchdog_post_test(int flags)
if (ints)
enable_interrupts ();
/*
* 3.2.5. Reset didn't happen. - Set 0x0000xxxx
/* 3.2.5. Reset didn't happen. - Set 0x0000xxxx
* into scratch register 1
*/
watchdog_magic_write(0);
/* 3.2.6. Mark test as failed. */
post_log("hw watchdog time : %u ms, failed ", time);
return 2;
} else {
/* 3.3. Scratch register matches magic value 0x1248xxxx
* Assume this is watchdog-initiated reset
*/
ulong time;
/* 3.3.1. So, the test succeed, save measured time to syslog. */
time = in_be32((void *)CFG_WATCHDOG_TIME_ADDR);
post_log("hw watchdog time : %u ms, passed ", time);
/* 3.3.2. Set scratch register 1 to 0x0000xxxx */
watchdog_magic_write(0);
return 0;
}
/*
* 3.3. Scratch register matches magic value 0x1248xxxx
* Assume this is watchdog-initiated reset
*/
/* 3.3.1. So, the test succeed, save measured time to syslog. */
time = in_be32((void *)CFG_WATCHDOG_TIME_ADDR);
post_log("hw watchdog time : %u ms, passed ", time);
/* 3.3.2. Set scratch register 1 to 0x0000xxxx */
watchdog_magic_write(0);
return 0;
return -1;
}
#endif /* CONFIG_POST & CFG_POST_WATCHDOG */
#endif /* CONFIG_POST */

3
post/board/netta/codec.c
Unescape View File

@ -31,8 +31,6 @@
* in the board specific function.
*/
#ifdef CONFIG_POST
#include <post.h>
#if CONFIG_POST & CFG_POST_CODEC
@ -45,4 +43,3 @@ int codec_post_test (int flags)
}
#endif /* CONFIG_POST & CFG_POST_CODEC */
#endif /* CONFIG_POST */

3
post/board/netta/dsp.c
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@ -31,8 +31,6 @@
* in the board specific function.
*/
#ifdef CONFIG_POST
#include <post.h>
#if CONFIG_POST & CFG_POST_DSP
@ -45,4 +43,3 @@ int dsp_post_test (int flags)
}
#endif /* CONFIG_POST & CFG_POST_DSP */
#endif /* CONFIG_POST */

3
post/cpu/mpc8xx/cache.c
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@ -29,8 +29,6 @@
* several test scenarios.
*/
#ifdef CONFIG_POST
#include <post.h>
#include <watchdog.h>
@ -78,4 +76,3 @@ int cache_post_test (int flags)
}
#endif /* CONFIG_POST & CFG_POST_CACHE */
#endif /* CONFIG_POST */

2
post/cpu/mpc8xx/cache_8xx.S
Unescape View File

@ -22,7 +22,6 @@
#include <config.h>
#ifdef CONFIG_POST
#if defined(CONFIG_MPC823) || \
defined(CONFIG_MPC850) || \
defined(CONFIG_MPC855) || \
@ -492,4 +491,3 @@ cache_post_test6_data:
#endif /* CONFIG_MPC823 || MPC850 || MPC855 || MPC860 */
#endif /* CONFIG_POST & CFG_POST_CACHE */
#endif /* CONFIG_POST */

4
post/cpu/mpc8xx/ether.c
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@ -35,8 +35,6 @@
* TEST_NUM - number of tests
*/
#ifdef CONFIG_POST
#include <post.h>
#if CONFIG_POST & CFG_POST_ETHER
#if defined(CONFIG_8xx)
@ -627,5 +625,3 @@ int ether_post_test (int flags)
}
#endif /* CONFIG_POST & CFG_POST_ETHER */
#endif /* CONFIG_POST */

3
post/cpu/mpc8xx/spr.c
Unescape View File

@ -33,8 +33,6 @@
* corresponding table value.
*/
#ifdef CONFIG_POST
#include <post.h>
#if CONFIG_POST & CFG_POST_SPR
@ -149,4 +147,3 @@ int spr_post_test (int flags)
return ret;
}
#endif /* CONFIG_POST & CFG_POST_SPR */
#endif /* CONFIG_POST */

4
post/cpu/mpc8xx/uart.c
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@ -36,8 +36,6 @@
* TEST_NUM - number of tests
*/
#ifdef CONFIG_POST
#include <post.h>
#if CONFIG_POST & CFG_POST_UART
#if defined(CONFIG_8xx)
@ -556,5 +554,3 @@ int uart_post_test (int flags)
}
#endif /* CONFIG_POST & CFG_POST_UART */
#endif /* CONFIG_POST */

4
post/cpu/mpc8xx/usb.c
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@ -34,8 +34,6 @@
* Initialization Example.
*/
#ifdef CONFIG_POST
#include <post.h>
#if CONFIG_POST & CFG_POST_USB
@ -265,5 +263,3 @@ int usb_post_test (int flags)
}
#endif /* CONFIG_POST & CFG_POST_USB */
#endif /* CONFIG_POST */

3
post/cpu/mpc8xx/watchdog.c
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@ -33,8 +33,6 @@
* reboots, on the second iteration the test routine reports a success.
*/
#ifdef CONFIG_POST
#include <post.h>
#include <watchdog.h>
@ -75,4 +73,3 @@ int watchdog_post_test (int flags)
}
#endif /* CONFIG_POST & CFG_POST_WATCHDOG */
#endif /* CONFIG_POST */

5
post/cpu/ppc4xx/Makefile
Unescape View File

@ -20,10 +20,11 @@
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/include/autoconf.mk
LIB = libpostppc4xx.a
AOBJS = cache_4xx.o
COBJS = cache.o denali_ecc.o ether.o fpu.o spr.o uart.o watchdog.o
AOBJS-$(CONFIG_HAS_POST) += cache_4xx.o
COBJS-$(CONFIG_HAS_POST) += cache.o denali_ecc.o ether.o fpu.o spr.o uart.o watchdog.o
include $(TOPDIR)/post/rules.mk

3
post/cpu/ppc4xx/cache.c
Unescape View File

@ -31,8 +31,6 @@
* several test scenarios.
*/
#ifdef CONFIG_POST
#include <post.h>
#if CONFIG_POST & CFG_POST_CACHE
@ -122,4 +120,3 @@ int cache_post_test (int flags)
}
#endif /* CONFIG_POST & CFG_POST_CACHE */
#endif /* CONFIG_POST */

3
post/cpu/ppc4xx/cache_4xx.S
Unescape View File

@ -25,8 +25,6 @@
#include <config.h>
#ifdef CONFIG_POST
#include <post.h>
#include <ppc_asm.tmpl>
#include <ppc_defs.h>
@ -489,4 +487,3 @@ cache_post_test_inst:
blr
#endif /* CONFIG_POST & CFG_POST_CACHE */
#endif /* CONFIG_POST */

4
post/cpu/ppc4xx/denali_ecc.c
Unescape View File

@ -31,7 +31,7 @@
#include <common.h>
#include <watchdog.h>
#if defined(CONFIG_POST) && (defined(CONFIG_440EPX) || defined(CONFIG_440GRX))
#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
#include <post.h>
@ -268,4 +268,4 @@ int ecc_post_test(int flags)
return ret;
}
#endif /* CONFIG_POST & CFG_POST_ECC */
#endif /* defined(CONFIG_POST) && ... */
#endif /* defined(CONFIG_440EPX) || defined(CONFIG_440GRX) */

3
post/cpu/ppc4xx/ether.c
Unescape View File

@ -37,8 +37,6 @@
* TEST_NUM - number of tests
*/
#ifdef CONFIG_POST
#include <post.h>
#if CONFIG_POST & CFG_POST_ETHER
@ -430,4 +428,3 @@ out_free:
}
#endif /* CONFIG_POST & CFG_POST_ETHER */
#endif /* CONFIG_POST */

2
post/cpu/ppc4xx/fpu.c
Unescape View File

@ -25,7 +25,6 @@
#include <config.h>
#ifdef CONFIG_POST
#if defined(CONFIG_440EP) || \
defined(CONFIG_440EPX)
@ -56,4 +55,3 @@ void fpu_enable(void)
}
#endif
#endif /* CONFIG_POST */

3
post/cpu/ppc4xx/spr.c
Unescape View File

@ -35,8 +35,6 @@
* corresponding table value.
*/
#ifdef CONFIG_POST
#include <post.h>
#if CONFIG_POST & CFG_POST_SPR
@ -199,4 +197,3 @@ int spr_post_test (int flags)
}
#endif /* CONFIG_POST & CFG_POST_SPR */
#endif /* CONFIG_POST */

3
post/cpu/ppc4xx/uart.c
Unescape View File

@ -32,8 +32,6 @@
* characters are transmitted.
*/
#ifdef CONFIG_POST
#include <post.h>
#if CONFIG_POST & CFG_POST_UART
@ -389,4 +387,3 @@ int uart_post_test (int flags)
}
#endif /* CONFIG_POST & CFG_POST_UART */
#endif /* CONFIG_POST */

3
post/cpu/ppc4xx/watchdog.c
Unescape View File

@ -35,8 +35,6 @@
* reboots, on the second iteration the test routine reports a success.
*/
#ifdef CONFIG_POST
#include <post.h>
#if CONFIG_POST & CFG_POST_WATCHDOG
@ -68,4 +66,3 @@ int watchdog_post_test (int flags)
}
#endif /* CONFIG_POST & CFG_POST_WATCHDOG */
#endif /* CONFIG_POST */

6
post/drivers/Makefile
Unescape View File

@ -20,12 +20,10 @@
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
SUBDIRS =
include $(TOPDIR)/config.mk
LIB = libpostdrivers.a
COBJS = i2c.o memory.o rtc.o
COBJS-$(CONFIG_HAS_POST) += i2c.o memory.o rtc.o
include $(TOPDIR)/post/rules.mk

3
post/drivers/i2c.c
Unescape View File

@ -23,8 +23,6 @@
#include <common.h>
#ifdef CONFIG_POST
/*
* I2C test
*
@ -91,4 +89,3 @@ int i2c_post_test (int flags)
}
#endif /* CONFIG_POST & CFG_POST_I2C */
#endif /* CONFIG_POST */

3
post/drivers/memory.c
Unescape View File

@ -150,8 +150,6 @@
* the whole RAM.
*/
#ifdef CONFIG_POST
#include <post.h>
#include <watchdog.h>
@ -483,4 +481,3 @@ int memory_post_test (int flags)
}
#endif /* CONFIG_POST & CFG_POST_MEMORY */
#endif /* CONFIG_POST */

3
post/drivers/rtc.c
Unescape View File

@ -40,8 +40,6 @@
* nonleap-years.
*/
#ifdef CONFIG_POST
#include <post.h>
#include <rtc.h>
@ -195,4 +193,3 @@ int rtc_post_test (int flags)
}
#endif /* CONFIG_POST & CFG_POST_RTC */
#endif /* CONFIG_POST */

11
post/lib_ppc/Makefile
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@ -20,14 +20,13 @@
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
SUBDIRS = fpu
include $(TOPDIR)/config.mk
LIB = libpostppc.a
AOBJS = asm.o
COBJS = cpu.o cmp.o cmpi.o two.o twox.o three.o threex.o
COBJS += threei.o andi.o srawi.o rlwnm.o rlwinm.o rlwimi.o
COBJS += store.o load.o cr.o b.o multi.o string.o complex.o
AOBJS-$(CONFIG_HAS_POST) += asm.o
COBJS-$(CONFIG_HAS_POST) += cpu.o cmp.o cmpi.o two.o twox.o three.o threex.o
COBJS-$(CONFIG_HAS_POST) += threei.o andi.o srawi.o rlwnm.o rlwinm.o rlwimi.o
COBJS-$(CONFIG_HAS_POST) += store.o load.o cr.o b.o multi.o string.o complex.o
include $(TOPDIR)/post/rules.mk

3
post/lib_ppc/andi.c
Unescape View File

@ -32,8 +32,6 @@
* different sets of operand registers and result registers.
*/
#ifdef CONFIG_POST
#include <post.h>
#include "cpu_asm.h"
@ -120,4 +118,3 @@ int cpu_post_test_andi (void)
}
#endif
#endif

3
post/lib_ppc/asm.S
Unescape View File

@ -22,8 +22,6 @@
#include <config.h>
#ifdef CONFIG_POST
#include <post.h>
#include <ppc_asm.tmpl>
#include <ppc_defs.h>
@ -358,4 +356,3 @@ cpu_post_complex_2_loop:
blr
#endif
#endif

3
post/lib_ppc/b.c
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@ -37,8 +37,6 @@
* linked in U-Boot at build time.
*/
#ifdef CONFIG_POST
#include <post.h>
#include "cpu_asm.h"
@ -194,4 +192,3 @@ int cpu_post_test_b (void)
}
#endif
#endif

3
post/lib_ppc/cmp.c
Unescape View File

@ -36,8 +36,6 @@
* the result in and the expected result.
*/
#ifdef CONFIG_POST
#include <post.h>
#include "cpu_asm.h"
@ -130,4 +128,3 @@ int cpu_post_test_cmp (void)
}
#endif
#endif

3
post/lib_ppc/cmpi.c
Unescape View File

@ -36,8 +36,6 @@
* the result in and the expected result.
*/
#ifdef CONFIG_POST
#include <post.h>
#include "cpu_asm.h"
@ -130,4 +128,3 @@ int cpu_post_test_cmpi (void)
}
#endif
#endif

3
post/lib_ppc/complex.c
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@ -31,8 +31,6 @@
* calculations, but probably under different timing conditions, etc.
*/
#ifdef CONFIG_POST
#include <post.h>
#include "cpu_asm.h"
@ -123,4 +121,3 @@ int cpu_post_test_complex (void)
}
#endif
#endif

3
post/lib_ppc/cpu.c
Unescape View File

@ -32,8 +32,6 @@
* For more details refer to post/cpu/ *.c files.
*/
#ifdef CONFIG_POST
#include <watchdog.h>
#include <post.h>
#include <asm/mmu.h>
@ -147,4 +145,3 @@ int cpu_post_test (int flags)
}
#endif /* CONFIG_POST & CFG_POST_CPU */
#endif /* CONFIG_POST */

3
post/lib_ppc/cr.c
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@ -46,8 +46,6 @@
* expected one.
*/
#ifdef CONFIG_POST
#include <post.h>
#include "cpu_asm.h"
@ -353,4 +351,3 @@ int cpu_post_test_cr (void)
}
#endif
#endif

3
post/lib_ppc/fpu/20001122-1.c
Unescape View File

@ -26,8 +26,6 @@
#include <common.h>
#ifdef CONFIG_POST
#include <post.h>
#if CONFIG_POST & CFG_POST_FPU
@ -59,4 +57,3 @@ int fpu_post_test_math1 (void)
}
#endif /* CONFIG_POST & CFG_POST_FPU */
#endif /* CONFIG_POST */

3
post/lib_ppc/fpu/20010114-2.c
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@ -26,8 +26,6 @@
#include <common.h>
#ifdef CONFIG_POST
#include <post.h>
#if CONFIG_POST & CFG_POST_FPU
@ -63,4 +61,3 @@ int fpu_post_test_math2 (void)
}
#endif /* CONFIG_POST & CFG_POST_FPU */
#endif /* CONFIG_POST */

3
post/lib_ppc/fpu/20010226-1.c
Unescape View File

@ -26,8 +26,6 @@
#include <common.h>
#ifdef CONFIG_POST
#include <post.h>
#if CONFIG_POST & CFG_POST_FPU
@ -51,4 +49,3 @@ int fpu_post_test_math3 (void)
}
#endif /* CONFIG_POST & CFG_POST_FPU */
#endif /* CONFIG_POST */

3
post/lib_ppc/fpu/980619-1.c
Unescape View File

@ -26,8 +26,6 @@
#include <common.h>
#ifdef CONFIG_POST
#include <post.h>
#if CONFIG_POST & CFG_POST_FPU
@ -57,4 +55,3 @@ int fpu_post_test_math4 (void)
}
#endif /* CONFIG_POST & CFG_POST_FPU */
#endif /* CONFIG_POST */

6
post/lib_ppc/fpu/Makefile
Unescape View File

@ -20,12 +20,12 @@
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = libpostppcfpu.a
COBJS += fpu.o 20001122-1.o 20010114-2.o 20010226-1.o 980619-1.o
COBJS += acc1.o compare-fp-1.o mul-subnormal-single-1.o
COBJS-$(CONFIG_HAS_POST) += fpu.o 20001122-1.o 20010114-2.o 20010226-1.o 980619-1.o
COBJS-$(CONFIG_HAS_POST) += acc1.o compare-fp-1.o mul-subnormal-single-1.o
include $(TOPDIR)/post/rules.mk

3
post/lib_ppc/fpu/acc1.c
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@ -26,8 +26,6 @@
#include <common.h>
#ifdef CONFIG_POST
#include <post.h>
#if CONFIG_POST & CFG_POST_FPU
@ -54,4 +52,3 @@ int fpu_post_test_math5 (void)
}
#endif /* CONFIG_POST & CFG_POST_FPU */
#endif /* CONFIG_POST */

3
post/lib_ppc/fpu/compare-fp-1.c
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@ -28,8 +28,6 @@
#include <common.h>
#ifdef CONFIG_POST
#include <post.h>
#if CONFIG_POST & CFG_POST_FPU
@ -222,4 +220,3 @@ int fpu_post_test_math6 (void)
}
#endif /* CONFIG_POST & CFG_POST_FPU */
#endif /* CONFIG_POST */

3
post/lib_ppc/fpu/fpu.c
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@ -34,8 +34,6 @@
* For more details refer to post/cpu/ *.c files.
*/
#ifdef CONFIG_POST
#include <post.h>
#if CONFIG_POST & CFG_POST_FPU
@ -89,4 +87,3 @@ int fpu_post_test (int flags)
}
#endif /* CONFIG_POST & CFG_POST_FPU */
#endif /* CONFIG_POST */

3
post/lib_ppc/fpu/mul-subnormal-single-1.c
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@ -28,8 +28,6 @@
#include <common.h>
#ifdef CONFIG_POST
#include <post.h>
#if CONFIG_POST & CFG_POST_FPU
@ -100,4 +98,3 @@ int fpu_post_test_math7 (void)
}
#endif /* CONFIG_POST & CFG_POST_FPU */
#endif /* CONFIG_POST */

3
post/lib_ppc/load.c
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@ -41,8 +41,6 @@
* register (it must change for "load with update" instructions).
*/
#ifdef CONFIG_POST
#include <post.h>
#include "cpu_asm.h"
@ -252,4 +250,3 @@ int cpu_post_test_load (void)
}
#endif
#endif

3
post/lib_ppc/multi.c
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@ -33,8 +33,6 @@
* of the source and target buffers are then compared.
*/
#ifdef CONFIG_POST
#include <post.h>
#include "cpu_asm.h"
@ -78,4 +76,3 @@ int cpu_post_test_multi (void)
}
#endif
#endif

3
post/lib_ppc/rlwimi.c
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@ -32,8 +32,6 @@
* different sets of operand registers and result registers.
*/
#ifdef CONFIG_POST
#include <post.h>
#include "cpu_asm.h"
@ -159,4 +157,3 @@ int cpu_post_test_rlwimi (void)
}
#endif
#endif

3
post/lib_ppc/rlwinm.c
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@ -32,8 +32,6 @@
* different sets of operand registers and result registers.
*/
#ifdef CONFIG_POST
#include <post.h>
#include "cpu_asm.h"
@ -152,4 +150,3 @@ int cpu_post_test_rlwinm (void)
}
#endif
#endif

3
post/lib_ppc/rlwnm.c
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@ -32,8 +32,6 @@
* different sets of operand registers and result registers.
*/
#ifdef CONFIG_POST
#include <post.h>
#include "cpu_asm.h"
@ -162,4 +160,3 @@ int cpu_post_test_rlwnm (void)
}
#endif
#endif

3
post/lib_ppc/srawi.c
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@ -32,8 +32,6 @@
* different sets of operand registers and result registers.
*/
#ifdef CONFIG_POST
#include <post.h>
#include "cpu_asm.h"
@ -153,4 +151,3 @@ int cpu_post_test_srawi (void)
}
#endif
#endif

3
post/lib_ppc/store.c
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@ -41,8 +41,6 @@
* with update" instructions).
*/
#ifdef CONFIG_POST
#include <post.h>
#include "cpu_asm.h"
@ -232,4 +230,3 @@ int cpu_post_test_store (void)
}
#endif
#endif

3
post/lib_ppc/string.c
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@ -33,8 +33,6 @@
* of the source and target buffers are then compared.
*/
#ifdef CONFIG_POST
#include <post.h>
#include "cpu_asm.h"
@ -103,4 +101,3 @@ int cpu_post_test_string (void)
}
#endif
#endif

3
post/lib_ppc/three.c
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@ -35,8 +35,6 @@
* different sets of operand registers and result registers.
*/
#ifdef CONFIG_POST
#include <post.h>
#include "cpu_asm.h"
@ -256,4 +254,3 @@ int cpu_post_test_three (void)
}
#endif
#endif

3
post/lib_ppc/threei.c
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@ -34,8 +34,6 @@
* different sets of operand registers and result registers.
*/
#ifdef CONFIG_POST
#include <post.h>
#include "cpu_asm.h"
@ -134,4 +132,3 @@ int cpu_post_test_threei (void)
}
#endif
#endif

3
post/lib_ppc/threex.c
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@ -35,8 +35,6 @@
* different sets of operand registers and result registers.
*/
#ifdef CONFIG_POST
#include <post.h>
#include "cpu_asm.h"
@ -226,4 +224,3 @@ int cpu_post_test_threex (void)
}
#endif
#endif

3
post/lib_ppc/two.c
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@ -35,8 +35,6 @@
* different sets of operand registers and result registers.
*/
#ifdef CONFIG_POST
#include <post.h>
#include "cpu_asm.h"
@ -173,4 +171,3 @@ int cpu_post_test_two (void)
}
#endif
#endif

3
post/lib_ppc/twox.c
Unescape View File

@ -35,8 +35,6 @@
* different sets of operand registers and result registers.
*/
#ifdef CONFIG_POST
#include <post.h>
#include "cpu_asm.h"
@ -173,4 +171,3 @@ int cpu_post_test_twox (void)
}
#endif
#endif

4
post/post.c
Unescape View File

@ -30,8 +30,6 @@
#include <logbuff.h>
#endif
#ifdef CONFIG_POST
DECLARE_GLOBAL_DATA_PTR;
#define POST_MAX_NUMBER 32
@ -442,5 +440,3 @@ unsigned long post_time_ms (unsigned long base)
return 0; /* Not implemented yet */
#endif
}
#endif /* CONFIG_POST */

2
post/rules.mk
Unescape View File

@ -23,6 +23,8 @@
include $(TOPDIR)/config.mk
COBJS := $(COBJS-y)
AOBJS := $(AOBJS-y)
SRCS := $(AOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(AOBJS) $(COBJS))
LIB := $(obj)$(LIB)

4
post/tests.c
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@ -27,8 +27,6 @@
#include <common.h>
#ifdef CONFIG_POST
#include <post.h>
extern int cache_post_test (int flags);
@ -278,5 +276,3 @@ struct post_test post_list[] =
};
unsigned int post_list_size = sizeof (post_list) / sizeof (struct post_test);
#endif /* CONFIG_POST */

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