@ -84,10 +84,22 @@ void get_board_mem_timings(struct board_sdrc_timings *timings)
int mfr , id , err = identify_nand_chip ( & mfr , & id ) ;
int mfr , id , err = identify_nand_chip ( & mfr , & id ) ;
timings - > mr = MICRON_V_MR_165 ;
timings - > mr = MICRON_V_MR_165 ;
if ( ! err & & mfr = = NAND_MFR_MICRON ) {
if ( ! err ) {
timings - > mcfg = MICRON_V_MCFG_200 ( 256 < < 20 ) ;
switch ( mfr ) {
timings - > ctrla = MICRON_V_ACTIMA_200 ;
case NAND_MFR_HYNIX :
timings - > ctrlb = MICRON_V_ACTIMB_200 ;
timings - > mcfg = HYNIX_V_MCFG_200 ( 256 < < 20 ) ;
timings - > ctrla = HYNIX_V_ACTIMA_200 ;
timings - > ctrlb = HYNIX_V_ACTIMB_200 ;
break ;
case NAND_MFR_MICRON :
timings - > mcfg = MICRON_V_MCFG_200 ( 256 < < 20 ) ;
timings - > ctrla = MICRON_V_ACTIMA_200 ;
timings - > ctrlb = MICRON_V_ACTIMB_200 ;
break ;
default :
/* Should not happen... */
break ;
}
timings - > rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz ;
timings - > rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz ;
gpmc_cs0_flash = MTD_DEV_TYPE_NAND ;
gpmc_cs0_flash = MTD_DEV_TYPE_NAND ;
} else {
} else {