Some of the Intel CPU code is common to several Intel CPUs. Move it into a common location along with required declarations. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>master
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/*
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* Copyright (c) 2016 Google, Inc |
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* |
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* SPDX-License-Identifier: GPL-2.0 |
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*/ |
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#include <common.h> |
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#include <dm.h> |
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#include <errno.h> |
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#include <asm/cpu_common.h> |
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#include <asm/intel_regs.h> |
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#include <asm/lapic.h> |
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#include <asm/lpc_common.h> |
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#include <asm/msr.h> |
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#include <asm/mtrr.h> |
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#include <asm/post.h> |
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#include <asm/microcode.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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static int report_bist_failure(void) |
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{ |
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if (gd->arch.bist != 0) { |
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post_code(POST_BIST_FAILURE); |
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printf("BIST failed: %08x\n", gd->arch.bist); |
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return -EFAULT; |
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} |
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return 0; |
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} |
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int cpu_common_init(void) |
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{ |
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struct udevice *dev, *lpc; |
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int ret; |
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/* Halt if there was a built in self test failure */ |
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ret = report_bist_failure(); |
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if (ret) |
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return ret; |
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enable_lapic(); |
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ret = microcode_update_intel(); |
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if (ret && ret != -EEXIST) |
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return ret; |
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/* Enable upper 128bytes of CMOS */ |
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writel(1 << 2, RCB_REG(RC)); |
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/* Early chipset init required before RAM init can work */ |
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uclass_first_device(UCLASS_NORTHBRIDGE, &dev); |
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ret = uclass_first_device(UCLASS_LPC, &lpc); |
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if (ret) |
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return ret; |
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if (!lpc) |
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return -ENODEV; |
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/* Cause the SATA device to do its early init */ |
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uclass_first_device(UCLASS_DISK, &dev); |
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return 0; |
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} |
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int cpu_set_flex_ratio_to_tdp_nominal(void) |
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{ |
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msr_t flex_ratio, msr; |
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u8 nominal_ratio; |
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/* Check for Flex Ratio support */ |
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flex_ratio = msr_read(MSR_FLEX_RATIO); |
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if (!(flex_ratio.lo & FLEX_RATIO_EN)) |
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return -EINVAL; |
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/* Check for >0 configurable TDPs */ |
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msr = msr_read(MSR_PLATFORM_INFO); |
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if (((msr.hi >> 1) & 3) == 0) |
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return -EINVAL; |
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/* Use nominal TDP ratio for flex ratio */ |
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msr = msr_read(MSR_CONFIG_TDP_NOMINAL); |
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nominal_ratio = msr.lo & 0xff; |
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/* See if flex ratio is already set to nominal TDP ratio */ |
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if (((flex_ratio.lo >> 8) & 0xff) == nominal_ratio) |
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return 0; |
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/* Set flex ratio to nominal TDP ratio */ |
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flex_ratio.lo &= ~0xff00; |
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flex_ratio.lo |= nominal_ratio << 8; |
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flex_ratio.lo |= FLEX_RATIO_LOCK; |
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msr_write(MSR_FLEX_RATIO, flex_ratio); |
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/* Set flex ratio in soft reset data register bits 11:6 */ |
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clrsetbits_le32(RCB_REG(SOFT_RESET_DATA), 0x3f << 6, |
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(nominal_ratio & 0x3f) << 6); |
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debug("CPU: Soft reset to set up flex ratio\n"); |
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/* Set soft reset control to use register value */ |
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setbits_le32(RCB_REG(SOFT_RESET_CTRL), 1); |
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/* Issue warm reset, will be "CPU only" due to soft reset data */ |
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outb(0x0, PORT_RESET); |
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outb(SYS_RST | RST_CPU, PORT_RESET); |
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cpu_hlt(); |
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/* Not reached */ |
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return -EINVAL; |
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} |
@ -0,0 +1,35 @@ |
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/*
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* Copyright (c) 2016 Google, Inc |
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* |
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* SPDX-License-Identifier: GPL-2.0 |
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*/ |
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#ifndef __ASM_CPU_COMMON_H |
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#define __ASM_CPU_COMMON_H |
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#define IA32_PERF_CTL 0x199 |
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/**
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* cpu_common_init() - Set up common CPU init |
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* |
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* This reports BIST failure, enables the LAPIC, updates microcode, enables |
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* the upper 128-bytes of CROM RAM, probes the northbridge, PCH, LPC and SATA. |
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* |
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* @return 0 if OK, -ve on error |
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*/ |
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int cpu_common_init(void); |
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/**
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* cpu_set_flex_ratio_to_tdp_nominal() - Set up the maximum non-turbo rate |
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* |
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* If a change is needed, this function will do a soft reset so it takes |
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* effect. |
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* |
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* Some details are available here: |
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* http://forum.hwbot.org/showthread.php?t=76092
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* |
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* @return 0 if OK, -ve on error |
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*/ |
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int cpu_set_flex_ratio_to_tdp_nominal(void); |
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#endif |
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