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@ -45,6 +45,22 @@ |
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#define status_dcc(x) \ |
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#define status_dcc(x) \ |
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__asm__ volatile ("mrc p14, 0, %0, c0, c1, 0\n" : "=r" (x)) |
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__asm__ volatile ("mrc p14, 0, %0, c0, c1, 0\n" : "=r" (x)) |
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#elif defined(CONFIG_CPU_XSCALE) |
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/*
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* XSCALE |
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*/ |
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#define DCC_RBIT (1 << 31) |
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#define DCC_WBIT (1 << 28) |
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#define write_dcc(x) \ |
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__asm__ volatile ("mcr p14, 0, %0, c8, c0, 0\n" : : "r" (x)) |
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#define read_dcc(x) \ |
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__asm__ volatile ("mrc p14, 0, %0, c9, c0, 0\n" : "=r" (x)) |
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#define status_dcc(x) \ |
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__asm__ volatile ("mrc p14, 0, %0, c14, c0, 0\n" : "=r" (x)) |
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#else |
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#else |
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#define DCC_RBIT (1 << 0) |
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#define DCC_RBIT (1 << 0) |
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#define DCC_WBIT (1 << 1) |
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#define DCC_WBIT (1 << 1) |
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