* Add support for TQM862L at 100/50 MHz * Patch by Pantelis Antoniou, 02 Jun 2003: major reconstruction of networking code; add "ping" support (outgoing only!)master
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#
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# (C) Copyright 2000
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk |
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LIB = lib$(BOARD).a
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OBJS = $(BOARD).o flash.o
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$(LIB): .depend $(OBJS) |
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$(AR) crv $@ $^
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#########################################################################
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.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) |
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$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
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sinclude .depend |
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#########################################################################
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@ -0,0 +1,28 @@ |
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#
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# (C) Copyright 2000
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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#
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# RMU boards
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#
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TEXT_BASE = 0xfff00000
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@ -0,0 +1,515 @@ |
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/*
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* (C) Copyright 2000 |
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <mpc8xx.h> |
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flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ |
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/*-----------------------------------------------------------------------
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* Functions |
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*/ |
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static ulong flash_get_size (vu_long *addr, flash_info_t *info); |
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static int write_word (flash_info_t *info, ulong dest, ulong data); |
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static void flash_get_offsets (ulong base, flash_info_t *info); |
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/*-----------------------------------------------------------------------
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*/ |
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unsigned long flash_init (void) |
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{ |
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volatile immap_t *immap = (immap_t *)CFG_IMMR; |
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volatile memctl8xx_t *memctl = &immap->im_memctl; |
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unsigned long size_b0 ; |
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int i; |
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/* Init: no FLASHes known */ |
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for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) { |
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flash_info[i].flash_id = FLASH_UNKNOWN; |
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} |
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/* Static FLASH Bank configuration here - FIXME XXX */ |
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size_b0 = flash_get_size((vu_long *)FLASH_BASE_PRELIM, &flash_info[0]); |
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if (flash_info[0].flash_id == FLASH_UNKNOWN) { |
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printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", |
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size_b0, size_b0<<20); |
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} |
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/* Remap FLASH according to real size */ |
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memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & 0xFFFF8000); |
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memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V; |
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/* Re-do sizing to get full correct info */ |
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size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]); |
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flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]); |
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#if CFG_MONITOR_BASE >= CFG_FLASH_BASE |
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/* monitor protection ON by default */ |
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flash_protect(FLAG_PROTECT_SET, |
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CFG_MONITOR_BASE, |
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CFG_MONITOR_BASE+monitor_flash_len-1, |
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&flash_info[0]); |
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#endif |
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#ifdef CFG_ENV_IS_IN_FLASH |
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/* ENV protection ON by default */ |
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flash_protect(FLAG_PROTECT_SET, |
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CFG_ENV_ADDR, |
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CFG_ENV_ADDR+CFG_ENV_SIZE-1, |
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&flash_info[0]); |
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#endif |
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flash_info[0].size = size_b0; |
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return (size_b0); |
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} |
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/*-----------------------------------------------------------------------
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*/ |
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static void flash_get_offsets (ulong base, flash_info_t *info) |
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{ |
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int i; |
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/* set up sector start address table */ |
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if (info->flash_id & FLASH_BTYPE) { |
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/* set sector offsets for bottom boot block type */ |
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info->start[0] = base + 0x00000000; |
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info->start[1] = base + 0x00010000; |
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info->start[2] = base + 0x00018000; |
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info->start[3] = base + 0x00020000; |
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for (i = 4; i < info->sector_count; i++) { |
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info->start[i] = base + ((i-3) * 0x00040000) ; |
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} |
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} else { |
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/* set sector offsets for top boot block type */ |
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i = info->sector_count - 1; |
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info->start[i--] = base + info->size - 0x00010000; |
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info->start[i--] = base + info->size - 0x00018000; |
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info->start[i--] = base + info->size - 0x00020000; |
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for (; i >= 0; i--) { |
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info->start[i] = base + i * 0x00040000; |
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} |
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} |
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} |
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/*-----------------------------------------------------------------------
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*/ |
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void flash_print_info (flash_info_t *info) |
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{ |
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int i; |
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if (info->flash_id == FLASH_UNKNOWN) { |
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printf ("missing or unknown FLASH type\n"); |
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return; |
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} |
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switch (info->flash_id & FLASH_VENDMASK) { |
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case FLASH_MAN_AMD: printf ("AMD "); break; |
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case FLASH_MAN_FUJ: printf ("FUJITSU "); break; |
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default: printf ("Unknown Vendor "); break; |
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} |
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switch (info->flash_id & FLASH_TYPEMASK) { |
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case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n"); |
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break; |
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case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n"); |
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break; |
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case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n"); |
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break; |
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case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n"); |
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break; |
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case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n"); |
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break; |
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case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n"); |
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break; |
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case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n"); |
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break; |
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case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n"); |
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break; |
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default: printf ("Unknown Chip Type\n"); |
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break; |
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} |
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printf (" Size: %ld MB in %d Sectors\n", |
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info->size >> 20, info->sector_count); |
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printf (" Sector Start Addresses:"); |
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for (i=0; i<info->sector_count; ++i) { |
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if ((i % 5) == 0) |
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printf ("\n "); |
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printf (" %08lX%s", |
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info->start[i], |
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info->protect[i] ? " (RO)" : " " |
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); |
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} |
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printf ("\n"); |
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return; |
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} |
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/*-----------------------------------------------------------------------
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*/ |
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/*-----------------------------------------------------------------------
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*/ |
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/*
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* The following code cannot be run from FLASH! |
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*/ |
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static ulong flash_get_size (vu_long *addr, flash_info_t *info) |
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{ |
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short i; |
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ulong value; |
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ulong base = (ulong)addr; |
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/* Write auto select command: read Manufacturer ID */ |
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addr[0xAAA] = 0xAAAAAAAA ; |
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addr[0x555] = 0x55555555 ; |
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addr[0xAAA] = 0x90909090 ; |
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value = addr[0] ; |
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switch (value & 0x00FF00FF) { |
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case AMD_MANUFACT: |
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info->flash_id = FLASH_MAN_AMD; |
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break; |
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case FUJ_MANUFACT: |
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info->flash_id = FLASH_MAN_FUJ; |
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break; |
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default: |
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info->flash_id = FLASH_UNKNOWN; |
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info->sector_count = 0; |
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info->size = 0; |
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return (0); /* no or unknown flash */ |
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} |
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value = addr[2] ; /* device ID */ |
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switch (value & 0x00FF00FF) { |
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case (AMD_ID_LV400T & 0x00FF00FF): |
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info->flash_id += FLASH_AM400T; |
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info->sector_count = 11; |
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info->size = 0x00100000; |
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break; /* => 1 MB */ |
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case (AMD_ID_LV400B & 0x00FF00FF): |
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info->flash_id += FLASH_AM400B; |
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info->sector_count = 11; |
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info->size = 0x00100000; |
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break; /* => 1 MB */ |
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case (AMD_ID_LV800T & 0x00FF00FF): |
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info->flash_id += FLASH_AM800T; |
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info->sector_count = 19; |
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info->size = 0x00200000; |
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break; /* => 2 MB */ |
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case (AMD_ID_LV800B & 0x00FF00FF): |
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info->flash_id += FLASH_AM800B; |
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info->sector_count = 19; |
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info->size = 0x00400000; /*%%% Size doubled by yooth */ |
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break; /* => 4 MB */ |
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case (AMD_ID_LV160T & 0x00FF00FF): |
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info->flash_id += FLASH_AM160T; |
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info->sector_count = 35; |
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info->size = 0x00400000; |
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break; /* => 4 MB */ |
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case (AMD_ID_LV160B & 0x00FF00FF): |
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info->flash_id += FLASH_AM160B; |
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info->sector_count = 35; |
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info->size = 0x00800000; |
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break; /* => 8 MB */ |
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#if 0 /* enable when device IDs are available */
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case AMD_ID_LV320T: |
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info->flash_id += FLASH_AM320T; |
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info->sector_count = 67; |
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info->size = 0x00800000; |
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break; /* => 8 MB */ |
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case AMD_ID_LV320B: |
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info->flash_id += FLASH_AM320B; |
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info->sector_count = 67; |
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info->size = 0x01000000; |
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break; /* => 16 MB */ |
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#endif |
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default: |
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info->flash_id = FLASH_UNKNOWN; |
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return (0); /* => no or unknown flash */ |
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} |
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/*%%% sector start address modified */ |
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/* set up sector start address table */ |
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if (info->flash_id & FLASH_BTYPE) { |
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/* set sector offsets for bottom boot block type */ |
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info->start[0] = base + 0x00000000; |
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info->start[1] = base + 0x00010000; |
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info->start[2] = base + 0x00018000; |
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info->start[3] = base + 0x00020000; |
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for (i = 4; i < info->sector_count; i++) { |
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info->start[i] = base + ((i-3) * 0x00040000) ; |
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} |
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} else { |
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/* set sector offsets for top boot block type */ |
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i = info->sector_count - 1; |
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info->start[i--] = base + info->size - 0x00010000; |
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info->start[i--] = base + info->size - 0x00018000; |
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info->start[i--] = base + info->size - 0x00020000; |
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for (; i >= 0; i--) { |
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info->start[i] = base + i * 0x00040000; |
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} |
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} |
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/* check for protected sectors */ |
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for (i = 0; i < info->sector_count; i++) { |
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/* read sector protection at sector address, (A7 .. A0) = 0x02 */ |
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/* D0 = 1 if protected */ |
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addr = (volatile unsigned long *)(info->start[i]); |
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info->protect[i] = addr[4] & 1 ; |
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} |
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/*
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* Prevent writes to uninitialized FLASH. |
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*/ |
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if (info->flash_id != FLASH_UNKNOWN) { |
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addr = (volatile unsigned long *)info->start[0]; |
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*addr = 0xF0F0F0F0; /* reset bank */ |
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} |
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return (info->size); |
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} |
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/*-----------------------------------------------------------------------
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*/ |
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int flash_erase (flash_info_t *info, int s_first, int s_last) |
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{ |
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vu_long *addr = (vu_long*)(info->start[0]); |
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int flag, prot, sect, l_sect; |
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ulong start, now, last; |
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if ((s_first < 0) || (s_first > s_last)) { |
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if (info->flash_id == FLASH_UNKNOWN) { |
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printf ("- missing\n"); |
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} else { |
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printf ("- no sectors to erase\n"); |
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} |
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return 1; |
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} |
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if ((info->flash_id == FLASH_UNKNOWN) || |
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(info->flash_id > FLASH_AMD_COMP)) { |
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printf ("Can't erase unknown flash type %08lx - aborted\n", |
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info->flash_id); |
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return 1; |
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} |
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prot = 0; |
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for (sect=s_first; sect<=s_last; ++sect) { |
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if (info->protect[sect]) { |
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prot++; |
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} |
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} |
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if (prot) { |
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printf ("- Warning: %d protected sectors will not be erased!\n", |
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prot); |
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} else { |
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printf ("\n"); |
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|
} |
||||||
|
|
||||||
|
l_sect = -1; |
||||||
|
|
||||||
|
/* Disable interrupts which might cause a timeout here */ |
||||||
|
flag = disable_interrupts(); |
||||||
|
|
||||||
|
addr[0xAAA] = 0xAAAAAAAA; |
||||||
|
addr[0x555] = 0x55555555; |
||||||
|
addr[0xAAA] = 0x80808080; |
||||||
|
addr[0xAAA] = 0xAAAAAAAA; |
||||||
|
addr[0x555] = 0x55555555; |
||||||
|
|
||||||
|
/* Start erase on unprotected sectors */ |
||||||
|
for (sect = s_first; sect<=s_last; sect++) { |
||||||
|
if (info->protect[sect] == 0) { /* not protected */ |
||||||
|
addr = (vu_long *)(info->start[sect]) ; |
||||||
|
addr[0] = 0x30303030 ; |
||||||
|
l_sect = sect; |
||||||
|
} |
||||||
|
} |
||||||
|
|
||||||
|
/* re-enable interrupts if necessary */ |
||||||
|
if (flag) |
||||||
|
enable_interrupts(); |
||||||
|
|
||||||
|
/* wait at least 80us - let's wait 1 ms */ |
||||||
|
udelay (1000); |
||||||
|
|
||||||
|
/*
|
||||||
|
* We wait for the last triggered sector |
||||||
|
*/ |
||||||
|
if (l_sect < 0) |
||||||
|
goto DONE; |
||||||
|
|
||||||
|
start = get_timer (0); |
||||||
|
last = start; |
||||||
|
addr = (vu_long *)(info->start[l_sect]); |
||||||
|
while ((addr[0] & 0x80808080) != 0x80808080) { |
||||||
|
if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { |
||||||
|
printf ("Timeout\n"); |
||||||
|
return 1; |
||||||
|
} |
||||||
|
/* show that we're waiting */ |
||||||
|
if ((now - last) > 1000) { /* every second */ |
||||||
|
putc ('.'); |
||||||
|
last = now; |
||||||
|
} |
||||||
|
} |
||||||
|
|
||||||
|
DONE: |
||||||
|
/* reset to read mode */ |
||||||
|
addr = (vu_long *)info->start[0]; |
||||||
|
addr[0] = 0xF0F0F0F0; /* reset bank */ |
||||||
|
|
||||||
|
printf (" done\n"); |
||||||
|
return 0; |
||||||
|
} |
||||||
|
|
||||||
|
/*-----------------------------------------------------------------------
|
||||||
|
* Copy memory to flash, returns: |
||||||
|
* 0 - OK |
||||||
|
* 1 - write timeout |
||||||
|
* 2 - Flash not erased |
||||||
|
*/ |
||||||
|
|
||||||
|
int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) |
||||||
|
{ |
||||||
|
ulong cp, wp, data; |
||||||
|
int i, l, rc; |
||||||
|
|
||||||
|
wp = (addr & ~3); /* get lower word aligned address */ |
||||||
|
|
||||||
|
/*
|
||||||
|
* handle unaligned start bytes |
||||||
|
*/ |
||||||
|
if ((l = addr - wp) != 0) { |
||||||
|
data = 0; |
||||||
|
for (i=0, cp=wp; i<l; ++i, ++cp) { |
||||||
|
data = (data << 8) | (*(uchar *)cp); |
||||||
|
} |
||||||
|
for (; i<4 && cnt>0; ++i) { |
||||||
|
data = (data << 8) | *src++; |
||||||
|
--cnt; |
||||||
|
++cp; |
||||||
|
} |
||||||
|
for (; cnt==0 && i<4; ++i, ++cp) { |
||||||
|
data = (data << 8) | (*(uchar *)cp); |
||||||
|
} |
||||||
|
|
||||||
|
if ((rc = write_word(info, wp, data)) != 0) { |
||||||
|
return (rc); |
||||||
|
} |
||||||
|
wp += 4; |
||||||
|
} |
||||||
|
|
||||||
|
/*
|
||||||
|
* handle word aligned part |
||||||
|
*/ |
||||||
|
while (cnt >= 4) { |
||||||
|
data = 0; |
||||||
|
for (i=0; i<4; ++i) { |
||||||
|
data = (data << 8) | *src++; |
||||||
|
} |
||||||
|
if ((rc = write_word(info, wp, data)) != 0) { |
||||||
|
return (rc); |
||||||
|
} |
||||||
|
wp += 4; |
||||||
|
cnt -= 4; |
||||||
|
} |
||||||
|
|
||||||
|
if (cnt == 0) { |
||||||
|
return (0); |
||||||
|
} |
||||||
|
|
||||||
|
/*
|
||||||
|
* handle unaligned tail bytes |
||||||
|
*/ |
||||||
|
data = 0; |
||||||
|
for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { |
||||||
|
data = (data << 8) | *src++; |
||||||
|
--cnt; |
||||||
|
} |
||||||
|
for (; i<4; ++i, ++cp) { |
||||||
|
data = (data << 8) | (*(uchar *)cp); |
||||||
|
} |
||||||
|
|
||||||
|
return (write_word(info, wp, data)); |
||||||
|
} |
||||||
|
|
||||||
|
/*-----------------------------------------------------------------------
|
||||||
|
* Write a word to Flash, returns: |
||||||
|
* 0 - OK |
||||||
|
* 1 - write timeout |
||||||
|
* 2 - Flash not erased |
||||||
|
*/ |
||||||
|
static int write_word (flash_info_t *info, ulong dest, ulong data) |
||||||
|
{ |
||||||
|
vu_long *addr = (vu_long *)(info->start[0]); |
||||||
|
ulong start; |
||||||
|
int flag; |
||||||
|
|
||||||
|
/* Check if Flash is (sufficiently) erased */ |
||||||
|
if ((*((vu_long *)dest) & data) != data) { |
||||||
|
return (2); |
||||||
|
} |
||||||
|
/* Disable interrupts which might cause a timeout here */ |
||||||
|
flag = disable_interrupts(); |
||||||
|
|
||||||
|
addr[0xAAA] = 0xAAAAAAAA; |
||||||
|
addr[0x555] = 0x55555555; |
||||||
|
addr[0xAAA] = 0xA0A0A0A0; |
||||||
|
|
||||||
|
*((vu_long *)dest) = data; |
||||||
|
|
||||||
|
/* re-enable interrupts if necessary */ |
||||||
|
if (flag) |
||||||
|
enable_interrupts(); |
||||||
|
|
||||||
|
/* data polling for D7 */ |
||||||
|
start = get_timer (0); |
||||||
|
while ((*((vu_long *)dest) & 0x80808080) != (data & 0x80808080)) { |
||||||
|
if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { |
||||||
|
return (1); |
||||||
|
} |
||||||
|
} |
||||||
|
return (0); |
||||||
|
} |
||||||
|
|
||||||
|
/*-----------------------------------------------------------------------
|
||||||
|
*/ |
@ -0,0 +1,184 @@ |
|||||||
|
/*
|
||||||
|
* (C) Copyright 2000 |
||||||
|
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||||
|
* |
||||||
|
* See file CREDITS for list of people who contributed to this |
||||||
|
* project. |
||||||
|
* |
||||||
|
* This program is free software; you can redistribute it and/or |
||||||
|
* modify it under the terms of the GNU General Public License as |
||||||
|
* published by the Free Software Foundation; either version 2 of |
||||||
|
* the License, or (at your option) any later version. |
||||||
|
* |
||||||
|
* This program is distributed in the hope that it will be useful, |
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||||
|
* GNU General Public License for more details. |
||||||
|
* |
||||||
|
* You should have received a copy of the GNU General Public License |
||||||
|
* along with this program; if not, write to the Free Software |
||||||
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||||
|
* MA 02111-1307 USA |
||||||
|
*/ |
||||||
|
|
||||||
|
|
||||||
|
#include <common.h> |
||||||
|
#include <mpc8xx.h> |
||||||
|
|
||||||
|
/* ------------------------------------------------------------------------- */ |
||||||
|
|
||||||
|
static long int dram_size (long int, long int *, long int); |
||||||
|
|
||||||
|
/* ------------------------------------------------------------------------- */ |
||||||
|
|
||||||
|
#define _NOT_USED_ 0xFFFFCC25 |
||||||
|
|
||||||
|
const uint sdram_table[] = |
||||||
|
{ |
||||||
|
/*
|
||||||
|
* Single Read. (Offset 00h in UPMA RAM) |
||||||
|
*/ |
||||||
|
0x0F03CC04, 0x00ACCC24, 0x1FF74C20, _NOT_USED_, |
||||||
|
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
||||||
|
|
||||||
|
/*
|
||||||
|
* Burst Read. (Offset 08h in UPMA RAM) |
||||||
|
*/ |
||||||
|
0x0F03CC04, 0x00ACCC24, 0x00FFCC20, 0x00FFCC20, |
||||||
|
0x01FFCC20, 0x1FF74C20, _NOT_USED_, _NOT_USED_, |
||||||
|
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
||||||
|
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
||||||
|
|
||||||
|
/*
|
||||||
|
* Single Write. (Offset 18h in UPMA RAM) |
||||||
|
*/ |
||||||
|
0x0F03CC02, 0x00AC0C24, 0x1FF74C25, _NOT_USED_, |
||||||
|
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
||||||
|
|
||||||
|
/*
|
||||||
|
* Burst Write. (Offset 20h in UPMA RAM) |
||||||
|
*/ |
||||||
|
0x0F03CC00, 0x00AC0C20, 0x00FFFC20, 0x00FFFC22, |
||||||
|
0x01FFFC24, 0x1FF74C25, _NOT_USED_, _NOT_USED_, |
||||||
|
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
||||||
|
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
||||||
|
|
||||||
|
/*
|
||||||
|
* Refresh. (Offset 30h in UPMA RAM) |
||||||
|
* (Initialization code at 0x36) |
||||||
|
*/ |
||||||
|
0x0FF0CC24, 0xFFFFCC24, _NOT_USED_, _NOT_USED_, |
||||||
|
_NOT_USED_, _NOT_USED_, 0xEFFB8C34, 0x0FF74C34, |
||||||
|
0x0FFACCB4, 0x0FF5CC34, 0x0FFCC34, 0x0FFFCCB4, |
||||||
|
|
||||||
|
/*
|
||||||
|
* Exception. (Offset 3Ch in UPMA RAM) |
||||||
|
*/ |
||||||
|
0x0FEA8C34, 0x1FB54C34, 0xFFFFCC34, _NOT_USED_ |
||||||
|
}; |
||||||
|
|
||||||
|
/* ------------------------------------------------------------------------- */ |
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Check Board Identity: |
||||||
|
*/ |
||||||
|
|
||||||
|
int checkboard (void) |
||||||
|
{ |
||||||
|
puts ("Board: RMU\n") ; |
||||||
|
return (0) ; |
||||||
|
} |
||||||
|
|
||||||
|
/* ------------------------------------------------------------------------- */ |
||||||
|
|
||||||
|
long int initdram (int board_type) |
||||||
|
{ |
||||||
|
volatile immap_t *immap = (immap_t *)CFG_IMMR; |
||||||
|
volatile memctl8xx_t *memctl = &immap->im_memctl; |
||||||
|
long int size10 ; |
||||||
|
|
||||||
|
upmconfig(UPMA, (uint *)sdram_table, sizeof(sdram_table)/sizeof(uint)); |
||||||
|
|
||||||
|
/* Refresh clock prescalar */ |
||||||
|
memctl->memc_mptpr = CFG_MPTPR ; |
||||||
|
|
||||||
|
memctl->memc_mar = 0x00000088; |
||||||
|
|
||||||
|
/* Map controller banks 1 to the SDRAM bank */ |
||||||
|
memctl->memc_or1 = CFG_OR1_PRELIM; |
||||||
|
memctl->memc_br1 = CFG_BR1_PRELIM; |
||||||
|
|
||||||
|
memctl->memc_mamr = CFG_MAMR_10COL & (~(MAMR_PTAE)); /* no refresh yet */ |
||||||
|
|
||||||
|
udelay(200); |
||||||
|
|
||||||
|
/* perform SDRAM initializsation sequence */ |
||||||
|
|
||||||
|
memctl->memc_mcr = 0x80002136 ; /* SDRAM bank 0 */ |
||||||
|
udelay(1); |
||||||
|
|
||||||
|
memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */ |
||||||
|
|
||||||
|
udelay (1000); |
||||||
|
|
||||||
|
/* Check Bank 0 Memory Size
|
||||||
|
* try 10 column mode |
||||||
|
*/ |
||||||
|
|
||||||
|
size10 = dram_size (CFG_MAMR_10COL, (ulong *)SDRAM_BASE_PRELIM, SDRAM_MAX_SIZE) ; |
||||||
|
|
||||||
|
return (size10); |
||||||
|
} |
||||||
|
|
||||||
|
/* ------------------------------------------------------------------------- */ |
||||||
|
|
||||||
|
/*
|
||||||
|
* Check memory range for valid RAM. A simple memory test determines |
||||||
|
* the actually available RAM size between addresses `base' and |
||||||
|
* `base + maxsize'. Some (not all) hardware errors are detected: |
||||||
|
* - short between address lines |
||||||
|
* - short between data lines |
||||||
|
*/ |
||||||
|
|
||||||
|
static long int dram_size (long int mamr_value, long int *base, long int maxsize) |
||||||
|
{ |
||||||
|
volatile immap_t *immap = (immap_t *)CFG_IMMR; |
||||||
|
volatile memctl8xx_t *memctl = &immap->im_memctl; |
||||||
|
volatile long int *addr; |
||||||
|
ulong cnt, val; |
||||||
|
ulong save[32]; /* to make test non-destructive */ |
||||||
|
unsigned char i = 0; |
||||||
|
|
||||||
|
memctl->memc_mamr = mamr_value; |
||||||
|
|
||||||
|
for (cnt = maxsize/sizeof(long); cnt > 0; cnt >>= 1) { |
||||||
|
addr = base + cnt; /* pointer arith! */ |
||||||
|
|
||||||
|
save[i++] = *addr; |
||||||
|
*addr = ~cnt; |
||||||
|
} |
||||||
|
|
||||||
|
/* write 0 to base address */ |
||||||
|
addr = base; |
||||||
|
save[i] = *addr; |
||||||
|
*addr = 0; |
||||||
|
|
||||||
|
/* check at base address */ |
||||||
|
if ((val = *addr) != 0) { |
||||||
|
*addr = save[i]; |
||||||
|
return (0); |
||||||
|
} |
||||||
|
|
||||||
|
for (cnt = 1; cnt <= maxsize/sizeof(long); cnt <<= 1) { |
||||||
|
addr = base + cnt; /* pointer arith! */ |
||||||
|
|
||||||
|
val = *addr; |
||||||
|
*addr = save[--i]; |
||||||
|
|
||||||
|
if (val != (~cnt)) { |
||||||
|
return (cnt * sizeof(long)); |
||||||
|
} |
||||||
|
} |
||||||
|
return (maxsize); |
||||||
|
} |
@ -0,0 +1,134 @@ |
|||||||
|
/* |
||||||
|
* (C) Copyright 2000 |
||||||
|
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||||
|
* |
||||||
|
* See file CREDITS for list of people who contributed to this |
||||||
|
* project. |
||||||
|
* |
||||||
|
* This program is free software; you can redistribute it and/or |
||||||
|
* modify it under the terms of the GNU General Public License as |
||||||
|
* published by the Free Software Foundation; either version 2 of |
||||||
|
* the License, or (at your option) any later version. |
||||||
|
* |
||||||
|
* This program is distributed in the hope that it will be useful, |
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||||
|
* GNU General Public License for more details. |
||||||
|
* |
||||||
|
* You should have received a copy of the GNU General Public License |
||||||
|
* along with this program; if not, write to the Free Software |
||||||
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||||
|
* MA 02111-1307 USA |
||||||
|
*/ |
||||||
|
|
||||||
|
OUTPUT_ARCH(powerpc) |
||||||
|
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); |
||||||
|
/* Do we need any of these for elf? |
||||||
|
__DYNAMIC = 0; */ |
||||||
|
SECTIONS |
||||||
|
{ |
||||||
|
/* Read-only sections, merged into text segment: */ |
||||||
|
. = + SIZEOF_HEADERS; |
||||||
|
.interp : { *(.interp) } |
||||||
|
.hash : { *(.hash) } |
||||||
|
.dynsym : { *(.dynsym) } |
||||||
|
.dynstr : { *(.dynstr) } |
||||||
|
.rel.text : { *(.rel.text) } |
||||||
|
.rela.text : { *(.rela.text) } |
||||||
|
.rel.data : { *(.rel.data) } |
||||||
|
.rela.data : { *(.rela.data) } |
||||||
|
.rel.rodata : { *(.rel.rodata) } |
||||||
|
.rela.rodata : { *(.rela.rodata) } |
||||||
|
.rel.got : { *(.rel.got) } |
||||||
|
.rela.got : { *(.rela.got) } |
||||||
|
.rel.ctors : { *(.rel.ctors) } |
||||||
|
.rela.ctors : { *(.rela.ctors) } |
||||||
|
.rel.dtors : { *(.rel.dtors) } |
||||||
|
.rela.dtors : { *(.rela.dtors) } |
||||||
|
.rel.bss : { *(.rel.bss) } |
||||||
|
.rela.bss : { *(.rela.bss) } |
||||||
|
.rel.plt : { *(.rel.plt) } |
||||||
|
.rela.plt : { *(.rela.plt) } |
||||||
|
.init : { *(.init) } |
||||||
|
.plt : { *(.plt) } |
||||||
|
.text : |
||||||
|
{ |
||||||
|
/* WARNING - the following is hand-optimized to fit within */ |
||||||
|
/* the sector layout of our flash chips! XXX FIXME XXX */ |
||||||
|
|
||||||
|
cpu/mpc8xx/start.o (.text) |
||||||
|
common/dlmalloc.o (.text) |
||||||
|
lib_ppc/ppcstring.o (.text) |
||||||
|
lib_generic/vsprintf.o (.text) |
||||||
|
lib_generic/crc32.o (.text) |
||||||
|
lib_generic/zlib.o (.text) |
||||||
|
/* XXX ? |
||||||
|
. = env_offset; |
||||||
|
*/ |
||||||
|
common/environment.o(.text) |
||||||
|
|
||||||
|
*(.text) |
||||||
|
*(.fixup) |
||||||
|
*(.got1) |
||||||
|
} |
||||||
|
_etext = .; |
||||||
|
PROVIDE (etext = .); |
||||||
|
.rodata : |
||||||
|
{ |
||||||
|
*(.rodata) |
||||||
|
*(.rodata1) |
||||||
|
} |
||||||
|
.fini : { *(.fini) } =0 |
||||||
|
.ctors : { *(.ctors) } |
||||||
|
.dtors : { *(.dtors) } |
||||||
|
|
||||||
|
/* Read-write section, merged into data segment: */ |
||||||
|
. = (. + 0x00FF) & 0xFFFFFF00; |
||||||
|
_erotext = .; |
||||||
|
PROVIDE (erotext = .); |
||||||
|
.reloc : |
||||||
|
{ |
||||||
|
*(.got) |
||||||
|
_GOT2_TABLE_ = .; |
||||||
|
*(.got2) |
||||||
|
_FIXUP_TABLE_ = .; |
||||||
|
*(.fixup) |
||||||
|
} |
||||||
|
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; |
||||||
|
__fixup_entries = (. - _FIXUP_TABLE_)>>2; |
||||||
|
|
||||||
|
.data : |
||||||
|
{ |
||||||
|
*(.data) |
||||||
|
*(.data1) |
||||||
|
*(.sdata) |
||||||
|
*(.sdata2) |
||||||
|
*(.dynamic) |
||||||
|
CONSTRUCTORS |
||||||
|
} |
||||||
|
_edata = .; |
||||||
|
PROVIDE (edata = .); |
||||||
|
|
||||||
|
__start___ex_table = .; |
||||||
|
__ex_table : { *(__ex_table) } |
||||||
|
__stop___ex_table = .; |
||||||
|
|
||||||
|
. = ALIGN(256); |
||||||
|
__init_begin = .; |
||||||
|
.text.init : { *(.text.init) } |
||||||
|
.data.init : { *(.data.init) } |
||||||
|
. = ALIGN(256); |
||||||
|
__init_end = .; |
||||||
|
|
||||||
|
__bss_start = .; |
||||||
|
.bss : |
||||||
|
{ |
||||||
|
*(.sbss) *(.scommon) |
||||||
|
*(.dynbss) |
||||||
|
*(.bss) |
||||||
|
*(COMMON) |
||||||
|
} |
||||||
|
_end = . ; |
||||||
|
PROVIDE (end = .); |
||||||
|
} |
||||||
|
|
@ -0,0 +1,131 @@ |
|||||||
|
/* |
||||||
|
* (C) Copyright 2000 |
||||||
|
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||||
|
* |
||||||
|
* See file CREDITS for list of people who contributed to this |
||||||
|
* project. |
||||||
|
* |
||||||
|
* This program is free software; you can redistribute it and/or |
||||||
|
* modify it under the terms of the GNU General Public License as |
||||||
|
* published by the Free Software Foundation; either version 2 of |
||||||
|
* the License, or (at your option) any later version. |
||||||
|
* |
||||||
|
* This program is distributed in the hope that it will be useful, |
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||||
|
* GNU General Public License for more details. |
||||||
|
* |
||||||
|
* You should have received a copy of the GNU General Public License |
||||||
|
* along with this program; if not, write to the Free Software |
||||||
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||||
|
* MA 02111-1307 USA |
||||||
|
*/ |
||||||
|
|
||||||
|
OUTPUT_ARCH(powerpc) |
||||||
|
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); |
||||||
|
/* Do we need any of these for elf? |
||||||
|
__DYNAMIC = 0; */ |
||||||
|
SECTIONS |
||||||
|
{ |
||||||
|
/* Read-only sections, merged into text segment: */ |
||||||
|
. = + SIZEOF_HEADERS; |
||||||
|
.interp : { *(.interp) } |
||||||
|
.hash : { *(.hash) } |
||||||
|
.dynsym : { *(.dynsym) } |
||||||
|
.dynstr : { *(.dynstr) } |
||||||
|
.rel.text : { *(.rel.text) } |
||||||
|
.rela.text : { *(.rela.text) } |
||||||
|
.rel.data : { *(.rel.data) } |
||||||
|
.rela.data : { *(.rela.data) } |
||||||
|
.rel.rodata : { *(.rel.rodata) } |
||||||
|
.rela.rodata : { *(.rela.rodata) } |
||||||
|
.rel.got : { *(.rel.got) } |
||||||
|
.rela.got : { *(.rela.got) } |
||||||
|
.rel.ctors : { *(.rel.ctors) } |
||||||
|
.rela.ctors : { *(.rela.ctors) } |
||||||
|
.rel.dtors : { *(.rel.dtors) } |
||||||
|
.rela.dtors : { *(.rela.dtors) } |
||||||
|
.rel.bss : { *(.rel.bss) } |
||||||
|
.rela.bss : { *(.rela.bss) } |
||||||
|
.rel.plt : { *(.rel.plt) } |
||||||
|
.rela.plt : { *(.rela.plt) } |
||||||
|
.init : { *(.init) } |
||||||
|
.plt : { *(.plt) } |
||||||
|
.text : |
||||||
|
{ |
||||||
|
/* WARNING - the following is hand-optimized to fit within */ |
||||||
|
/* the sector layout of our flash chips! XXX FIXME XXX */ |
||||||
|
|
||||||
|
cpu/mpc8xx/start.o (.text) |
||||||
|
common/dlmalloc.o (.text) |
||||||
|
lib_generic/vsprintf.o (.text) |
||||||
|
lib_generic/crc32.o (.text) |
||||||
|
|
||||||
|
. = env_offset; |
||||||
|
common/environment.o(.text) |
||||||
|
|
||||||
|
*(.text) |
||||||
|
*(.fixup) |
||||||
|
*(.got1) |
||||||
|
} |
||||||
|
_etext = .; |
||||||
|
PROVIDE (etext = .); |
||||||
|
.rodata : |
||||||
|
{ |
||||||
|
*(.rodata) |
||||||
|
*(.rodata1) |
||||||
|
} |
||||||
|
.fini : { *(.fini) } =0 |
||||||
|
.ctors : { *(.ctors) } |
||||||
|
.dtors : { *(.dtors) } |
||||||
|
|
||||||
|
/* Read-write section, merged into data segment: */ |
||||||
|
. = (. + 0x0FFF) & 0xFFFFF000; |
||||||
|
_erotext = .; |
||||||
|
PROVIDE (erotext = .); |
||||||
|
.reloc : |
||||||
|
{ |
||||||
|
*(.got) |
||||||
|
_GOT2_TABLE_ = .; |
||||||
|
*(.got2) |
||||||
|
_FIXUP_TABLE_ = .; |
||||||
|
*(.fixup) |
||||||
|
} |
||||||
|
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; |
||||||
|
__fixup_entries = (. - _FIXUP_TABLE_)>>2; |
||||||
|
|
||||||
|
.data : |
||||||
|
{ |
||||||
|
*(.data) |
||||||
|
*(.data1) |
||||||
|
*(.sdata) |
||||||
|
*(.sdata2) |
||||||
|
*(.dynamic) |
||||||
|
CONSTRUCTORS |
||||||
|
} |
||||||
|
_edata = .; |
||||||
|
PROVIDE (edata = .); |
||||||
|
|
||||||
|
__start___ex_table = .; |
||||||
|
__ex_table : { *(__ex_table) } |
||||||
|
__stop___ex_table = .; |
||||||
|
|
||||||
|
. = ALIGN(4096); |
||||||
|
__init_begin = .; |
||||||
|
.text.init : { *(.text.init) } |
||||||
|
.data.init : { *(.data.init) } |
||||||
|
. = ALIGN(4096); |
||||||
|
__init_end = .; |
||||||
|
|
||||||
|
__bss_start = .; |
||||||
|
.bss : |
||||||
|
{ |
||||||
|
*(.sbss) *(.scommon) |
||||||
|
*(.dynbss) |
||||||
|
*(.bss) |
||||||
|
*(COMMON) |
||||||
|
} |
||||||
|
_end = . ; |
||||||
|
PROVIDE (end = .); |
||||||
|
} |
||||||
|
|
@ -0,0 +1,379 @@ |
|||||||
|
/*
|
||||||
|
* (C) Copyright 2003 |
||||||
|
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||||
|
* |
||||||
|
* See file CREDITS for list of people who contributed to this |
||||||
|
* project. |
||||||
|
* |
||||||
|
* This program is free software; you can redistribute it and/or |
||||||
|
* modify it under the terms of the GNU General Public License as |
||||||
|
* published by the Free Software Foundation; either version 2 of |
||||||
|
* the License, or (at your option) any later version. |
||||||
|
* |
||||||
|
* This program is distributed in the hope that it will be useful, |
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||||
|
* GNU General Public License for more details. |
||||||
|
* |
||||||
|
* You should have received a copy of the GNU General Public License |
||||||
|
* along with this program; if not, write to the Free Software |
||||||
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||||
|
* MA 02111-1307 USA |
||||||
|
*/ |
||||||
|
|
||||||
|
/*
|
||||||
|
* board/config.h - configuration options, board specific |
||||||
|
*/ |
||||||
|
|
||||||
|
#ifndef __CONFIG_H |
||||||
|
#define __CONFIG_H |
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* High Level Configuration Options |
||||||
|
* (easy to change) |
||||||
|
*/ |
||||||
|
|
||||||
|
#undef CONFIG_MPC860 |
||||||
|
#define CONFIG_MPC850 1 /* This is a MPC850 CPU */ |
||||||
|
#define CONFIG_RPXLITE 1 /* RMU is the RPXlite clone */ |
||||||
|
#define CONFIG_RMU 1 |
||||||
|
|
||||||
|
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ |
||||||
|
#undef CONFIG_8xx_CONS_SMC2 |
||||||
|
#undef CONFIG_8xx_CONS_NONE |
||||||
|
#define CONFIG_BAUDRATE 9600 /* console baudrate = 9600bps */ |
||||||
|
#if 0 |
||||||
|
#define CONFIG_BOOTDELAY -1 /* autoboot disabled */ |
||||||
|
#else |
||||||
|
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ |
||||||
|
#endif |
||||||
|
|
||||||
|
#define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */ |
||||||
|
|
||||||
|
#undef CONFIG_BOOTARGS |
||||||
|
#define CONFIG_BOOTCOMMAND \ |
||||||
|
"bootp; " \
|
||||||
|
"setenv bootargs root=/dev/nfs rw nfsroot=$(serverip):$(rootpath) " \
|
||||||
|
"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off; " \
|
||||||
|
"bootm" |
||||||
|
|
||||||
|
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ |
||||||
|
#undef CFG_LOADS_BAUD_CHANGE /* don't allow baudrate change */ |
||||||
|
|
||||||
|
#undef CONFIG_WATCHDOG /* watchdog disabled */ |
||||||
|
|
||||||
|
#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE) |
||||||
|
|
||||||
|
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ |
||||||
|
#include <cmd_confdefs.h> |
||||||
|
|
||||||
|
/*
|
||||||
|
* Miscellaneous configurable options |
||||||
|
*/ |
||||||
|
#define CFG_LONGHELP /* undef to save memory */ |
||||||
|
#define CFG_PROMPT "=> " /* Monitor Command Prompt */ |
||||||
|
#if (CONFIG_COMMANDS & CFG_CMD_KGDB) |
||||||
|
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ |
||||||
|
#else |
||||||
|
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ |
||||||
|
#endif |
||||||
|
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ |
||||||
|
#define CFG_MAXARGS 16 /* max number of command args */ |
||||||
|
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ |
||||||
|
|
||||||
|
#define CFG_MEMTEST_START 0x0040000 /* memtest works on */ |
||||||
|
#define CFG_MEMTEST_END 0x00C0000 /* 4 ... 12 MB in DRAM */ |
||||||
|
|
||||||
|
#define CFG_LOAD_ADDR 0x100000 /* default load address */ |
||||||
|
|
||||||
|
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ |
||||||
|
|
||||||
|
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
||||||
|
|
||||||
|
/*
|
||||||
|
* Low Level Configuration Settings |
||||||
|
* (address mappings, register initial values, etc.) |
||||||
|
* You should know what you are doing if you make changes here. |
||||||
|
*/ |
||||||
|
/*-----------------------------------------------------------------------
|
||||||
|
* Internal Memory Mapped Register |
||||||
|
*/ |
||||||
|
#define CFG_IMMR 0xFA200000 |
||||||
|
|
||||||
|
/*-----------------------------------------------------------------------
|
||||||
|
* Definitions for initial stack pointer and data area (in DPRAM) |
||||||
|
*/ |
||||||
|
#define CFG_INIT_RAM_ADDR CFG_IMMR |
||||||
|
#define CFG_INIT_RAM_END 0x2F00 /* End of used area in DPRAM */ |
||||||
|
#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */ |
||||||
|
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) |
||||||
|
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET |
||||||
|
|
||||||
|
/*-----------------------------------------------------------------------
|
||||||
|
* Start addresses for the final memory configuration |
||||||
|
* (Set up by the startup code) |
||||||
|
* Please note that CFG_SDRAM_BASE _must_ start at 0 |
||||||
|
*/ |
||||||
|
#define CFG_SDRAM_BASE 0x00000000 |
||||||
|
#define CFG_FLASH_BASE 0xFF800000 |
||||||
|
/*%%% #define CFG_FLASH_BASE 0xFFF00000 */ |
||||||
|
#if defined(DEBUG) || (CONFIG_COMMANDS & CFG_CMD_IDE) |
||||||
|
#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ |
||||||
|
#else |
||||||
|
#define CFG_MONITOR_LEN (128 << 10) /* Reserve 128 kB for Monitor */ |
||||||
|
#endif |
||||||
|
#define CFG_MONITOR_BASE 0xFFF00000 |
||||||
|
/*%%% #define CFG_MONITOR_BASE CFG_FLASH_BASE */ |
||||||
|
#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ |
||||||
|
|
||||||
|
/*
|
||||||
|
* For booting Linux, the board info and command line data |
||||||
|
* have to be in the first 8 MB of memory, since this is |
||||||
|
* the maximum mapped by the Linux kernel during initialization. |
||||||
|
*/ |
||||||
|
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ |
||||||
|
|
||||||
|
/*-----------------------------------------------------------------------
|
||||||
|
* FLASH organization |
||||||
|
*/ |
||||||
|
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
||||||
|
#define CFG_MAX_FLASH_SECT 35 /* max number of sectors on one chip */ |
||||||
|
|
||||||
|
#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ |
||||||
|
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ |
||||||
|
|
||||||
|
#define CFG_ENV_IS_IN_FLASH 1 |
||||||
|
#define CFG_ENV_OFFSET 0x00740000 /* Offset of Environment Sector */ |
||||||
|
#define CFG_ENV_SIZE 0x40000 /* Total Size of Environment Sector */ |
||||||
|
#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET) |
||||||
|
|
||||||
|
/* Address and size of Redundant Environment Sector */ |
||||||
|
#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SIZE) |
||||||
|
#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) |
||||||
|
|
||||||
|
/*-----------------------------------------------------------------------
|
||||||
|
* Cache Configuration |
||||||
|
*/ |
||||||
|
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */ |
||||||
|
#if (CONFIG_COMMANDS & CFG_CMD_KGDB) |
||||||
|
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */ |
||||||
|
#endif |
||||||
|
|
||||||
|
/*-----------------------------------------------------------------------
|
||||||
|
* SYPCR - System Protection Control 11-9 |
||||||
|
* SYPCR can only be written once after reset! |
||||||
|
*----------------------------------------------------------------------- |
||||||
|
* Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze |
||||||
|
*/ |
||||||
|
#if defined(CONFIG_WATCHDOG) |
||||||
|
#define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \ |
||||||
|
SYPCR_SWE | SYPCR_SWRI| SYPCR_SWP) |
||||||
|
#else |
||||||
|
#define CFG_SYPCR (SYPCR_SWTC | 0x00000600 | SYPCR_BME | SYPCR_SWF | SYPCR_SWP) |
||||||
|
#endif |
||||||
|
|
||||||
|
/*-----------------------------------------------------------------------
|
||||||
|
* SIUMCR - SIU Module Configuration 11-6 |
||||||
|
*----------------------------------------------------------------------- |
||||||
|
* PCMCIA config., multi-function pin tri-state |
||||||
|
*/ |
||||||
|
#define CFG_SIUMCR (SIUMCR_MLRC10) |
||||||
|
|
||||||
|
/*-----------------------------------------------------------------------
|
||||||
|
* TBSCR - Time Base Status and Control 11-26 |
||||||
|
*----------------------------------------------------------------------- |
||||||
|
* Clear Reference Interrupt Status, Timebase freezing enabled |
||||||
|
*/ |
||||||
|
#define CFG_TBSCR (TBSCR_REFA | TBSCR_REFB | TBSCR_TBF | TBSCR_TBE) |
||||||
|
|
||||||
|
/*-----------------------------------------------------------------------
|
||||||
|
* RTCSC - Real-Time Clock Status and Control Register 11-27 |
||||||
|
*----------------------------------------------------------------------- |
||||||
|
*/ |
||||||
|
/*%%%#define CFG_RTCSC (RTCSC_SEC | RTCSC_ALR | RTCSC_RTF| RTCSC_RTE) */ |
||||||
|
#define CFG_RTCSC (RTCSC_SEC | RTCSC_RTE) |
||||||
|
|
||||||
|
/*-----------------------------------------------------------------------
|
||||||
|
* PISCR - Periodic Interrupt Status and Control 11-31 |
||||||
|
*----------------------------------------------------------------------- |
||||||
|
* Clear Periodic Interrupt Status, Interrupt Timer freezing enabled |
||||||
|
*/ |
||||||
|
#define CFG_PISCR (PISCR_PS | PISCR_PITF) |
||||||
|
|
||||||
|
/*-----------------------------------------------------------------------
|
||||||
|
* PLPRCR - PLL, Low-Power, and Reset Control Register 15-30 |
||||||
|
*----------------------------------------------------------------------- |
||||||
|
* Reset PLL lock status sticky bit, timer expired status bit and timer |
||||||
|
* interrupt status bit |
||||||
|
* |
||||||
|
* If this is a 80 MHz CPU, set PLL multiplication factor to 5 (5*16=80)! |
||||||
|
*/ |
||||||
|
/* up to 50 MHz we use a 1:1 clock */ |
||||||
|
#define CFG_PLPRCR ( (5 << PLPRCR_MF_SHIFT) | PLPRCR_TEXPS ) |
||||||
|
|
||||||
|
/*-----------------------------------------------------------------------
|
||||||
|
* SCCR - System Clock and reset Control Register 15-27 |
||||||
|
*----------------------------------------------------------------------- |
||||||
|
* Set clock output, timebase and RTC source and divider, |
||||||
|
* power management and some other internal clocks |
||||||
|
*/ |
||||||
|
#define SCCR_MASK SCCR_EBDF00 |
||||||
|
/* up to 50 MHz we use a 1:1 clock */ |
||||||
|
#define CFG_SCCR (SCCR_COM00 | SCCR_TBS) |
||||||
|
|
||||||
|
/*-----------------------------------------------------------------------
|
||||||
|
* PCMCIA stuff |
||||||
|
*----------------------------------------------------------------------- |
||||||
|
* |
||||||
|
*/ |
||||||
|
#define CFG_PCMCIA_MEM_ADDR (0xE0000000) |
||||||
|
#define CFG_PCMCIA_MEM_SIZE ( 64 << 20 ) |
||||||
|
#define CFG_PCMCIA_DMA_ADDR (0xE4000000) |
||||||
|
#define CFG_PCMCIA_DMA_SIZE ( 64 << 20 ) |
||||||
|
#define CFG_PCMCIA_ATTRB_ADDR (0xE8000000) |
||||||
|
#define CFG_PCMCIA_ATTRB_SIZE ( 64 << 20 ) |
||||||
|
#define CFG_PCMCIA_IO_ADDR (0xEC000000) |
||||||
|
#define CFG_PCMCIA_IO_SIZE ( 64 << 20 ) |
||||||
|
|
||||||
|
/*-----------------------------------------------------------------------
|
||||||
|
* IDE/ATA stuff (Supports IDE harddisk on PCMCIA Adapter) |
||||||
|
*----------------------------------------------------------------------- |
||||||
|
*/ |
||||||
|
|
||||||
|
#define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */ |
||||||
|
|
||||||
|
#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ |
||||||
|
#undef CONFIG_IDE_LED /* LED for ide not supported */ |
||||||
|
#undef CONFIG_IDE_RESET /* reset for ide not supported */ |
||||||
|
|
||||||
|
#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */ |
||||||
|
#define CFG_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */ |
||||||
|
|
||||||
|
#define CFG_ATA_IDE0_OFFSET 0x0000 |
||||||
|
|
||||||
|
#define CFG_ATA_BASE_ADDR CFG_PCMCIA_MEM_ADDR |
||||||
|
|
||||||
|
/* Offset for data I/O */ |
||||||
|
#define CFG_ATA_DATA_OFFSET (CFG_PCMCIA_MEM_SIZE + 0x320) |
||||||
|
|
||||||
|
/* Offset for normal register accesses */ |
||||||
|
#define CFG_ATA_REG_OFFSET (2 * CFG_PCMCIA_MEM_SIZE + 0x320) |
||||||
|
|
||||||
|
/* Offset for alternate registers */ |
||||||
|
#define CFG_ATA_ALT_OFFSET 0x0100 |
||||||
|
|
||||||
|
/*-----------------------------------------------------------------------
|
||||||
|
* |
||||||
|
*----------------------------------------------------------------------- |
||||||
|
* |
||||||
|
*/ |
||||||
|
/*#define CFG_DER 0x2002000F*/ |
||||||
|
#define CFG_DER 0 |
||||||
|
|
||||||
|
/*
|
||||||
|
* Init Memory Controller: |
||||||
|
* |
||||||
|
* BR0 and OR0 (FLASH) |
||||||
|
*/ |
||||||
|
|
||||||
|
#define FLASH_BASE_PRELIM 0xFE000000 /* FLASH base */ |
||||||
|
#define CFG_PRELIM_OR_AM 0xFE000000 /* OR addr mask */ |
||||||
|
|
||||||
|
/* FLASH timing: ACS = 0, TRLX = 0, CSNT = 0, SCY = 4, ETHR = 0, BIH = 1 */ |
||||||
|
#define CFG_OR_TIMING_FLASH (OR_SCY_4_CLK | OR_BI) |
||||||
|
|
||||||
|
#define CFG_OR0_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_FLASH) |
||||||
|
#define CFG_BR0_PRELIM ((FLASH_BASE_PRELIM & BR_BA_MSK) | BR_V) |
||||||
|
|
||||||
|
/*
|
||||||
|
* BR1 and OR1 (SDRAM) |
||||||
|
* |
||||||
|
*/ |
||||||
|
#define SDRAM_BASE_PRELIM 0x00000000 /* SDRAM base */ |
||||||
|
#define SDRAM_MAX_SIZE 0x01000000 /* max 16 MB */ |
||||||
|
|
||||||
|
/* SDRAM timing: Multiplexed addresses, GPL5 output to GPL5_A (don't care) */ |
||||||
|
#define CFG_OR_TIMING_SDRAM 0x00000E00 |
||||||
|
|
||||||
|
#define CFG_OR1_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_SDRAM ) |
||||||
|
#define CFG_BR1_PRELIM ((SDRAM_BASE_PRELIM & BR_BA_MSK) | BR_MS_UPMA | BR_V ) |
||||||
|
|
||||||
|
/* RPXLITE mem setting */ |
||||||
|
#define CFG_BR3_PRELIM 0xFA400001 /* BCSR */ |
||||||
|
#define CFG_OR3_PRELIM 0xFFFF8910 |
||||||
|
#define CFG_BR4_PRELIM 0xFA000401 /* NVRAM&SRAM */ |
||||||
|
#define CFG_OR4_PRELIM 0xFFFE0970 |
||||||
|
|
||||||
|
/*
|
||||||
|
* Memory Periodic Timer Prescaler |
||||||
|
*/ |
||||||
|
|
||||||
|
/* periodic timer for refresh */ |
||||||
|
#define CFG_MAMR_PTA 20 |
||||||
|
|
||||||
|
/*
|
||||||
|
* Refresh clock Prescalar |
||||||
|
*/ |
||||||
|
#define CFG_MPTPR MPTPR_PTP_DIV2 |
||||||
|
|
||||||
|
/*
|
||||||
|
* MAMR settings for SDRAM |
||||||
|
*/ |
||||||
|
|
||||||
|
/* 10 column SDRAM */ |
||||||
|
#define CFG_MAMR_10COL ((CFG_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \ |
||||||
|
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
|
||||||
|
MAMR_RLFA_16X | MAMR_WLFA_16X | MAMR_TLFA_16X) |
||||||
|
|
||||||
|
/*
|
||||||
|
* Internal Definitions |
||||||
|
* |
||||||
|
* Boot Flags |
||||||
|
*/ |
||||||
|
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ |
||||||
|
#define BOOTFLAG_WARM 0x02 /* Software reboot */ |
||||||
|
|
||||||
|
/*
|
||||||
|
* BCSRx |
||||||
|
* |
||||||
|
* Board Status and Control Registers |
||||||
|
* |
||||||
|
*/ |
||||||
|
|
||||||
|
#define BCSR0 0xFA400000 |
||||||
|
#define BCSR1 0xFA400001 |
||||||
|
#define BCSR2 0xFA400002 |
||||||
|
#define BCSR3 0xFA400003 |
||||||
|
|
||||||
|
#define BCSR0_ENMONXCVR 0x01 /* Monitor XVCR Control */ |
||||||
|
#define BCSR0_ENNVRAM 0x02 /* CS4# Control */ |
||||||
|
#define BCSR0_LED5 0x04 /* LED5 control 0='on' 1='off' */ |
||||||
|
#define BCSR0_LED4 0x08 /* LED4 control 0='on' 1='off' */ |
||||||
|
#define BCSR0_FULLDPLX 0x10 /* Ethernet XCVR Control */ |
||||||
|
#define BCSR0_COLTEST 0x20 |
||||||
|
#define BCSR0_ETHLPBK 0x40 |
||||||
|
#define BCSR0_ETHEN 0x80 |
||||||
|
|
||||||
|
#define BCSR1_PCVCTL7 0x01 /* PC Slot B Control */ |
||||||
|
#define BCSR1_PCVCTL6 0x02 |
||||||
|
#define BCSR1_PCVCTL5 0x04 |
||||||
|
#define BCSR1_PCVCTL4 0x08 |
||||||
|
#define BCSR1_IPB5SEL 0x10 |
||||||
|
|
||||||
|
#define BCSR2_ENPA5HDR 0x08 /* USB Control */ |
||||||
|
#define BCSR2_ENUSBCLK 0x10 |
||||||
|
#define BCSR2_USBPWREN 0x20 |
||||||
|
#define BCSR2_USBSPD 0x40 |
||||||
|
#define BCSR2_USBSUSP 0x80 |
||||||
|
|
||||||
|
#define BCSR3_BWRTC 0x01 /* Real Time Clock Battery */ |
||||||
|
#define BCSR3_BWNVR 0x02 /* NVRAM Battery */ |
||||||
|
#define BCSR3_RDY_BSY 0x04 /* Flash Operation */ |
||||||
|
#define BCSR3_RPXL 0x08 /* Reserved (reads back '1') */ |
||||||
|
#define BCSR3_D27 0x10 /* Dip Switch settings */ |
||||||
|
#define BCSR3_D26 0x20 |
||||||
|
#define BCSR3_D25 0x40 |
||||||
|
#define BCSR3_D24 0x80 |
||||||
|
|
||||||
|
#endif /* __CONFIG_H */ |
@ -1,120 +0,0 @@ |
|||||||
/*
|
|
||||||
* (C) Copyright 2000 |
|
||||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
|
||||||
* |
|
||||||
* See file CREDITS for list of people who contributed to this |
|
||||||
* project. |
|
||||||
* |
|
||||||
* This program is free software; you can redistribute it and/or |
|
||||||
* modify it under the terms of the GNU General Public License as |
|
||||||
* published by the Free Software Foundation; either version 2 of |
|
||||||
* the License, or (at your option) any later version. |
|
||||||
* |
|
||||||
* This program is distributed in the hope that it will be useful, |
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
||||||
* GNU General Public License for more details. |
|
||||||
* |
|
||||||
* You should have received a copy of the GNU General Public License |
|
||||||
* along with this program; if not, write to the Free Software |
|
||||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
|
||||||
* MA 02111-1307 USA |
|
||||||
*/ |
|
||||||
|
|
||||||
#include <common.h> |
|
||||||
#include <command.h> |
|
||||||
#include <net.h> |
|
||||||
#include "bootp.h" |
|
||||||
#include "tftp.h" |
|
||||||
#include "arp.h" |
|
||||||
|
|
||||||
#if (CONFIG_COMMANDS & CFG_CMD_NET) |
|
||||||
|
|
||||||
#define TIMEOUT 5 /* Seconds before trying ARP again */ |
|
||||||
#ifndef CONFIG_NET_RETRY_COUNT |
|
||||||
# define TIMEOUT_COUNT 5 /* # of timeouts before giving up */ |
|
||||||
#else |
|
||||||
# define TIMEOUT_COUNT (CONFIG_NET_RETRY_COUNT) |
|
||||||
#endif |
|
||||||
|
|
||||||
static void ArpHandler(uchar *pkt, unsigned dest, unsigned src, unsigned len); |
|
||||||
static void ArpTimeout(void); |
|
||||||
|
|
||||||
int ArpTry = 0; |
|
||||||
|
|
||||||
/*
|
|
||||||
* Handle a ARP received packet. |
|
||||||
*/ |
|
||||||
static void |
|
||||||
ArpHandler(uchar *pkt, unsigned dest, unsigned src, unsigned len) |
|
||||||
{ |
|
||||||
/* Check if the frame is really an ARP reply */ |
|
||||||
if (memcmp (NetServerEther, NetBcastAddr, 6) != 0) { |
|
||||||
#ifdef DEBUG |
|
||||||
printf("Got good ARP - start TFTP\n"); |
|
||||||
#endif |
|
||||||
TftpStart (); |
|
||||||
} |
|
||||||
} |
|
||||||
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Timeout on ARP request. |
|
||||||
*/ |
|
||||||
static void |
|
||||||
ArpTimeout(void) |
|
||||||
{ |
|
||||||
if (ArpTry >= TIMEOUT_COUNT) { |
|
||||||
puts ("\nRetry count exceeded; starting again\n"); |
|
||||||
NetStartAgain (); |
|
||||||
} else { |
|
||||||
NetSetTimeout (TIMEOUT * CFG_HZ, ArpTimeout); |
|
||||||
ArpRequest (); |
|
||||||
} |
|
||||||
} |
|
||||||
|
|
||||||
|
|
||||||
void |
|
||||||
ArpRequest (void) |
|
||||||
{ |
|
||||||
int i; |
|
||||||
volatile uchar *pkt; |
|
||||||
ARP_t * arp; |
|
||||||
|
|
||||||
printf("ARP broadcast %d\n", ++ArpTry); |
|
||||||
pkt = NetTxPacket; |
|
||||||
|
|
||||||
NetSetEther(pkt, NetBcastAddr, PROT_ARP); |
|
||||||
pkt += ETHER_HDR_SIZE; |
|
||||||
|
|
||||||
arp = (ARP_t *)pkt; |
|
||||||
|
|
||||||
arp->ar_hrd = htons(ARP_ETHER); |
|
||||||
arp->ar_pro = htons(PROT_IP); |
|
||||||
arp->ar_hln = 6; |
|
||||||
arp->ar_pln = 4; |
|
||||||
arp->ar_op = htons(ARPOP_REQUEST); |
|
||||||
|
|
||||||
memcpy (&arp->ar_data[0], NetOurEther, 6); /* source ET addr */ |
|
||||||
NetWriteIP((uchar*)&arp->ar_data[6], NetOurIP); /* source IP addr */ |
|
||||||
for (i=10; i<16; ++i) { |
|
||||||
arp->ar_data[i] = 0; /* dest ET addr = 0 */ |
|
||||||
} |
|
||||||
|
|
||||||
if((NetServerIP & NetOurSubnetMask) != (NetOurIP & NetOurSubnetMask)) { |
|
||||||
if (NetOurGatewayIP == 0) { |
|
||||||
puts ("## Warning: gatewayip needed but not set\n"); |
|
||||||
} |
|
||||||
NetWriteIP((uchar*)&arp->ar_data[16], NetOurGatewayIP); |
|
||||||
} else { |
|
||||||
NetWriteIP((uchar*)&arp->ar_data[16], NetServerIP); |
|
||||||
} |
|
||||||
|
|
||||||
|
|
||||||
NetSendPacket(NetTxPacket, ETHER_HDR_SIZE + ARP_HDR_SIZE); |
|
||||||
|
|
||||||
NetSetTimeout(TIMEOUT * CFG_HZ, ArpTimeout); |
|
||||||
NetSetHandler(ArpHandler); |
|
||||||
} |
|
||||||
|
|
||||||
#endif /* CFG_CMD_NET */ |
|
@ -1,40 +0,0 @@ |
|||||||
/*
|
|
||||||
* (C) Copyright 2000 |
|
||||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
|
||||||
* |
|
||||||
* See file CREDITS for list of people who contributed to this |
|
||||||
* project. |
|
||||||
* |
|
||||||
* This program is free software; you can redistribute it and/or |
|
||||||
* modify it under the terms of the GNU General Public License as |
|
||||||
* published by the Free Software Foundation; either version 2 of |
|
||||||
* the License, or (at your option) any later version. |
|
||||||
* |
|
||||||
* This program is distributed in the hope that it will be useful, |
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
||||||
* GNU General Public License for more details. |
|
||||||
* |
|
||||||
* You should have received a copy of the GNU General Public License |
|
||||||
* along with this program; if not, write to the Free Software |
|
||||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
|
||||||
* MA 02111-1307 USA |
|
||||||
*/ |
|
||||||
|
|
||||||
|
|
||||||
#ifndef __ARP_H__ |
|
||||||
#define __ARP_H__ |
|
||||||
|
|
||||||
/**********************************************************************/ |
|
||||||
/*
|
|
||||||
* Global functions and variables. |
|
||||||
*/ |
|
||||||
|
|
||||||
extern int ArpTry; |
|
||||||
|
|
||||||
extern void ArpRequest (void); /* Send a ARP request */ |
|
||||||
|
|
||||||
/**********************************************************************/ |
|
||||||
|
|
||||||
#endif /* __ARP_H__ */ |
|
||||||
|
|
Loading…
Reference in new issue