Patch by Peter Pearse, 2 Feb 2005master
parent
e2146b6aea
commit
74f4304ee7
@ -0,0 +1,30 @@ |
|||||||
|
/* |
||||||
|
* Memory setup for integratorAP
|
||||||
|
* |
||||||
|
* See file CREDITS for list of people who contributed to this |
||||||
|
* project. |
||||||
|
* |
||||||
|
* This program is free software; you can redistribute it and/or
|
||||||
|
* modify it under the terms of the GNU General Public License as |
||||||
|
* published by the Free Software Foundation; either version 2 of
|
||||||
|
* the License, or (at your option) any later version. |
||||||
|
* |
||||||
|
* This program is distributed in the hope that it will be useful, |
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||||
|
* GNU General Public License for more details. |
||||||
|
* |
||||||
|
* You should have received a copy of the GNU General Public License |
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||||
|
* MA 02111-1307 USA |
||||||
|
*/ |
||||||
|
/* |
||||||
|
* Memory setup |
||||||
|
* - the reset defaults are assumed sufficient |
||||||
|
*/ |
||||||
|
|
||||||
|
.globl memsetup
|
||||||
|
memsetup: |
||||||
|
mov pc,lr |
||||||
|
|
@ -0,0 +1,30 @@ |
|||||||
|
/* |
||||||
|
* Memory setup for integratorAP
|
||||||
|
* |
||||||
|
* See file CREDITS for list of people who contributed to this |
||||||
|
* project. |
||||||
|
* |
||||||
|
* This program is free software; you can redistribute it and/or
|
||||||
|
* modify it under the terms of the GNU General Public License as |
||||||
|
* published by the Free Software Foundation; either version 2 of
|
||||||
|
* the License, or (at your option) any later version. |
||||||
|
* |
||||||
|
* This program is distributed in the hope that it will be useful, |
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||||
|
* GNU General Public License for more details. |
||||||
|
* |
||||||
|
* You should have received a copy of the GNU General Public License |
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||||
|
* MA 02111-1307 USA |
||||||
|
*/ |
||||||
|
/* |
||||||
|
* Memory setup |
||||||
|
* - the reset defaults are assumed sufficient |
||||||
|
*/ |
||||||
|
|
||||||
|
.globl memsetup
|
||||||
|
memsetup: |
||||||
|
mov pc,lr |
||||||
|
|
@ -0,0 +1,44 @@ |
|||||||
|
#
|
||||||
|
# (C) Copyright 2000-2003
|
||||||
|
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||||
|
#
|
||||||
|
# See file CREDITS for list of people who contributed to this
|
||||||
|
# project.
|
||||||
|
#
|
||||||
|
# This program is free software; you can redistribute it and/or
|
||||||
|
# modify it under the terms of the GNU General Public License as
|
||||||
|
# published by the Free Software Foundation; either version 2 of
|
||||||
|
# the License, or (at your option) any later version.
|
||||||
|
#
|
||||||
|
# This program is distributed in the hope that it will be useful,
|
||||||
|
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
# GNU General Public License for more details.
|
||||||
|
#
|
||||||
|
# You should have received a copy of the GNU General Public License
|
||||||
|
# along with this program; if not, write to the Free Software
|
||||||
|
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||||
|
# MA 02111-1307 USA
|
||||||
|
#
|
||||||
|
|
||||||
|
include $(TOPDIR)/config.mk |
||||||
|
|
||||||
|
LIB = lib$(CPU).a
|
||||||
|
|
||||||
|
START = start.o
|
||||||
|
OBJS = interrupts.o cpu.o
|
||||||
|
|
||||||
|
all: .depend $(START) $(LIB) |
||||||
|
|
||||||
|
$(LIB): $(OBJS) |
||||||
|
$(AR) crv $@ $(OBJS)
|
||||||
|
|
||||||
|
#########################################################################
|
||||||
|
|
||||||
|
.depend: Makefile $(START:.o=.S) $(OBJS:.o=.c) |
||||||
|
$(CC) -M $(CFLAGS) $(START:.o=.S) $(OBJS:.o=.c) > $@
|
||||||
|
|
||||||
|
sinclude .depend |
||||||
|
|
||||||
|
#########################################################################
|
||||||
|
|
@ -0,0 +1,27 @@ |
|||||||
|
#
|
||||||
|
# (C) Copyright 2002
|
||||||
|
# Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
|
||||||
|
#
|
||||||
|
# See file CREDITS for list of people who contributed to this
|
||||||
|
# project.
|
||||||
|
#
|
||||||
|
# This program is free software; you can redistribute it and/or
|
||||||
|
# modify it under the terms of the GNU General Public License as
|
||||||
|
# published by the Free Software Foundation; either version 2 of
|
||||||
|
# the License, or (at your option) any later version.
|
||||||
|
#
|
||||||
|
# This program is distributed in the hope that it will be useful,
|
||||||
|
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
# GNU General Public License for more details.
|
||||||
|
#
|
||||||
|
# You should have received a copy of the GNU General Public License
|
||||||
|
# along with this program; if not, write to the Free Software
|
||||||
|
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||||
|
# MA 02111-1307 USA
|
||||||
|
#
|
||||||
|
|
||||||
|
PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -ffixed-r8 \
|
||||||
|
-msoft-float
|
||||||
|
|
||||||
|
PLATFORM_CPPFLAGS += -march=armv4
|
@ -0,0 +1,164 @@ |
|||||||
|
/*
|
||||||
|
* (C) Copyright 2002 |
||||||
|
* Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
||||||
|
* Marius Groeger <mgroeger@sysgo.de> |
||||||
|
* |
||||||
|
* (C) Copyright 2002 |
||||||
|
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de> |
||||||
|
* |
||||||
|
* See file CREDITS for list of people who contributed to this |
||||||
|
* project. |
||||||
|
* |
||||||
|
* This program is free software; you can redistribute it and/or |
||||||
|
* modify it under the terms of the GNU General Public License as |
||||||
|
* published by the Free Software Foundation; either version 2 of |
||||||
|
* the License, or (at your option) any later version. |
||||||
|
* |
||||||
|
* This program is distributed in the hope that it will be useful, |
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||||
|
* GNU General Public License for more details. |
||||||
|
* |
||||||
|
* You should have received a copy of the GNU General Public License |
||||||
|
* along with this program; if not, write to the Free Software |
||||||
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||||
|
* MA 02111-1307 USA |
||||||
|
*/ |
||||||
|
|
||||||
|
/*
|
||||||
|
* CPU specific code |
||||||
|
*/ |
||||||
|
|
||||||
|
#include <common.h> |
||||||
|
#include <command.h> |
||||||
|
#include <arm946es.h> |
||||||
|
|
||||||
|
/* read co-processor 15, register #1 (control register) */ |
||||||
|
static unsigned long read_p15_c1 (void) |
||||||
|
{ |
||||||
|
unsigned long value; |
||||||
|
|
||||||
|
__asm__ __volatile__( |
||||||
|
"mrc p15, 0, %0, c1, c0, 0 @ read control reg\n" |
||||||
|
: "=r" (value) |
||||||
|
: |
||||||
|
: "memory"); |
||||||
|
|
||||||
|
#ifdef MMU_DEBUG |
||||||
|
printf ("p15/c1 is = %08lx\n", value); |
||||||
|
#endif |
||||||
|
return value; |
||||||
|
} |
||||||
|
|
||||||
|
/* write to co-processor 15, register #1 (control register) */ |
||||||
|
static void write_p15_c1 (unsigned long value) |
||||||
|
{ |
||||||
|
#ifdef MMU_DEBUG |
||||||
|
printf ("write %08lx to p15/c1\n", value); |
||||||
|
#endif |
||||||
|
__asm__ __volatile__( |
||||||
|
"mcr p15, 0, %0, c1, c0, 0 @ write it back\n" |
||||||
|
: |
||||||
|
: "r" (value) |
||||||
|
: "memory"); |
||||||
|
|
||||||
|
read_p15_c1 (); |
||||||
|
} |
||||||
|
|
||||||
|
static void cp_delay (void) |
||||||
|
{ |
||||||
|
volatile int i; |
||||||
|
|
||||||
|
/* copro seems to need some delay between reading and writing */ |
||||||
|
for (i = 0; i < 100; i++); |
||||||
|
} |
||||||
|
|
||||||
|
/* See also ARM946E-S Technical Reference Manual */ |
||||||
|
#define C1_MMU (1<<0) /* mmu off/on */ |
||||||
|
#define C1_ALIGN (1<<1) /* alignment faults off/on */ |
||||||
|
#define C1_DC (1<<2) /* dcache off/on */ |
||||||
|
|
||||||
|
#define C1_BIG_ENDIAN (1<<7) /* big endian off/on */ |
||||||
|
#define C1_SYS_PROT (1<<8) /* system protection */ |
||||||
|
#define C1_ROM_PROT (1<<9) /* ROM protection */ |
||||||
|
#define C1_IC (1<<12) /* icache off/on */ |
||||||
|
#define C1_HIGH_VECTORS (1<<13) /* location of vectors: low/high addresses */ |
||||||
|
|
||||||
|
|
||||||
|
int cpu_init (void) |
||||||
|
{ |
||||||
|
/*
|
||||||
|
* setup up stacks if necessary |
||||||
|
*/ |
||||||
|
#ifdef CONFIG_USE_IRQ |
||||||
|
DECLARE_GLOBAL_DATA_PTR; |
||||||
|
|
||||||
|
IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4; |
||||||
|
FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ; |
||||||
|
#endif |
||||||
|
return 0; |
||||||
|
} |
||||||
|
|
||||||
|
int cleanup_before_linux (void) |
||||||
|
{ |
||||||
|
/*
|
||||||
|
* this function is called just before we call linux |
||||||
|
* it prepares the processor for linux |
||||||
|
* |
||||||
|
* we turn off caches etc ... |
||||||
|
*/ |
||||||
|
|
||||||
|
unsigned long i; |
||||||
|
|
||||||
|
disable_interrupts (); |
||||||
|
|
||||||
|
/* ARM926E-S needs the protection unit enabled for the icache to have
|
||||||
|
* been enabled - left for possible later use |
||||||
|
* should turn off the protection unit as well.... |
||||||
|
*/ |
||||||
|
/* turn off I/D-cache */ |
||||||
|
asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i)); |
||||||
|
i &= ~(C1_DC | C1_IC); |
||||||
|
asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i)); |
||||||
|
|
||||||
|
/* flush I/D-cache */ |
||||||
|
i = 0; |
||||||
|
asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i)); |
||||||
|
asm ("mcr p15, 0, %0, c7, c6, 0": :"r" (i)); |
||||||
|
return (0); |
||||||
|
} |
||||||
|
|
||||||
|
int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
||||||
|
{ |
||||||
|
extern void reset_cpu (ulong addr); |
||||||
|
|
||||||
|
disable_interrupts (); |
||||||
|
reset_cpu (0); |
||||||
|
/*NOTREACHED*/ |
||||||
|
return (0); |
||||||
|
} |
||||||
|
/* ARM926E-S needs the protection unit enabled for this to have any effect
|
||||||
|
- left for possible later use */ |
||||||
|
void icache_enable (void) |
||||||
|
{ |
||||||
|
ulong reg; |
||||||
|
|
||||||
|
reg = read_p15_c1 (); /* get control reg. */ |
||||||
|
cp_delay (); |
||||||
|
write_p15_c1 (reg | C1_IC); |
||||||
|
} |
||||||
|
|
||||||
|
void icache_disable (void) |
||||||
|
{ |
||||||
|
ulong reg; |
||||||
|
|
||||||
|
reg = read_p15_c1 (); |
||||||
|
cp_delay (); |
||||||
|
write_p15_c1 (reg & ~C1_IC); |
||||||
|
} |
||||||
|
|
||||||
|
int icache_status (void) |
||||||
|
{ |
||||||
|
return (read_p15_c1 () & C1_IC) != 0; |
||||||
|
} |
||||||
|
|
@ -0,0 +1,292 @@ |
|||||||
|
/*
|
||||||
|
* (C) Copyright 2003 |
||||||
|
* Texas Instruments <www.ti.com> |
||||||
|
* |
||||||
|
* (C) Copyright 2002 |
||||||
|
* Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
||||||
|
* Marius Groeger <mgroeger@sysgo.de> |
||||||
|
* |
||||||
|
* (C) Copyright 2002 |
||||||
|
* Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
||||||
|
* Alex Zuepke <azu@sysgo.de> |
||||||
|
* |
||||||
|
* (C) Copyright 2002-2004 |
||||||
|
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de> |
||||||
|
* |
||||||
|
* (C) Copyright 2004 |
||||||
|
* Philippe Robin, ARM Ltd. <philippe.robin@arm.com> |
||||||
|
* |
||||||
|
* See file CREDITS for list of people who contributed to this |
||||||
|
* project. |
||||||
|
* |
||||||
|
* This program is free software; you can redistribute it and/or |
||||||
|
* modify it under the terms of the GNU General Public License as |
||||||
|
* published by the Free Software Foundation; either version 2 of |
||||||
|
* the License, or (at your option) any later version. |
||||||
|
* |
||||||
|
* This program is distributed in the hope that it will be useful, |
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||||
|
* GNU General Public License for more details. |
||||||
|
* |
||||||
|
* You should have received a copy of the GNU General Public License |
||||||
|
* along with this program; if not, write to the Free Software |
||||||
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||||
|
* MA 02111-1307 USA |
||||||
|
*/ |
||||||
|
|
||||||
|
#include <common.h> |
||||||
|
#include <arm946es.h> |
||||||
|
#include <asm/proc-armv/ptrace.h> |
||||||
|
|
||||||
|
#define TIMER_LOAD_VAL 0xffffffff |
||||||
|
extern void reset_cpu(ulong addr); |
||||||
|
|
||||||
|
#ifdef CONFIG_USE_IRQ |
||||||
|
/* enable IRQ interrupts */ |
||||||
|
void enable_interrupts (void) |
||||||
|
{ |
||||||
|
unsigned long temp; |
||||||
|
__asm__ __volatile__("mrs %0, cpsr\n" |
||||||
|
"bic %0, %0, #0x80\n" |
||||||
|
"msr cpsr_c, %0" |
||||||
|
: "=r" (temp) |
||||||
|
: |
||||||
|
: "memory"); |
||||||
|
} |
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* disable IRQ/FIQ interrupts |
||||||
|
* returns true if interrupts had been enabled before we disabled them |
||||||
|
*/ |
||||||
|
int disable_interrupts (void) |
||||||
|
{ |
||||||
|
unsigned long old,temp; |
||||||
|
__asm__ __volatile__("mrs %0, cpsr\n" |
||||||
|
"orr %1, %0, #0xc0\n" |
||||||
|
"msr cpsr_c, %1" |
||||||
|
: "=r" (old), "=r" (temp) |
||||||
|
: |
||||||
|
: "memory"); |
||||||
|
return (old & 0x80) == 0; |
||||||
|
} |
||||||
|
#else |
||||||
|
void enable_interrupts (void) |
||||||
|
{ |
||||||
|
return; |
||||||
|
} |
||||||
|
int disable_interrupts (void) |
||||||
|
{ |
||||||
|
return 0; |
||||||
|
} |
||||||
|
#endif |
||||||
|
|
||||||
|
|
||||||
|
void bad_mode (void) |
||||||
|
{ |
||||||
|
panic ("Resetting CPU ...\n"); |
||||||
|
reset_cpu (0); |
||||||
|
} |
||||||
|
|
||||||
|
void show_regs (struct pt_regs *regs) |
||||||
|
{ |
||||||
|
unsigned long flags; |
||||||
|
const char *processor_modes[] = { |
||||||
|
"USER_26", "FIQ_26", "IRQ_26", "SVC_26", |
||||||
|
"UK4_26", "UK5_26", "UK6_26", "UK7_26", |
||||||
|
"UK8_26", "UK9_26", "UK10_26", "UK11_26", |
||||||
|
"UK12_26", "UK13_26", "UK14_26", "UK15_26", |
||||||
|
"USER_32", "FIQ_32", "IRQ_32", "SVC_32", |
||||||
|
"UK4_32", "UK5_32", "UK6_32", "ABT_32", |
||||||
|
"UK8_32", "UK9_32", "UK10_32", "UND_32", |
||||||
|
"UK12_32", "UK13_32", "UK14_32", "SYS_32", |
||||||
|
}; |
||||||
|
|
||||||
|
flags = condition_codes (regs); |
||||||
|
|
||||||
|
printf ("pc : [<%08lx>] lr : [<%08lx>]\n" |
||||||
|
"sp : %08lx ip : %08lx fp : %08lx\n", |
||||||
|
instruction_pointer (regs), |
||||||
|
regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp); |
||||||
|
printf ("r10: %08lx r9 : %08lx r8 : %08lx\n", |
||||||
|
regs->ARM_r10, regs->ARM_r9, regs->ARM_r8); |
||||||
|
printf ("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n", |
||||||
|
regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4); |
||||||
|
printf ("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n", |
||||||
|
regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0); |
||||||
|
printf ("Flags: %c%c%c%c", |
||||||
|
flags & CC_N_BIT ? 'N' : 'n', |
||||||
|
flags & CC_Z_BIT ? 'Z' : 'z', |
||||||
|
flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v'); |
||||||
|
printf (" IRQs %s FIQs %s Mode %s%s\n", |
||||||
|
interrupts_enabled (regs) ? "on" : "off", |
||||||
|
fast_interrupts_enabled (regs) ? "on" : "off", |
||||||
|
processor_modes[processor_mode (regs)], |
||||||
|
thumb_mode (regs) ? " (T)" : ""); |
||||||
|
} |
||||||
|
|
||||||
|
void do_undefined_instruction (struct pt_regs *pt_regs) |
||||||
|
{ |
||||||
|
printf ("undefined instruction\n"); |
||||||
|
show_regs (pt_regs); |
||||||
|
bad_mode (); |
||||||
|
} |
||||||
|
|
||||||
|
void do_software_interrupt (struct pt_regs *pt_regs) |
||||||
|
{ |
||||||
|
printf ("software interrupt\n"); |
||||||
|
show_regs (pt_regs); |
||||||
|
bad_mode (); |
||||||
|
} |
||||||
|
|
||||||
|
void do_prefetch_abort (struct pt_regs *pt_regs) |
||||||
|
{ |
||||||
|
printf ("prefetch abort\n"); |
||||||
|
show_regs (pt_regs); |
||||||
|
bad_mode (); |
||||||
|
} |
||||||
|
|
||||||
|
void do_data_abort (struct pt_regs *pt_regs) |
||||||
|
{ |
||||||
|
printf ("data abort\n"); |
||||||
|
show_regs (pt_regs); |
||||||
|
bad_mode (); |
||||||
|
} |
||||||
|
|
||||||
|
void do_not_used (struct pt_regs *pt_regs) |
||||||
|
{ |
||||||
|
printf ("not used\n"); |
||||||
|
show_regs (pt_regs); |
||||||
|
bad_mode (); |
||||||
|
} |
||||||
|
|
||||||
|
void do_fiq (struct pt_regs *pt_regs) |
||||||
|
{ |
||||||
|
printf ("fast interrupt request\n"); |
||||||
|
show_regs (pt_regs); |
||||||
|
bad_mode (); |
||||||
|
} |
||||||
|
|
||||||
|
void do_irq (struct pt_regs *pt_regs) |
||||||
|
{ |
||||||
|
printf ("interrupt request\n"); |
||||||
|
show_regs (pt_regs); |
||||||
|
bad_mode (); |
||||||
|
} |
||||||
|
|
||||||
|
#ifdef CONFIG_INTEGRATOR |
||||||
|
/* Timer functionality supplied by Integrator board (AP or CP) */ |
||||||
|
#else |
||||||
|
|
||||||
|
static ulong timestamp; |
||||||
|
static ulong lastdec; |
||||||
|
|
||||||
|
/* nothing really to do with interrupts, just starts up a counter. */ |
||||||
|
int interrupt_init (void) |
||||||
|
{ |
||||||
|
/* init the timestamp and lastdec value */ |
||||||
|
reset_timer_masked(); |
||||||
|
|
||||||
|
return (0); |
||||||
|
} |
||||||
|
|
||||||
|
/*
|
||||||
|
* timer without interrupts |
||||||
|
*/ |
||||||
|
|
||||||
|
void reset_timer (void) |
||||||
|
{ |
||||||
|
reset_timer_masked (); |
||||||
|
} |
||||||
|
|
||||||
|
ulong get_timer (ulong base) |
||||||
|
{ |
||||||
|
return get_timer_masked () - base; |
||||||
|
} |
||||||
|
|
||||||
|
void set_timer (ulong t) |
||||||
|
{ |
||||||
|
timestamp = t; |
||||||
|
} |
||||||
|
|
||||||
|
/* delay x useconds AND perserve advance timstamp value */ |
||||||
|
void udelay(unsigned long usec) |
||||||
|
{ |
||||||
|
udelay_masked(usec); |
||||||
|
} |
||||||
|
|
||||||
|
void reset_timer_masked (void) |
||||||
|
{ |
||||||
|
/* reset time */ |
||||||
|
lastdec = READ_TIMER; /* capure current decrementer value time */ |
||||||
|
timestamp = 0; /* start "advancing" time stamp from 0 */ |
||||||
|
} |
||||||
|
|
||||||
|
ulong get_timer_raw (void) |
||||||
|
{ |
||||||
|
ulong now = READ_TIMER; /* current tick value */ |
||||||
|
|
||||||
|
if (lastdec >= now) { /* normal mode (non roll) */ |
||||||
|
/* normal mode */ |
||||||
|
timestamp += lastdec - now; /* move stamp fordward with absoulte diff ticks */ |
||||||
|
} else { /* we have overflow of the count down timer */ |
||||||
|
/* nts = ts + ld + (TLV - now)
|
||||||
|
* ts=old stamp, ld=time that passed before passing through -1 |
||||||
|
* (TLV-now) amount of time after passing though -1 |
||||||
|
* nts = new "advancing time stamp"...it could also roll and cause problems. |
||||||
|
*/ |
||||||
|
timestamp += lastdec + TIMER_LOAD_VAL - now; |
||||||
|
} |
||||||
|
lastdec = now; |
||||||
|
|
||||||
|
return timestamp; |
||||||
|
} |
||||||
|
|
||||||
|
ulong get_timer_masked (void) |
||||||
|
{ |
||||||
|
return get_timer_raw() / TIMER_LOAD_VAL; |
||||||
|
} |
||||||
|
|
||||||
|
/* waits specified delay value and resets timestamp */ |
||||||
|
void udelay_masked (unsigned long usec) |
||||||
|
{ |
||||||
|
ulong tmo; |
||||||
|
|
||||||
|
if(usec >= 1000){ /* if "big" number, spread normalization to seconds */ |
||||||
|
tmo = usec / 1000; /* start to normalize for usec to ticks per sec */ |
||||||
|
tmo *= CFG_HZ_CLOCK; /* find number of "ticks" to wait to achieve target */ |
||||||
|
tmo /= 1000; /* finish normalize. */ |
||||||
|
}else{ /* else small number, don't kill it prior to HZ multiply */ |
||||||
|
tmo = usec * CFG_HZ_CLOCK; |
||||||
|
tmo /= (1000*1000); |
||||||
|
} |
||||||
|
|
||||||
|
reset_timer_masked (); /* set "advancing" timestamp to 0, set lastdec vaule */ |
||||||
|
|
||||||
|
while (get_timer_raw () < tmo) /* wait for time stamp to overtake tick number.*/ |
||||||
|
/*NOP*/; |
||||||
|
} |
||||||
|
|
||||||
|
/*
|
||||||
|
* This function is derived from PowerPC code (read timebase as long long). |
||||||
|
* On ARM it just returns the timer value. |
||||||
|
*/ |
||||||
|
unsigned long long get_ticks(void) |
||||||
|
{ |
||||||
|
return get_timer(0); |
||||||
|
} |
||||||
|
|
||||||
|
/*
|
||||||
|
* This function is derived from PowerPC code (timebase clock frequency). |
||||||
|
* On ARM it returns the number of timer ticks per second. |
||||||
|
*/ |
||||||
|
ulong get_tbclk (void) |
||||||
|
{ |
||||||
|
ulong tbclk; |
||||||
|
|
||||||
|
tbclk = CFG_HZ; |
||||||
|
return tbclk; |
||||||
|
} |
||||||
|
|
||||||
|
#endif /* CONFIG_INTEGRATOR */ |
@ -0,0 +1,409 @@ |
|||||||
|
/* |
||||||
|
* armboot - Startup Code for ARM926EJS CPU-core |
||||||
|
* |
||||||
|
* Copyright (c) 2003 Texas Instruments |
||||||
|
* |
||||||
|
* ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------ |
||||||
|
* |
||||||
|
* Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
|
||||||
|
* Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
|
||||||
|
* Copyright (c) 2002 Gary Jennejohn <gj@denx.de>
|
||||||
|
* Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
|
||||||
|
* Copyright (c) 2003 Kshitij <kshitij@ti.com>
|
||||||
|
* |
||||||
|
* See file CREDITS for list of people who contributed to this |
||||||
|
* project. |
||||||
|
* |
||||||
|
* This program is free software; you can redistribute it and/or
|
||||||
|
* modify it under the terms of the GNU General Public License as |
||||||
|
* published by the Free Software Foundation; either version 2 of
|
||||||
|
* the License, or (at your option) any later version. |
||||||
|
* |
||||||
|
* This program is distributed in the hope that it will be useful, |
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||||
|
* GNU General Public License for more details. |
||||||
|
* |
||||||
|
* You should have received a copy of the GNU General Public License |
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||||
|
* MA 02111-1307 USA |
||||||
|
*/ |
||||||
|
|
||||||
|
|
||||||
|
#include <config.h> |
||||||
|
#include <version.h> |
||||||
|
|
||||||
|
/* |
||||||
|
************************************************************************* |
||||||
|
* |
||||||
|
* Jump vector table as in table 3.1 in [1] |
||||||
|
* |
||||||
|
************************************************************************* |
||||||
|
*/ |
||||||
|
|
||||||
|
|
||||||
|
.globl _start
|
||||||
|
_start: |
||||||
|
b reset |
||||||
|
ldr pc, _undefined_instruction |
||||||
|
ldr pc, _software_interrupt |
||||||
|
ldr pc, _prefetch_abort |
||||||
|
ldr pc, _data_abort |
||||||
|
ldr pc, _not_used |
||||||
|
ldr pc, _irq |
||||||
|
ldr pc, _fiq |
||||||
|
|
||||||
|
_undefined_instruction: |
||||||
|
.word undefined_instruction
|
||||||
|
_software_interrupt: |
||||||
|
.word software_interrupt
|
||||||
|
_prefetch_abort: |
||||||
|
.word prefetch_abort
|
||||||
|
_data_abort: |
||||||
|
.word data_abort
|
||||||
|
_not_used: |
||||||
|
.word not_used
|
||||||
|
_irq: |
||||||
|
.word irq
|
||||||
|
_fiq: |
||||||
|
.word fiq
|
||||||
|
|
||||||
|
.balignl 16,0xdeadbeef |
||||||
|
|
||||||
|
|
||||||
|
/* |
||||||
|
************************************************************************* |
||||||
|
* |
||||||
|
* Startup Code (reset vector) |
||||||
|
* |
||||||
|
* do important init only if we don't start from memory! |
||||||
|
* setup Memory and board specific bits prior to relocation. |
||||||
|
* relocate armboot to ram |
||||||
|
* setup stack |
||||||
|
* |
||||||
|
************************************************************************* |
||||||
|
*/ |
||||||
|
|
||||||
|
_TEXT_BASE: |
||||||
|
.word TEXT_BASE
|
||||||
|
|
||||||
|
.globl _armboot_start
|
||||||
|
_armboot_start: |
||||||
|
.word _start
|
||||||
|
|
||||||
|
/* |
||||||
|
* These are defined in the board-specific linker script. |
||||||
|
*/ |
||||||
|
.globl _bss_start
|
||||||
|
_bss_start: |
||||||
|
.word __bss_start
|
||||||
|
|
||||||
|
.globl _bss_end
|
||||||
|
_bss_end: |
||||||
|
.word _end
|
||||||
|
|
||||||
|
#ifdef CONFIG_USE_IRQ |
||||||
|
/* IRQ stack memory (calculated at run-time) */ |
||||||
|
.globl IRQ_STACK_START
|
||||||
|
IRQ_STACK_START: |
||||||
|
.word 0x0badc0de
|
||||||
|
|
||||||
|
/* IRQ stack memory (calculated at run-time) */ |
||||||
|
.globl FIQ_STACK_START
|
||||||
|
FIQ_STACK_START: |
||||||
|
.word 0x0badc0de
|
||||||
|
#endif |
||||||
|
|
||||||
|
|
||||||
|
/* |
||||||
|
* the actual reset code |
||||||
|
*/ |
||||||
|
|
||||||
|
reset: |
||||||
|
/* |
||||||
|
* set the cpu to SVC32 mode |
||||||
|
*/ |
||||||
|
mrs r0,cpsr |
||||||
|
bic r0,r0,#0x1f |
||||||
|
orr r0,r0,#0xd3 |
||||||
|
msr cpsr,r0 |
||||||
|
|
||||||
|
/* |
||||||
|
* we do sys-critical inits only at reboot, |
||||||
|
* not when booting from ram! |
||||||
|
*/ |
||||||
|
#ifdef CONFIG_INIT_CRITICAL |
||||||
|
bl cpu_init_crit |
||||||
|
#endif |
||||||
|
|
||||||
|
relocate: /* relocate U-Boot to RAM */ |
||||||
|
adr r0, _start /* r0 <- current position of code */ |
||||||
|
ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ |
||||||
|
cmp r0, r1 /* don't reloc during debug */ |
||||||
|
beq stack_setup |
||||||
|
|
||||||
|
ldr r2, _armboot_start |
||||||
|
ldr r3, _bss_start |
||||||
|
sub r2, r3, r2 /* r2 <- size of armboot */ |
||||||
|
add r2, r0, r2 /* r2 <- source end address */ |
||||||
|
|
||||||
|
copy_loop: |
||||||
|
ldmia r0!, {r3-r10} /* copy from source address [r0] */ |
||||||
|
stmia r1!, {r3-r10} /* copy to target address [r1] */ |
||||||
|
cmp r0, r2 /* until source end addreee [r2] */ |
||||||
|
ble copy_loop |
||||||
|
|
||||||
|
/* Set up the stack */ |
||||||
|
stack_setup: |
||||||
|
ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ |
||||||
|
sub r0, r0, #CFG_MALLOC_LEN /* malloc area */ |
||||||
|
sub r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo */ |
||||||
|
#ifdef CONFIG_USE_IRQ |
||||||
|
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) |
||||||
|
#endif |
||||||
|
sub sp, r0, #12 /* leave 3 words for abort-stack */ |
||||||
|
|
||||||
|
clear_bss: |
||||||
|
ldr r0, _bss_start /* find start of bss segment */ |
||||||
|
ldr r1, _bss_end /* stop here */ |
||||||
|
mov r2, #0x00000000 /* clear */ |
||||||
|
|
||||||
|
clbss_l:str r2, [r0] /* clear loop... */ |
||||||
|
add r0, r0, #4 |
||||||
|
cmp r0, r1 |
||||||
|
bne clbss_l |
||||||
|
|
||||||
|
ldr pc, _start_armboot |
||||||
|
|
||||||
|
_start_armboot: |
||||||
|
.word start_armboot
|
||||||
|
|
||||||
|
|
||||||
|
/* |
||||||
|
************************************************************************* |
||||||
|
* |
||||||
|
* CPU_init_critical registers |
||||||
|
* |
||||||
|
* setup important registers |
||||||
|
* setup memory timing |
||||||
|
* |
||||||
|
************************************************************************* |
||||||
|
*/ |
||||||
|
|
||||||
|
|
||||||
|
cpu_init_crit: |
||||||
|
/* |
||||||
|
* flush v4 I/D caches |
||||||
|
*/ |
||||||
|
mov r0, #0 |
||||||
|
mcr p15, 0, r0, c7, c5, 0 /* flush v4 I-cache */ |
||||||
|
mcr p15, 0, r0, c7, c6, 0 /* flush v4 D-cache */ |
||||||
|
|
||||||
|
/* |
||||||
|
* disable MMU stuff and caches |
||||||
|
*/ |
||||||
|
mrc p15, 0, r0, c1, c0, 0 |
||||||
|
bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */ |
||||||
|
bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */ |
||||||
|
orr r0, r0, #0x00000002 /* set bit 2 (A) Align */ |
||||||
|
orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */ |
||||||
|
mcr p15, 0, r0, c1, c0, 0 |
||||||
|
|
||||||
|
/* |
||||||
|
* Go setup Memory and board specific bits prior to relocation. |
||||||
|
*/ |
||||||
|
mov ip, lr /* perserve link reg across call */ |
||||||
|
bl platformsetup /* go setup memory */ |
||||||
|
mov lr, ip /* restore link */ |
||||||
|
mov pc, lr /* back to my caller */ |
||||||
|
/* |
||||||
|
************************************************************************* |
||||||
|
* |
||||||
|
* Interrupt handling |
||||||
|
* |
||||||
|
************************************************************************* |
||||||
|
*/ |
||||||
|
|
||||||
|
@
|
||||||
|
@ IRQ stack frame.
|
||||||
|
@
|
||||||
|
#define S_FRAME_SIZE 72 |
||||||
|
|
||||||
|
#define S_OLD_R0 68 |
||||||
|
#define S_PSR 64 |
||||||
|
#define S_PC 60 |
||||||
|
#define S_LR 56 |
||||||
|
#define S_SP 52 |
||||||
|
|
||||||
|
#define S_IP 48 |
||||||
|
#define S_FP 44 |
||||||
|
#define S_R10 40 |
||||||
|
#define S_R9 36 |
||||||
|
#define S_R8 32 |
||||||
|
#define S_R7 28 |
||||||
|
#define S_R6 24 |
||||||
|
#define S_R5 20 |
||||||
|
#define S_R4 16 |
||||||
|
#define S_R3 12 |
||||||
|
#define S_R2 8 |
||||||
|
#define S_R1 4 |
||||||
|
#define S_R0 0 |
||||||
|
|
||||||
|
#define MODE_SVC 0x13 |
||||||
|
#define I_BIT 0x80 |
||||||
|
|
||||||
|
/* |
||||||
|
* use bad_save_user_regs for abort/prefetch/undef/swi ... |
||||||
|
* use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling |
||||||
|
*/ |
||||||
|
|
||||||
|
.macro bad_save_user_regs
|
||||||
|
@ carve out a frame on current user stack
|
||||||
|
sub sp, sp, #S_FRAME_SIZE |
||||||
|
stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
|
||||||
|
|
||||||
|
ldr r2, _armboot_start |
||||||
|
sub r2, r2, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN) |
||||||
|
sub r2, r2, #(CFG_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
|
||||||
|
@ get values for "aborted" pc and cpsr (into parm regs)
|
||||||
|
ldmia r2, {r2 - r3} |
||||||
|
add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack |
||||||
|
add r5, sp, #S_SP |
||||||
|
mov r1, lr |
||||||
|
stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
|
||||||
|
mov r0, sp @ save current stack into r0 (param register)
|
||||||
|
.endm |
||||||
|
|
||||||
|
.macro irq_save_user_regs
|
||||||
|
sub sp, sp, #S_FRAME_SIZE |
||||||
|
stmia sp, {r0 - r12} @ Calling r0-r12
|
||||||
|
@ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
|
||||||
|
add r8, sp, #S_PC |
||||||
|
stmdb r8, {sp, lr}^ @ Calling SP, LR
|
||||||
|
str lr, [r8, #0] @ Save calling PC
|
||||||
|
mrs r6, spsr |
||||||
|
str r6, [r8, #4] @ Save CPSR
|
||||||
|
str r0, [r8, #8] @ Save OLD_R0
|
||||||
|
mov r0, sp |
||||||
|
.endm |
||||||
|
|
||||||
|
.macro irq_restore_user_regs
|
||||||
|
ldmia sp, {r0 - lr}^ @ Calling r0 - lr
|
||||||
|
mov r0, r0 |
||||||
|
ldr lr, [sp, #S_PC] @ Get PC |
||||||
|
add sp, sp, #S_FRAME_SIZE |
||||||
|
subs pc, lr, #4 @ return & move spsr_svc into cpsr
|
||||||
|
.endm |
||||||
|
|
||||||
|
.macro get_bad_stack
|
||||||
|
ldr r13, _armboot_start @ setup our mode stack
|
||||||
|
sub r13, r13, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN) |
||||||
|
sub r13, r13, #(CFG_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
|
||||||
|
|
||||||
|
str lr, [r13] @ save caller lr in position 0 of saved stack
|
||||||
|
mrs lr, spsr @ get the spsr
|
||||||
|
str lr, [r13, #4] @ save spsr in position 1 of saved stack
|
||||||
|
mov r13, #MODE_SVC @ prepare SVC-Mode |
||||||
|
@ msr spsr_c, r13
|
||||||
|
msr spsr, r13 @ switch modes, make sure moves will execute
|
||||||
|
mov lr, pc @ capture return pc
|
||||||
|
movs pc, lr @ jump to next instruction & switch modes.
|
||||||
|
.endm |
||||||
|
|
||||||
|
.macro get_irq_stack @ setup IRQ stack
|
||||||
|
ldr sp, IRQ_STACK_START |
||||||
|
.endm |
||||||
|
|
||||||
|
.macro get_fiq_stack @ setup FIQ stack
|
||||||
|
ldr sp, FIQ_STACK_START |
||||||
|
.endm |
||||||
|
|
||||||
|
/* |
||||||
|
* exception handlers |
||||||
|
*/ |
||||||
|
.align 5
|
||||||
|
undefined_instruction: |
||||||
|
get_bad_stack |
||||||
|
bad_save_user_regs |
||||||
|
bl do_undefined_instruction |
||||||
|
|
||||||
|
.align 5
|
||||||
|
software_interrupt: |
||||||
|
get_bad_stack |
||||||
|
bad_save_user_regs |
||||||
|
bl do_software_interrupt |
||||||
|
|
||||||
|
.align 5
|
||||||
|
prefetch_abort: |
||||||
|
get_bad_stack |
||||||
|
bad_save_user_regs |
||||||
|
bl do_prefetch_abort |
||||||
|
|
||||||
|
.align 5
|
||||||
|
data_abort: |
||||||
|
get_bad_stack |
||||||
|
bad_save_user_regs |
||||||
|
bl do_data_abort |
||||||
|
|
||||||
|
.align 5
|
||||||
|
not_used: |
||||||
|
get_bad_stack |
||||||
|
bad_save_user_regs |
||||||
|
bl do_not_used |
||||||
|
|
||||||
|
#ifdef CONFIG_USE_IRQ |
||||||
|
|
||||||
|
.align 5
|
||||||
|
irq: |
||||||
|
get_irq_stack |
||||||
|
irq_save_user_regs |
||||||
|
bl do_irq |
||||||
|
irq_restore_user_regs |
||||||
|
|
||||||
|
.align 5
|
||||||
|
fiq: |
||||||
|
get_fiq_stack |
||||||
|
/* someone ought to write a more effiction fiq_save_user_regs */ |
||||||
|
irq_save_user_regs |
||||||
|
bl do_fiq |
||||||
|
irq_restore_user_regs |
||||||
|
|
||||||
|
#else |
||||||
|
|
||||||
|
.align 5
|
||||||
|
irq: |
||||||
|
get_bad_stack |
||||||
|
bad_save_user_regs |
||||||
|
bl do_irq |
||||||
|
|
||||||
|
.align 5
|
||||||
|
fiq: |
||||||
|
get_bad_stack |
||||||
|
bad_save_user_regs |
||||||
|
bl do_fiq |
||||||
|
|
||||||
|
#endif |
||||||
|
|
||||||
|
# ifdef CONFIG_INTEGRATOR |
||||||
|
|
||||||
|
/* Satisfied by general board level routine */ |
||||||
|
|
||||||
|
#else |
||||||
|
|
||||||
|
.align 5
|
||||||
|
.globl reset_cpu
|
||||||
|
reset_cpu: |
||||||
|
|
||||||
|
ldr r1, rstctl1 /* get clkm1 reset ctl */ |
||||||
|
mov r3, #0x0 |
||||||
|
strh r3, [r1] /* clear it */ |
||||||
|
mov r3, #0x8 |
||||||
|
strh r3, [r1] /* force dsp+arm reset */ |
||||||
|
_loop_forever: |
||||||
|
b _loop_forever |
||||||
|
|
||||||
|
rstctl1: |
||||||
|
.word 0xfffece10
|
||||||
|
|
||||||
|
#endif /* #ifdef CONFIG_INTEGRATOR */ |
@ -0,0 +1,43 @@ |
|||||||
|
#
|
||||||
|
# (C) Copyright 2000-2003
|
||||||
|
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||||
|
#
|
||||||
|
# See file CREDITS for list of people who contributed to this
|
||||||
|
# project.
|
||||||
|
#
|
||||||
|
# This program is free software; you can redistribute it and/or
|
||||||
|
# modify it under the terms of the GNU General Public License as
|
||||||
|
# published by the Free Software Foundation; either version 2 of
|
||||||
|
# the License, or (at your option) any later version.
|
||||||
|
#
|
||||||
|
# This program is distributed in the hope that it will be useful,
|
||||||
|
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
# GNU General Public License for more details.
|
||||||
|
#
|
||||||
|
# You should have received a copy of the GNU General Public License
|
||||||
|
# along with this program; if not, write to the Free Software
|
||||||
|
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||||
|
# MA 02111-1307 USA
|
||||||
|
#
|
||||||
|
|
||||||
|
include $(TOPDIR)/config.mk |
||||||
|
|
||||||
|
LIB = lib$(CPU).a
|
||||||
|
|
||||||
|
START = start.o
|
||||||
|
OBJS = interrupts.o cpu.o
|
||||||
|
|
||||||
|
all: .depend $(START) $(LIB) |
||||||
|
|
||||||
|
$(LIB): $(OBJS) |
||||||
|
$(AR) crv $@ $(OBJS)
|
||||||
|
|
||||||
|
#########################################################################
|
||||||
|
|
||||||
|
.depend: Makefile $(START:.o=.S) $(OBJS:.o=.c) |
||||||
|
$(CC) -M $(CFLAGS) $(START:.o=.S) $(OBJS:.o=.c) > $@
|
||||||
|
|
||||||
|
sinclude .depend |
||||||
|
|
||||||
|
#########################################################################
|
@ -0,0 +1,27 @@ |
|||||||
|
#
|
||||||
|
# (C) Copyright 2002
|
||||||
|
# Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
|
||||||
|
#
|
||||||
|
# See file CREDITS for list of people who contributed to this
|
||||||
|
# project.
|
||||||
|
#
|
||||||
|
# This program is free software; you can redistribute it and/or
|
||||||
|
# modify it under the terms of the GNU General Public License as
|
||||||
|
# published by the Free Software Foundation; either version 2 of
|
||||||
|
# the License, or (at your option) any later version.
|
||||||
|
#
|
||||||
|
# This program is distributed in the hope that it will be useful,
|
||||||
|
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
# GNU General Public License for more details.
|
||||||
|
#
|
||||||
|
# You should have received a copy of the GNU General Public License
|
||||||
|
# along with this program; if not, write to the Free Software
|
||||||
|
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||||
|
# MA 02111-1307 USA
|
||||||
|
#
|
||||||
|
|
||||||
|
PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -ffixed-r8 \
|
||||||
|
-msoft-float
|
||||||
|
|
||||||
|
PLATFORM_CPPFLAGS += -march=armv4
|
@ -0,0 +1,91 @@ |
|||||||
|
/*
|
||||||
|
* (C) Copyright 2002 |
||||||
|
* Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
||||||
|
* Marius Groeger <mgroeger@sysgo.de> |
||||||
|
* |
||||||
|
* (C) Copyright 2002 |
||||||
|
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de> |
||||||
|
* |
||||||
|
* See file CREDITS for list of people who contributed to this |
||||||
|
* project. |
||||||
|
* |
||||||
|
* This program is free software; you can redistribute it and/or |
||||||
|
* modify it under the terms of the GNU General Public License as |
||||||
|
* published by the Free Software Foundation; either version 2 of |
||||||
|
* the License, or (at your option) any later version. |
||||||
|
* |
||||||
|
* This program is distributed in the hope that it will be useful, |
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||||
|
* GNU General Public License for more details. |
||||||
|
* |
||||||
|
* You should have received a copy of the GNU General Public License |
||||||
|
* along with this program; if not, write to the Free Software |
||||||
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||||
|
* MA 02111-1307 USA |
||||||
|
*/ |
||||||
|
|
||||||
|
/*
|
||||||
|
* CPU specific code for an unknown cpu |
||||||
|
* - hence fairly empty...... |
||||||
|
*/ |
||||||
|
|
||||||
|
#include <common.h> |
||||||
|
#include <command.h> |
||||||
|
|
||||||
|
int cpu_init (void) |
||||||
|
{ |
||||||
|
/*
|
||||||
|
* setup up stacks if necessary |
||||||
|
*/ |
||||||
|
#ifdef CONFIG_USE_IRQ |
||||||
|
DECLARE_GLOBAL_DATA_PTR; |
||||||
|
|
||||||
|
IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4; |
||||||
|
FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ; |
||||||
|
#endif |
||||||
|
return 0; |
||||||
|
} |
||||||
|
|
||||||
|
int cleanup_before_linux (void) |
||||||
|
{ |
||||||
|
/*
|
||||||
|
* this function is called just before we call linux |
||||||
|
* it prepares the processor for linux |
||||||
|
* |
||||||
|
* we turn off caches etc ... |
||||||
|
*/ |
||||||
|
|
||||||
|
disable_interrupts (); |
||||||
|
|
||||||
|
/* Since the CM has unknown processor we do not support
|
||||||
|
* cache operations
|
||||||
|
*/ |
||||||
|
|
||||||
|
return (0); |
||||||
|
} |
||||||
|
|
||||||
|
int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
||||||
|
{ |
||||||
|
extern void reset_cpu (ulong addr); |
||||||
|
|
||||||
|
disable_interrupts (); |
||||||
|
reset_cpu (0); |
||||||
|
/*NOTREACHED*/ |
||||||
|
return (0); |
||||||
|
} |
||||||
|
|
||||||
|
/* May not be cahed processor on the CM - do nothing */ |
||||||
|
void icache_enable (void) |
||||||
|
{ |
||||||
|
} |
||||||
|
|
||||||
|
void icache_disable (void) |
||||||
|
{ |
||||||
|
} |
||||||
|
|
||||||
|
/* return "disabled" */ |
||||||
|
int icache_status (void) |
||||||
|
{ |
||||||
|
return 0; |
||||||
|
} |
@ -0,0 +1,192 @@ |
|||||||
|
/*
|
||||||
|
* (C) Copyright 2003 |
||||||
|
* Texas Instruments <www.ti.com> |
||||||
|
* |
||||||
|
* (C) Copyright 2002 |
||||||
|
* Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
||||||
|
* Marius Groeger <mgroeger@sysgo.de> |
||||||
|
* |
||||||
|
* (C) Copyright 2002 |
||||||
|
* Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
||||||
|
* Alex Zuepke <azu@sysgo.de> |
||||||
|
* |
||||||
|
* (C) Copyright 2002-2004 |
||||||
|
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de> |
||||||
|
* |
||||||
|
* (C) Copyright 2004 |
||||||
|
* Philippe Robin, ARM Ltd. <philippe.robin@arm.com> |
||||||
|
* |
||||||
|
* See file CREDITS for list of people who contributed to this |
||||||
|
* project. |
||||||
|
* |
||||||
|
* This program is free software; you can redistribute it and/or |
||||||
|
* modify it under the terms of the GNU General Public License as |
||||||
|
* published by the Free Software Foundation; either version 2 of |
||||||
|
* the License, or (at your option) any later version. |
||||||
|
* |
||||||
|
* This program is distributed in the hope that it will be useful, |
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||||
|
* GNU General Public License for more details. |
||||||
|
* |
||||||
|
* You should have received a copy of the GNU General Public License |
||||||
|
* along with this program; if not, write to the Free Software |
||||||
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||||
|
* MA 02111-1307 USA |
||||||
|
*/ |
||||||
|
|
||||||
|
#include <common.h> |
||||||
|
#include <asm/proc-armv/ptrace.h> |
||||||
|
|
||||||
|
#ifndef CONFIG_INTEGRATOR |
||||||
|
/* Only to be used for integrator/AP or /CP */ |
||||||
|
/* Allows U-Boot to be used with any ARM supplied core module (CM),
|
||||||
|
* provided the ARM boot monitor, or similar software, |
||||||
|
* runs first to set up the platform e.g. map writeable memory to 0x00000000 |
||||||
|
* - see Integrator User Guides |
||||||
|
* Versatile has a supported cpu - arm926ejs |
||||||
|
* Some integrator CMs cpus are supported |
||||||
|
* CM926EJ-S, CM946E-S |
||||||
|
* For platforms with supported cpus U-Boot can be used as the sole boot
|
||||||
|
* monitor/loader - it will configure the platform itself |
||||||
|
* Also U-Boot may be faster/smaller in those cases since specific
|
||||||
|
* qualities of the cpu and/or CM can be used e.g i and/or d caches etc. |
||||||
|
*/ |
||||||
|
#endif |
||||||
|
extern void reset_cpu(ulong addr); |
||||||
|
|
||||||
|
#ifdef CONFIG_USE_IRQ |
||||||
|
/* enable IRQ interrupts */ |
||||||
|
void enable_interrupts (void) |
||||||
|
{ |
||||||
|
unsigned long temp; |
||||||
|
__asm__ __volatile__("mrs %0, cpsr\n" |
||||||
|
"bic %0, %0, #0x80\n" |
||||||
|
"msr cpsr_c, %0" |
||||||
|
: "=r" (temp) |
||||||
|
: |
||||||
|
: "memory"); |
||||||
|
} |
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* disable IRQ/FIQ interrupts |
||||||
|
* returns true if interrupts had been enabled before we disabled them |
||||||
|
*/ |
||||||
|
int disable_interrupts (void) |
||||||
|
{ |
||||||
|
unsigned long old,temp; |
||||||
|
__asm__ __volatile__("mrs %0, cpsr\n" |
||||||
|
"orr %1, %0, #0xc0\n" |
||||||
|
"msr cpsr_c, %1" |
||||||
|
: "=r" (old), "=r" (temp) |
||||||
|
: |
||||||
|
: "memory"); |
||||||
|
return (old & 0x80) == 0; |
||||||
|
} |
||||||
|
#else |
||||||
|
void enable_interrupts (void) |
||||||
|
{ |
||||||
|
return; |
||||||
|
} |
||||||
|
int disable_interrupts (void) |
||||||
|
{ |
||||||
|
return 0; |
||||||
|
} |
||||||
|
#endif |
||||||
|
|
||||||
|
|
||||||
|
void bad_mode (void) |
||||||
|
{ |
||||||
|
panic ("Resetting CPU ...\n"); |
||||||
|
reset_cpu (0); |
||||||
|
} |
||||||
|
|
||||||
|
void show_regs (struct pt_regs *regs) |
||||||
|
{ |
||||||
|
unsigned long flags; |
||||||
|
const char *processor_modes[] = { |
||||||
|
"USER_26", "FIQ_26", "IRQ_26", "SVC_26", |
||||||
|
"UK4_26", "UK5_26", "UK6_26", "UK7_26", |
||||||
|
"UK8_26", "UK9_26", "UK10_26", "UK11_26", |
||||||
|
"UK12_26", "UK13_26", "UK14_26", "UK15_26", |
||||||
|
"USER_32", "FIQ_32", "IRQ_32", "SVC_32", |
||||||
|
"UK4_32", "UK5_32", "UK6_32", "ABT_32", |
||||||
|
"UK8_32", "UK9_32", "UK10_32", "UND_32", |
||||||
|
"UK12_32", "UK13_32", "UK14_32", "SYS_32", |
||||||
|
}; |
||||||
|
|
||||||
|
flags = condition_codes (regs); |
||||||
|
|
||||||
|
printf ("pc : [<%08lx>] lr : [<%08lx>]\n" |
||||||
|
"sp : %08lx ip : %08lx fp : %08lx\n", |
||||||
|
instruction_pointer (regs), |
||||||
|
regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp); |
||||||
|
printf ("r10: %08lx r9 : %08lx r8 : %08lx\n", |
||||||
|
regs->ARM_r10, regs->ARM_r9, regs->ARM_r8); |
||||||
|
printf ("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n", |
||||||
|
regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4); |
||||||
|
printf ("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n", |
||||||
|
regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0); |
||||||
|
printf ("Flags: %c%c%c%c", |
||||||
|
flags & CC_N_BIT ? 'N' : 'n', |
||||||
|
flags & CC_Z_BIT ? 'Z' : 'z', |
||||||
|
flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v'); |
||||||
|
printf (" IRQs %s FIQs %s Mode %s%s\n", |
||||||
|
interrupts_enabled (regs) ? "on" : "off", |
||||||
|
fast_interrupts_enabled (regs) ? "on" : "off", |
||||||
|
processor_modes[processor_mode (regs)], |
||||||
|
thumb_mode (regs) ? " (T)" : ""); |
||||||
|
} |
||||||
|
|
||||||
|
void do_undefined_instruction (struct pt_regs *pt_regs) |
||||||
|
{ |
||||||
|
printf ("undefined instruction\n"); |
||||||
|
show_regs (pt_regs); |
||||||
|
bad_mode (); |
||||||
|
} |
||||||
|
|
||||||
|
void do_software_interrupt (struct pt_regs *pt_regs) |
||||||
|
{ |
||||||
|
printf ("software interrupt\n"); |
||||||
|
show_regs (pt_regs); |
||||||
|
bad_mode (); |
||||||
|
} |
||||||
|
|
||||||
|
void do_prefetch_abort (struct pt_regs *pt_regs) |
||||||
|
{ |
||||||
|
printf ("prefetch abort\n"); |
||||||
|
show_regs (pt_regs); |
||||||
|
bad_mode (); |
||||||
|
} |
||||||
|
|
||||||
|
void do_data_abort (struct pt_regs *pt_regs) |
||||||
|
{ |
||||||
|
printf ("data abort\n"); |
||||||
|
show_regs (pt_regs); |
||||||
|
bad_mode (); |
||||||
|
} |
||||||
|
|
||||||
|
void do_not_used (struct pt_regs *pt_regs) |
||||||
|
{ |
||||||
|
printf ("not used\n"); |
||||||
|
show_regs (pt_regs); |
||||||
|
bad_mode (); |
||||||
|
} |
||||||
|
|
||||||
|
void do_fiq (struct pt_regs *pt_regs) |
||||||
|
{ |
||||||
|
printf ("fast interrupt request\n"); |
||||||
|
show_regs (pt_regs); |
||||||
|
bad_mode (); |
||||||
|
} |
||||||
|
|
||||||
|
void do_irq (struct pt_regs *pt_regs) |
||||||
|
{ |
||||||
|
printf ("interrupt request\n"); |
||||||
|
show_regs (pt_regs); |
||||||
|
bad_mode (); |
||||||
|
} |
||||||
|
|
||||||
|
/* The timer functionality is supplied by the Integrator board */ |
||||||
|
/* - see board/integrator<>.c */ |
@ -0,0 +1,370 @@ |
|||||||
|
/* |
||||||
|
* armboot - Startup Code for ARM926EJS CPU-core |
||||||
|
* |
||||||
|
* Copyright (c) 2003 Texas Instruments |
||||||
|
* |
||||||
|
* ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------ |
||||||
|
* |
||||||
|
* Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
|
||||||
|
* Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
|
||||||
|
* Copyright (c) 2002 Gary Jennejohn <gj@denx.de>
|
||||||
|
* Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
|
||||||
|
* Copyright (c) 2003 Kshitij <kshitij@ti.com>
|
||||||
|
* |
||||||
|
* See file CREDITS for list of people who contributed to this |
||||||
|
* project. |
||||||
|
* |
||||||
|
* This program is free software; you can redistribute it and/or
|
||||||
|
* modify it under the terms of the GNU General Public License as |
||||||
|
* published by the Free Software Foundation; either version 2 of
|
||||||
|
* the License, or (at your option) any later version. |
||||||
|
* |
||||||
|
* This program is distributed in the hope that it will be useful, |
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||||
|
* GNU General Public License for more details. |
||||||
|
* |
||||||
|
* You should have received a copy of the GNU General Public License |
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||||
|
* MA 02111-1307 USA |
||||||
|
*/ |
||||||
|
|
||||||
|
|
||||||
|
#include <config.h> |
||||||
|
#include <version.h> |
||||||
|
|
||||||
|
/* |
||||||
|
************************************************************************* |
||||||
|
* |
||||||
|
* Jump vector table |
||||||
|
* |
||||||
|
************************************************************************* |
||||||
|
*/ |
||||||
|
|
||||||
|
.globl _start
|
||||||
|
_start: |
||||||
|
b reset |
||||||
|
ldr pc, _undefined_instruction |
||||||
|
ldr pc, _software_interrupt |
||||||
|
ldr pc, _prefetch_abort |
||||||
|
ldr pc, _data_abort |
||||||
|
ldr pc, _not_used |
||||||
|
ldr pc, _irq |
||||||
|
ldr pc, _fiq |
||||||
|
|
||||||
|
_undefined_instruction: |
||||||
|
.word undefined_instruction
|
||||||
|
_software_interrupt: |
||||||
|
.word software_interrupt
|
||||||
|
_prefetch_abort: |
||||||
|
.word prefetch_abort
|
||||||
|
_data_abort: |
||||||
|
.word data_abort
|
||||||
|
_not_used: |
||||||
|
.word not_used
|
||||||
|
_irq: |
||||||
|
.word irq
|
||||||
|
_fiq: |
||||||
|
.word fiq
|
||||||
|
|
||||||
|
.balignl 16,0xdeadbeef |
||||||
|
|
||||||
|
/* |
||||||
|
************************************************************************* |
||||||
|
* |
||||||
|
* Startup Code (reset vector) |
||||||
|
* |
||||||
|
* do important init only if we don't start from memory! |
||||||
|
* setup memory and board specific bits prior to relocation. |
||||||
|
* relocate armboot to ram |
||||||
|
* setup stack |
||||||
|
* |
||||||
|
************************************************************************* |
||||||
|
*/ |
||||||
|
|
||||||
|
_TEXT_BASE: |
||||||
|
.word TEXT_BASE /* address of _start in the linked image */ |
||||||
|
|
||||||
|
.globl _armboot_start
|
||||||
|
_armboot_start: |
||||||
|
.word _start
|
||||||
|
|
||||||
|
/* |
||||||
|
* These are defined in the board-specific linker script. |
||||||
|
*/ |
||||||
|
.globl _bss_start
|
||||||
|
_bss_start: |
||||||
|
.word __bss_start
|
||||||
|
|
||||||
|
.globl _bss_end
|
||||||
|
_bss_end: |
||||||
|
.word _end
|
||||||
|
|
||||||
|
#ifdef CONFIG_USE_IRQ |
||||||
|
/* IRQ stack memory (calculated at run-time) */ |
||||||
|
.globl IRQ_STACK_START
|
||||||
|
IRQ_STACK_START: |
||||||
|
.word 0x0badc0de
|
||||||
|
|
||||||
|
/* IRQ stack memory (calculated at run-time) */ |
||||||
|
.globl FIQ_STACK_START
|
||||||
|
FIQ_STACK_START: |
||||||
|
.word 0x0badc0de
|
||||||
|
#endif |
||||||
|
|
||||||
|
|
||||||
|
/* |
||||||
|
* the actual reset code |
||||||
|
*/ |
||||||
|
.globl reset
|
||||||
|
reset: |
||||||
|
/* |
||||||
|
* set the cpu to SVC32 mode |
||||||
|
*/ |
||||||
|
mrs r0,cpsr |
||||||
|
bic r0,r0,#0x1f |
||||||
|
orr r0,r0,#0xd3 |
||||||
|
msr cpsr,r0 |
||||||
|
|
||||||
|
/* |
||||||
|
* we do sys-critical inits only at reboot, |
||||||
|
* not when booting from ram! |
||||||
|
*/ |
||||||
|
#ifdef CONFIG_INIT_CRITICAL |
||||||
|
bl cpu_init_crit |
||||||
|
#endif |
||||||
|
|
||||||
|
relocate: /* relocate U-Boot to RAM */ |
||||||
|
adr r0, _start /* pc relative address of label */ |
||||||
|
ldr r1, _TEXT_BASE /* linked image address of label */ |
||||||
|
cmp r0, r1 /* test if we run from flash or RAM */ |
||||||
|
beq stack_setup /* ifeq we are in the RAM copy */ |
||||||
|
|
||||||
|
ldr r2, _armboot_start |
||||||
|
ldr r3, _bss_start |
||||||
|
sub r2, r3, r2 /* r2 <- size of armboot */ |
||||||
|
add r2, r0, r2 /* r2 <- source end address */ |
||||||
|
|
||||||
|
copy_loop: |
||||||
|
ldmia r0!, {r3-r10} /* copy from source address [r0] */ |
||||||
|
stmia r1!, {r3-r10} /* copy to target address [r1] */ |
||||||
|
cmp r0, r2 /* until source end addreee [r2] */ |
||||||
|
ble copy_loop |
||||||
|
|
||||||
|
/* Set up the stack */ |
||||||
|
stack_setup: |
||||||
|
ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ |
||||||
|
sub r0, r0, #CFG_MALLOC_LEN /* malloc area */ |
||||||
|
sub r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo */ |
||||||
|
#ifdef CONFIG_USE_IRQ |
||||||
|
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) |
||||||
|
#endif |
||||||
|
sub sp, r0, #12 /* leave 3 words for abort-stack */ |
||||||
|
|
||||||
|
clear_bss: |
||||||
|
ldr r0, _bss_start /* find start of bss segment */ |
||||||
|
ldr r1, _bss_end /* stop here */ |
||||||
|
mov r2, #0x00000000 /* clear */ |
||||||
|
|
||||||
|
clbss_l:str r2, [r0] /* clear loop... */ |
||||||
|
add r0, r0, #4 |
||||||
|
cmp r0, r1 |
||||||
|
ble clbss_l |
||||||
|
|
||||||
|
ldr pc, _start_armboot |
||||||
|
|
||||||
|
_start_armboot: |
||||||
|
.word start_armboot
|
||||||
|
|
||||||
|
/* |
||||||
|
************************************************************************* |
||||||
|
* |
||||||
|
* CPU_init_critical registers |
||||||
|
* |
||||||
|
* setup important registers |
||||||
|
* setup memory timing |
||||||
|
* |
||||||
|
************************************************************************* |
||||||
|
*/ |
||||||
|
|
||||||
|
cpu_init_crit: |
||||||
|
/* arm_int_generic assumes the ARM boot monitor, or user software, |
||||||
|
* has initialized the platform |
||||||
|
*/ |
||||||
|
mov pc, lr /* back to my caller */ |
||||||
|
/* |
||||||
|
************************************************************************* |
||||||
|
* |
||||||
|
* Interrupt handling |
||||||
|
* |
||||||
|
************************************************************************* |
||||||
|
*/ |
||||||
|
|
||||||
|
@
|
||||||
|
@ IRQ stack frame.
|
||||||
|
@
|
||||||
|
#define S_FRAME_SIZE 72 |
||||||
|
|
||||||
|
#define S_OLD_R0 68 |
||||||
|
#define S_PSR 64 |
||||||
|
#define S_PC 60 |
||||||
|
#define S_LR 56 |
||||||
|
#define S_SP 52 |
||||||
|
|
||||||
|
#define S_IP 48 |
||||||
|
#define S_FP 44 |
||||||
|
#define S_R10 40 |
||||||
|
#define S_R9 36 |
||||||
|
#define S_R8 32 |
||||||
|
#define S_R7 28 |
||||||
|
#define S_R6 24 |
||||||
|
#define S_R5 20 |
||||||
|
#define S_R4 16 |
||||||
|
#define S_R3 12 |
||||||
|
#define S_R2 8 |
||||||
|
#define S_R1 4 |
||||||
|
#define S_R0 0 |
||||||
|
|
||||||
|
#define MODE_SVC 0x13 |
||||||
|
#define I_BIT 0x80 |
||||||
|
|
||||||
|
/* |
||||||
|
* use bad_save_user_regs for abort/prefetch/undef/swi ... |
||||||
|
* use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling |
||||||
|
*/ |
||||||
|
|
||||||
|
.macro bad_save_user_regs
|
||||||
|
@ carve out a frame on current user stack
|
||||||
|
sub sp, sp, #S_FRAME_SIZE |
||||||
|
stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
|
||||||
|
|
||||||
|
ldr r2, _armboot_start |
||||||
|
sub r2, r2, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN) |
||||||
|
sub r2, r2, #(CFG_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
|
||||||
|
@ get values for "aborted" pc and cpsr (into parm regs)
|
||||||
|
ldmia r2, {r2 - r3} |
||||||
|
add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack |
||||||
|
add r5, sp, #S_SP |
||||||
|
mov r1, lr |
||||||
|
stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
|
||||||
|
mov r0, sp @ save current stack into r0 (param register)
|
||||||
|
.endm |
||||||
|
|
||||||
|
.macro irq_save_user_regs
|
||||||
|
sub sp, sp, #S_FRAME_SIZE |
||||||
|
stmia sp, {r0 - r12} @ Calling r0-r12
|
||||||
|
@ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
|
||||||
|
add r8, sp, #S_PC |
||||||
|
stmdb r8, {sp, lr}^ @ Calling SP, LR
|
||||||
|
str lr, [r8, #0] @ Save calling PC
|
||||||
|
mrs r6, spsr |
||||||
|
str r6, [r8, #4] @ Save CPSR
|
||||||
|
str r0, [r8, #8] @ Save OLD_R0
|
||||||
|
mov r0, sp |
||||||
|
.endm |
||||||
|
|
||||||
|
.macro irq_restore_user_regs
|
||||||
|
ldmia sp, {r0 - lr}^ @ Calling r0 - lr
|
||||||
|
mov r0, r0 |
||||||
|
ldr lr, [sp, #S_PC] @ Get PC |
||||||
|
add sp, sp, #S_FRAME_SIZE |
||||||
|
subs pc, lr, #4 @ return & move spsr_svc into cpsr
|
||||||
|
.endm |
||||||
|
|
||||||
|
.macro get_bad_stack
|
||||||
|
ldr r13, _armboot_start @ setup our mode stack
|
||||||
|
sub r13, r13, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN) |
||||||
|
sub r13, r13, #(CFG_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
|
||||||
|
|
||||||
|
str lr, [r13] @ save caller lr in position 0 of saved stack
|
||||||
|
mrs lr, spsr @ get the spsr
|
||||||
|
str lr, [r13, #4] @ save spsr in position 1 of saved stack
|
||||||
|
mov r13, #MODE_SVC @ prepare SVC-Mode |
||||||
|
@ msr spsr_c, r13
|
||||||
|
msr spsr, r13 @ switch modes, make sure moves will execute
|
||||||
|
mov lr, pc @ capture return pc
|
||||||
|
movs pc, lr @ jump to next instruction & switch modes.
|
||||||
|
.endm |
||||||
|
|
||||||
|
.macro get_irq_stack @ setup IRQ stack
|
||||||
|
ldr sp, IRQ_STACK_START |
||||||
|
.endm |
||||||
|
|
||||||
|
.macro get_fiq_stack @ setup FIQ stack
|
||||||
|
ldr sp, FIQ_STACK_START |
||||||
|
.endm |
||||||
|
|
||||||
|
/* |
||||||
|
* exception handlers |
||||||
|
*/ |
||||||
|
.align 5
|
||||||
|
.globl undefined_instruction
|
||||||
|
undefined_instruction: |
||||||
|
get_bad_stack |
||||||
|
bad_save_user_regs |
||||||
|
bl do_undefined_instruction |
||||||
|
|
||||||
|
.align 5
|
||||||
|
.globl software_interrupt
|
||||||
|
software_interrupt: |
||||||
|
get_bad_stack |
||||||
|
bad_save_user_regs |
||||||
|
bl do_software_interrupt |
||||||
|
|
||||||
|
.align 5
|
||||||
|
.globl prefetch_abort
|
||||||
|
prefetch_abort: |
||||||
|
get_bad_stack |
||||||
|
bad_save_user_regs |
||||||
|
bl do_prefetch_abort |
||||||
|
|
||||||
|
.align 5
|
||||||
|
.globl data_abort
|
||||||
|
data_abort: |
||||||
|
get_bad_stack |
||||||
|
bad_save_user_regs |
||||||
|
bl do_data_abort |
||||||
|
|
||||||
|
.align 5
|
||||||
|
.globl not_used
|
||||||
|
not_used: |
||||||
|
get_bad_stack |
||||||
|
bad_save_user_regs |
||||||
|
bl do_not_used |
||||||
|
|
||||||
|
#ifdef CONFIG_USE_IRQ |
||||||
|
.align 5
|
||||||
|
.globl irq
|
||||||
|
irq: |
||||||
|
get_irq_stack |
||||||
|
irq_save_user_regs |
||||||
|
bl do_irq |
||||||
|
irq_restore_user_regs |
||||||
|
|
||||||
|
.align 5
|
||||||
|
.globl fiq
|
||||||
|
fiq: |
||||||
|
get_fiq_stack |
||||||
|
/* someone ought to write a more effiction fiq_save_user_regs */ |
||||||
|
irq_save_user_regs |
||||||
|
bl do_fiq |
||||||
|
irq_restore_user_regs |
||||||
|
|
||||||
|
#else |
||||||
|
|
||||||
|
.align 5
|
||||||
|
.globl irq |
||||||
|
irq: |
||||||
|
get_bad_stack |
||||||
|
bad_save_user_regs |
||||||
|
bl do_irq |
||||||
|
|
||||||
|
.align 5
|
||||||
|
.globl fiq |
||||||
|
fiq: |
||||||
|
get_bad_stack |
||||||
|
bad_save_user_regs |
||||||
|
bl do_fiq |
||||||
|
|
||||||
|
#endif |
@ -0,0 +1,66 @@ |
|||||||
|
|
||||||
|
U-Boot for ARM Integrator Development Platforms |
||||||
|
|
||||||
|
Peter Pearse, ARM Ltd. |
||||||
|
peter.pearse@arm.com |
||||||
|
www.arm.com |
||||||
|
|
||||||
|
Manuals available from :- |
||||||
|
http://www.arm.com/products/DevTools/Hardware_Platforms.html |
||||||
|
|
||||||
|
Overview : |
||||||
|
-------- |
||||||
|
There are two Integrator variants - Integrator/AP and Integrator/CP. |
||||||
|
Each may be fitted with a variety of core modules (CMs). |
||||||
|
Each CM consists of a ARM processor core and associated hardware e.g |
||||||
|
FPGA implementing various controllers and/or register |
||||||
|
SSRAM |
||||||
|
SDRAM |
||||||
|
RAM controllers |
||||||
|
clock generators etc. |
||||||
|
|
||||||
|
Boot Methods : |
||||||
|
------------ |
||||||
|
Integrator platforms can be configured to use U-Boot in at least three ways :- |
||||||
|
a) Run ARM boot monitor, manually run U-Boot image from flash |
||||||
|
b) Run ARM boot monitor, automatically run U-Boot image from flash |
||||||
|
c) Run U-Boot image direct from flash. |
||||||
|
|
||||||
|
In cases a) and b) the ARM boot monitor will have configured the CM and mapped |
||||||
|
writeable memory to 0x00000000 in the Integrator address space. |
||||||
|
U-Boot has to carry out minimal configration before standard code is run. |
||||||
|
|
||||||
|
In case c) it may be necessary for U-Boot to perform CM dependent initialization. |
||||||
|
|
||||||
|
Configuring U-Boot : |
||||||
|
------------------ |
||||||
|
The makefile contains targets for Integrator platforms of both types |
||||||
|
fitted with all current variants of CM. If these targets are to be used with |
||||||
|
boot process c) above then CONFIG_INIT_CRITICAL may need to be defined to ensure |
||||||
|
that the CM is correctly configured. |
||||||
|
|
||||||
|
There are also targets independent of CM. These may not be suitable for |
||||||
|
boot process c) above. They have been preserved for backward compatibility with |
||||||
|
existing build processes. |
||||||
|
|
||||||
|
Code Hierarchy Applied : |
||||||
|
---------------------- |
||||||
|
Code specific to initialization of a particular ARM processor has been placed in |
||||||
|
cpu/arm<>/start.S so that it may be used by other boards. |
||||||
|
|
||||||
|
However, to avoid duplicating code through all processor files, a generic core |
||||||
|
for ARM Integrator CMs has been added |
||||||
|
|
||||||
|
cpu/arm_intcm |
||||||
|
|
||||||
|
Otherwise. for example, the standard CM reset via the CM control register would |
||||||
|
need placing in each CM processor file...... |
||||||
|
|
||||||
|
Code specific to the initialization of the CM, rather than the cpu, and initialization |
||||||
|
of the Integrator board itself, has been placed in |
||||||
|
|
||||||
|
board/integrator<>/platform.S |
||||||
|
board/integrator<>/integrator<>.c |
||||||
|
|
||||||
|
|
||||||
|
|
@ -0,0 +1,8 @@ |
|||||||
|
/************************************************
|
||||||
|
* NAME arm946es.h * |
||||||
|
* $Version$ * |
||||||
|
************************************************/ |
||||||
|
/* Currently empty */ |
||||||
|
#ifndef __ARM946ES_H__ |
||||||
|
#define __ARM946ES_H__ |
||||||
|
#endif /*__ARM946ES_H__*/ |
Loading…
Reference in new issue