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ARM: DRA7xx: Update pinmux data

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Updating pinmux data as specified in the latest DM

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Balaji T K <balajitk@ti.com>
master
Lokesh Vutla 12 years ago committed by Tom Rini
parent a5d439c2d3
commit 7f36c88f64
2 changed files with 29 additions and 16 deletions
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  1. 7
      arch/arm/include/asm/arch-omap5/mux_dra7xx.h
  2. 38
      board/ti/dra7xx/mux_data.h

7
arch/arm/include/asm/arch-omap5/mux_dra7xx.h
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@ -28,11 +28,14 @@
#include <asm/types.h> #include <asm/types.h>
#define FSC (1 << 19)
#define SSC (0 << 19)
#define IEN (1 << 18) #define IEN (1 << 18)
#define IDIS (0 << 18) #define IDIS (0 << 18)
#define PTU (3 << 16) #define PTU (1 << 17)
#define PTD (1 << 16) #define PTD (0 << 17)
#define PEN (1 << 16) #define PEN (1 << 16)
#define PDIS (0 << 16) #define PDIS (0 << 16)

38
board/ti/dra7xx/mux_data.h
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@ -29,19 +29,29 @@
#include <asm/arch/mux_dra7xx.h> #include <asm/arch/mux_dra7xx.h>
const struct pad_conf_entry core_padconf_array_essential[] = { const struct pad_conf_entry core_padconf_array_essential[] = {
{MMC1_CLK, (PTU | IEN | M0)}, /* MMC1_CLK */ {MMC1_CLK, (IEN | PTU | PDIS | M0)}, /* MMC1_CLK */
{MMC1_CMD, (PTU | IEN | M0)}, /* MMC1_CMD */ {MMC1_CMD, (IEN | PTU | PDIS | M0)}, /* MMC1_CMD */
{MMC1_DAT0, (PTU | IEN | M0)}, /* MMC1_DAT0 */ {MMC1_DAT0, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT0 */
{MMC1_DAT1, (PTU | IEN | M0)}, /* MMC1_DAT1 */ {MMC1_DAT1, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT1 */
{MMC1_DAT2, (PTU | IEN | M0)}, /* MMC1_DAT2 */ {MMC1_DAT2, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT2 */
{MMC1_DAT3, (PTU | IEN | M0)}, /* MMC1_DAT3 */ {MMC1_DAT3, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT3 */
{MMC1_SDCD, (PTU | IEN | M0)}, /* MMC1_SDCD */ {MMC1_SDCD, (FSC | IEN | PTU | PDIS | M0)}, /* MMC1_SDCD */
{MMC1_SDWP, (PTU | IEN | M0)}, /* MMC1_SDWP */ {MMC1_SDWP, (FSC | IEN | PTD | PEN | M14)}, /* MMC1_SDWP */
{UART1_RXD, (PTU | IEN | M0)}, /* UART1_RXD */ {GPMC_A19, (IEN | PTU | PDIS | M1)}, /* mmc2_dat4 */
{UART1_TXD, (M0)}, /* UART1_TXD */ {GPMC_A20, (IEN | PTU | PDIS | M1)}, /* mmc2_dat5 */
{UART1_CTSN, (PTU | IEN | M0)}, /* UART1_CTSN */ {GPMC_A21, (IEN | PTU | PDIS | M1)}, /* mmc2_dat6 */
{UART1_RTSN, (M0)}, /* UART1_RTSN */ {GPMC_A22, (IEN | PTU | PDIS | M1)}, /* mmc2_dat7 */
{I2C1_SDA, (PTU | IEN | M0)}, /* I2C1_SDA */ {GPMC_A23, (IEN | PTU | PDIS | M1)}, /* mmc2_clk */
{I2C1_SCL, (PTU | IEN | M0)}, /* I2C1_SCL */ {GPMC_A24, (IEN | PTU | PDIS | M1)}, /* mmc2_dat0 */
{GPMC_A25, (IEN | PTU | PDIS | M1)}, /* mmc2_dat1 */
{GPMC_A26, (IEN | PTU | PDIS | M1)}, /* mmc2_dat2 */
{GPMC_A27, (IEN | PTU | PDIS | M1)}, /* mmc2_dat3 */
{GPMC_CS1, (IEN | PTU | PDIS | M1)}, /* mmm2_cmd */
{UART1_RXD, (FSC | IEN | PTU | PDIS | M0)}, /* UART1_RXD */
{UART1_TXD, (FSC | IEN | PTU | PDIS | M0)}, /* UART1_TXD */
{UART1_CTSN, (IEN | PTU | PDIS | M3)}, /* UART1_CTSN */
{UART1_RTSN, (IEN | PTU | PDIS | M3)}, /* UART1_RTSN */
{I2C1_SDA, (IEN | PTU | PDIS | M0)}, /* I2C1_SDA */
{I2C1_SCL, (IEN | PTU | PDIS | M0)}, /* I2C1_SCL */
}; };
#endif /* _MUX_DATA_DRA7XX_H_ */ #endif /* _MUX_DATA_DRA7XX_H_ */

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