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#
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# (C) Copyright 2002
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
|
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# modify it under the terms of the GNU General Public License as
|
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
|
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk |
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LIB = lib$(BOARD).a
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OBJS = $(BOARD).o
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#OBJS += flash.o
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SOBJS = init.o
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$(LIB): $(OBJS) $(SOBJS) |
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$(AR) crv $@ $(OBJS)
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clean: |
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rm -f $(SOBJS) $(OBJS)
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distclean: clean |
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rm -f $(LIB) core *.bak .depend
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#########################################################################
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.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) |
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$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
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sinclude .depend |
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#########################################################################
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@ -0,0 +1,439 @@ |
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/*
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* (C) Copyright 2005 |
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* Stefan Roese, DENX Software Engineering, sr@denx.de. |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <asm/processor.h> |
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#include <spd_sdram.h> |
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int board_early_init_f(void) |
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{ |
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register uint reg; |
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/*--------------------------------------------------------------------
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* Setup the external bus controller/chip selects |
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*-------------------------------------------------------------------*/ |
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mtdcr(ebccfga, xbcfg); |
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reg = mfdcr(ebccfgd); |
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mtdcr(ebccfgd, reg | 0x04000000); /* Set ATC */ |
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#if 0 /* test-only */
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mtebc(pb0ap, 0x03017300); /* FLASH/SRAM */ |
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mtebc(pb0cr, 0xfe0ba000); /* BAS=0xfe0 32MB r/w 16-bit */ |
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mtebc(pb1ap, 0x00000000); |
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mtebc(pb1cr, 0x00000000); |
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mtebc(pb2ap, 0x04814500); |
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/*CPLD*/ mtebc(pb2cr, 0x80018000); /*BAS=0x800 1MB r/w 8-bit */ |
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#else |
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mtebc(pb0ap, 0x04055200); /* FLASH/SRAM */ |
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mtebc(pb0cr, 0xfff18000); /* BAS=0xfe0 1MB r/w 8-bit */ |
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#endif |
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mtebc(pb3ap, 0x00000000); |
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mtebc(pb3cr, 0x00000000); |
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mtebc(pb4ap, 0x00000000); |
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mtebc(pb4cr, 0x00000000); |
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mtebc(pb5ap, 0x00000000); |
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mtebc(pb5cr, 0x00000000); |
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/*--------------------------------------------------------------------
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* Setup the interrupt controller polarities, triggers, etc. |
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*-------------------------------------------------------------------*/ |
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mtdcr(uic0sr, 0xffffffff); /* clear all */ |
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mtdcr(uic0er, 0x00000000); /* disable all */ |
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mtdcr(uic0cr, 0x00000009); /* ATI & UIC1 crit are critical */ |
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mtdcr(uic0pr, 0xfffffe13); /* per ref-board manual */ |
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mtdcr(uic0tr, 0x01c00008); /* per ref-board manual */ |
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mtdcr(uic0vr, 0x00000001); /* int31 highest, base=0x000 */ |
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mtdcr(uic0sr, 0xffffffff); /* clear all */ |
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mtdcr(uic1sr, 0xffffffff); /* clear all */ |
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mtdcr(uic1er, 0x00000000); /* disable all */ |
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mtdcr(uic1cr, 0x00000000); /* all non-critical */ |
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mtdcr(uic1pr, 0xffffe0ff); /* per ref-board manual */ |
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mtdcr(uic1tr, 0x00ffc000); /* per ref-board manual */ |
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mtdcr(uic1vr, 0x00000001); /* int31 highest, base=0x000 */ |
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mtdcr(uic1sr, 0xffffffff); /* clear all */ |
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/*--------------------------------------------------------------------
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* Setup the GPIO pins |
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*-------------------------------------------------------------------*/ |
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/*CPLD cs */ |
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/*setup Address lines for flash sizes larger than 16Meg. */ |
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out32(GPIO0_OSRL, in32(GPIO0_OSRL) | 0x40010000); |
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out32(GPIO0_TSRL, in32(GPIO0_TSRL) | 0x40010000); |
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out32(GPIO0_ISR1L, in32(GPIO0_ISR1L) | 0x40000000); |
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/*setup emac */ |
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out32(GPIO0_TCR, in32(GPIO0_TCR) | 0xC080); |
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out32(GPIO0_TSRL, in32(GPIO0_TSRL) | 0x40); |
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out32(GPIO0_ISR1L, in32(GPIO0_ISR1L) | 0x55); |
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out32(GPIO0_OSRH, in32(GPIO0_OSRH) | 0x50004000); |
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out32(GPIO0_ISR1H, in32(GPIO0_ISR1H) | 0x00440000); |
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/*UART1 */ |
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out32(GPIO1_TCR, in32(GPIO1_TCR) | 0x02000000); |
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out32(GPIO1_OSRL, in32(GPIO1_OSRL) | 0x00080000); |
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out32(GPIO1_ISR2L, in32(GPIO1_ISR2L) | 0x00010000); |
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/*setup USB 2.0 */ |
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out32(GPIO1_TCR, in32(GPIO1_TCR) | 0xc0000000); |
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out32(GPIO1_OSRL, in32(GPIO1_OSRL) | 0x50000000); |
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out32(GPIO0_TCR, in32(GPIO0_TCR) | 0xf); |
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out32(GPIO0_OSRH, in32(GPIO0_OSRH) | 0xaa); |
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out32(GPIO0_ISR2H, in32(GPIO0_ISR2H) | 0x00000500); |
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/*--------------------------------------------------------------------
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* Setup other serial configuration |
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*-------------------------------------------------------------------*/ |
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mfsdr(sdr_pci0, reg); |
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mtsdr(sdr_pci0, 0x80000000 | reg); /* PCI arbiter enabled */ |
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mtsdr(sdr_pfc0, 0x00003e00); /* Pin function */ |
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mtsdr(sdr_pfc1, 0x00048000); /* Pin function: UART0 has 4 pins */ |
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#if 0 /* test-only */
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/*clear tmrclk divisor */ |
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*(unsigned char *)(CFG_BCSR_BASE | 0x04) = 0x00; |
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/*enable ethernet */ |
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*(unsigned char *)(CFG_BCSR_BASE | 0x08) = 0xf0; |
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/*enable usb 1.1 fs device and remove usb 2.0 reset */ |
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*(unsigned char *)(CFG_BCSR_BASE | 0x09) = 0x00; |
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/*get rid of flash write protect */ |
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*(unsigned char *)(CFG_BCSR_BASE | 0x07) = 0x40; |
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#endif |
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return 0; |
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} |
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int checkboard(void) |
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{ |
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sys_info_t sysinfo; |
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unsigned char *s = getenv("serial#"); |
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get_sys_info(&sysinfo); |
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printf("Board: Bamboo - AMCC PPC440EP Evaluation Board"); |
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if (s != NULL) { |
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puts(", serial# "); |
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puts(s); |
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} |
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putc('\n'); |
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printf("\tVCO: %lu MHz\n", sysinfo.freqVCOMhz / 1000000); |
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printf("\tCPU: %lu MHz\n", sysinfo.freqProcessor / 1000000); |
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printf("\tPLB: %lu MHz\n", sysinfo.freqPLB / 1000000); |
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printf("\tOPB: %lu MHz\n", sysinfo.freqOPB / 1000000); |
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printf("\tEPB: %lu MHz\n", sysinfo.freqEPB / 1000000); |
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return (0); |
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} |
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/*************************************************************************
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* sdram_init -- doesn't use serial presence detect. |
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* |
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* Assumes: 256 MB, ECC, non-registered |
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* PLB @ 133 MHz |
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* |
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************************************************************************/ |
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void sdram_init(void) |
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{ |
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register uint reg; |
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/*--------------------------------------------------------------------
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* Setup some default |
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*------------------------------------------------------------------*/ |
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mtsdram(mem_uabba, 0x00000000); /* ubba=0 (default) */ |
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mtsdram(mem_slio, 0x00000000); /* rdre=0 wrre=0 rarw=0 */ |
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mtsdram(mem_devopt, 0x00000000); /* dll=0 ds=0 (normal) */ |
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mtsdram(mem_clktr, 0x40000000); /* ?? */ |
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mtsdram(mem_wddctr, 0x40000000); /* ?? */ |
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/*clear this first, if the DDR is enabled by a debugger
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then you can not make changes. */ |
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mtsdram(mem_cfg0, 0x00000000); /* Disable EEC */ |
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/*--------------------------------------------------------------------
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* Setup for board-specific specific mem |
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*------------------------------------------------------------------*/ |
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/*
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* Following for CAS Latency = 2.5 @ 133 MHz PLB |
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*/ |
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mtsdram(mem_b0cr, 0x000a4001); /* SDBA=0x000 128MB, Mode 3, enabled */ |
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mtsdram(mem_b1cr, 0x080a4001); /* SDBA=0x080 128MB, Mode 3, enabled */ |
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mtsdram(mem_tr0, 0x410a4012); /* ?? */ |
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mtsdram(mem_tr1, 0x8080080b); /* ?? */ |
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mtsdram(mem_rtr, 0x04080000); /* ?? */ |
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mtsdram(mem_cfg1, 0x00000000); /* Self-refresh exit, disable PM */ |
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mtsdram(mem_cfg0, 0x34000000); /* Disable EEC */ |
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udelay(400); /* Delay 200 usecs (min) */ |
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/*--------------------------------------------------------------------
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* Enable the controller, then wait for DCEN to complete |
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*------------------------------------------------------------------*/ |
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mtsdram(mem_cfg0, 0x84000000); /* Enable */ |
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for (;;) { |
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mfsdram(mem_mcsts, reg); |
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if (reg & 0x80000000) |
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break; |
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} |
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} |
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/*************************************************************************
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* long int initdram |
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* |
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************************************************************************/ |
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long int initdram(int board) |
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{ |
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sdram_init(); |
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return CFG_SDRAM_BANKS * (CFG_KBYTES_SDRAM * 1024); /* return bytes */ |
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} |
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#if defined(CFG_DRAM_TEST) |
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int testdram(void) |
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{ |
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unsigned long *mem = (unsigned long *)0; |
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const unsigned long kend = (1024 / sizeof(unsigned long)); |
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unsigned long k, n; |
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mtmsr(0); |
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for (k = 0; k < CFG_KBYTES_SDRAM; |
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++k, mem += (1024 / sizeof(unsigned long))) { |
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if ((k & 1023) == 0) { |
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printf("%3d MB\r", k / 1024); |
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} |
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memset(mem, 0xaaaaaaaa, 1024); |
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for (n = 0; n < kend; ++n) { |
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if (mem[n] != 0xaaaaaaaa) { |
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printf("SDRAM test fails at: %08x\n", |
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(uint) & mem[n]); |
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return 1; |
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} |
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} |
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memset(mem, 0x55555555, 1024); |
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for (n = 0; n < kend; ++n) { |
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if (mem[n] != 0x55555555) { |
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printf("SDRAM test fails at: %08x\n", |
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(uint) & mem[n]); |
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return 1; |
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} |
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} |
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} |
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printf("SDRAM test passes\n"); |
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return 0; |
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} |
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#endif |
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/*************************************************************************
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* pci_pre_init |
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* |
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* This routine is called just prior to registering the hose and gives |
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* the board the opportunity to check things. Returning a value of zero |
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* indicates that things are bad & PCI initialization should be aborted. |
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* |
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* Different boards may wish to customize the pci controller structure |
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* (add regions, override default access routines, etc) or perform |
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* certain pre-initialization actions. |
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* |
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************************************************************************/ |
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#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) |
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int pci_pre_init(struct pci_controller *hose) |
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{ |
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unsigned long strap; |
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unsigned long addr; |
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/*--------------------------------------------------------------------------+
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* Bamboo is always configured as the host & requires the |
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* PCI arbiter to be enabled. |
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*--------------------------------------------------------------------------*/ |
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mfsdr(sdr_sdstp1, strap); |
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if ((strap & SDR0_SDSTP1_PAE_MASK) == 0) { |
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printf("PCI: SDR0_STRP1[PAE] not set.\n"); |
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printf("PCI: Configuration aborted.\n"); |
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return 0; |
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} |
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/*-------------------------------------------------------------------------+
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| Set priority for all PLB3 devices to 0. |
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| Set PLB3 arbiter to fair mode. |
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+-------------------------------------------------------------------------*/ |
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mfsdr(sdr_amp1, addr); |
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mtsdr(sdr_amp1, (addr & 0x000000FF) | 0x0000FF00); |
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addr = mfdcr(plb3_acr); |
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mtdcr(plb3_acr, addr | 0x80000000); |
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/*-------------------------------------------------------------------------+
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| Set priority for all PLB4 devices to 0. |
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+-------------------------------------------------------------------------*/ |
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mfsdr(sdr_amp0, addr); |
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mtsdr(sdr_amp0, (addr & 0x000000FF) | 0x0000FF00); |
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addr = mfdcr(plb4_acr) | 0xa0000000; /* Was 0x8---- */ |
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mtdcr(plb4_acr, addr); |
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/*-------------------------------------------------------------------------+
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| Set Nebula PLB4 arbiter to fair mode. |
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+-------------------------------------------------------------------------*/ |
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/* Segment0 */ |
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addr = (mfdcr(plb0_acr) & ~plb0_acr_ppm_mask) | plb0_acr_ppm_fair; |
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addr = (addr & ~plb0_acr_hbu_mask) | plb0_acr_hbu_enabled; |
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addr = (addr & ~plb0_acr_rdp_mask) | plb0_acr_rdp_4deep; |
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addr = (addr & ~plb0_acr_wrp_mask) | plb0_acr_wrp_2deep; |
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mtdcr(plb0_acr, addr); |
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/* Segment1 */ |
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addr = (mfdcr(plb1_acr) & ~plb1_acr_ppm_mask) | plb1_acr_ppm_fair; |
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addr = (addr & ~plb1_acr_hbu_mask) | plb1_acr_hbu_enabled; |
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addr = (addr & ~plb1_acr_rdp_mask) | plb1_acr_rdp_4deep; |
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addr = (addr & ~plb1_acr_wrp_mask) | plb1_acr_wrp_2deep; |
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mtdcr(plb1_acr, addr); |
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return 1; |
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} |
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#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */ |
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/*************************************************************************
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* pci_target_init |
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* |
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* The bootstrap configuration provides default settings for the pci |
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* inbound map (PIM). But the bootstrap config choices are limited and |
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* may not be sufficient for a given board. |
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* |
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************************************************************************/ |
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#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) |
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void pci_target_init(struct pci_controller *hose) |
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{ |
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/*--------------------------------------------------------------------------+
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* Set up Direct MMIO registers |
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*--------------------------------------------------------------------------*/ |
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/*--------------------------------------------------------------------------+
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| PowerPC440 EP PCI Master configuration. |
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| Map one 1Gig range of PLB/processor addresses to PCI memory space. |
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| PLB address 0xA0000000-0xDFFFFFFF ==> PCI address 0xA0000000-0xDFFFFFFF |
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| Use byte reversed out routines to handle endianess. |
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| Make this region non-prefetchable. |
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+--------------------------------------------------------------------------*/ |
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out32r(PCIX0_PMM0MA, 0x00000000); /* PMM0 Mask/Attribute - disabled b4 setting */ |
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out32r(PCIX0_PMM0LA, CFG_PCI_MEMBASE); /* PMM0 Local Address */ |
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out32r(PCIX0_PMM0PCILA, CFG_PCI_MEMBASE); /* PMM0 PCI Low Address */ |
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out32r(PCIX0_PMM0PCIHA, 0x00000000); /* PMM0 PCI High Address */ |
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out32r(PCIX0_PMM0MA, 0xE0000001); /* 512M + No prefetching, and enable region */ |
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out32r(PCIX0_PMM1MA, 0x00000000); /* PMM0 Mask/Attribute - disabled b4 setting */ |
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out32r(PCIX0_PMM1LA, CFG_PCI_MEMBASE2); /* PMM0 Local Address */ |
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out32r(PCIX0_PMM1PCILA, CFG_PCI_MEMBASE2); /* PMM0 PCI Low Address */ |
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out32r(PCIX0_PMM1PCIHA, 0x00000000); /* PMM0 PCI High Address */ |
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out32r(PCIX0_PMM1MA, 0xE0000001); /* 512M + No prefetching, and enable region */ |
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out32r(PCIX0_PTM1MS, 0x00000001); /* Memory Size/Attribute */ |
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out32r(PCIX0_PTM1LA, 0); /* Local Addr. Reg */ |
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out32r(PCIX0_PTM2MS, 0); /* Memory Size/Attribute */ |
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out32r(PCIX0_PTM2LA, 0); /* Local Addr. Reg */ |
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/*--------------------------------------------------------------------------+
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* Set up Configuration registers |
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*--------------------------------------------------------------------------*/ |
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/* Program the board's subsystem id/vendor id */ |
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pci_write_config_word(0, PCI_SUBSYSTEM_VENDOR_ID, |
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CFG_PCI_SUBSYS_VENDORID); |
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pci_write_config_word(0, PCI_SUBSYSTEM_ID, CFG_PCI_SUBSYS_ID); |
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|
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/* Configure command register as bus master */ |
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pci_write_config_word(0, PCI_COMMAND, PCI_COMMAND_MASTER); |
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/* 240nS PCI clock */ |
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pci_write_config_word(0, PCI_LATENCY_TIMER, 1); |
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/* No error reporting */ |
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pci_write_config_word(0, PCI_ERREN, 0); |
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pci_write_config_dword(0, PCI_BRDGOPT2, 0x00000101); |
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} |
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#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) */ |
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|
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/*************************************************************************
|
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* pci_master_init |
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* |
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************************************************************************/ |
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#if defined(CONFIG_PCI) && defined(CFG_PCI_MASTER_INIT) |
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void pci_master_init(struct pci_controller *hose) |
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{ |
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unsigned short temp_short; |
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|
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/*--------------------------------------------------------------------------+
|
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| Write the PowerPC440 EP PCI Configuration regs. |
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| Enable PowerPC440 EP to be a master on the PCI bus (PMM). |
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| Enable PowerPC440 EP to act as a PCI memory target (PTM). |
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+--------------------------------------------------------------------------*/ |
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pci_read_config_word(0, PCI_COMMAND, &temp_short); |
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pci_write_config_word(0, PCI_COMMAND, |
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temp_short | PCI_COMMAND_MASTER | |
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PCI_COMMAND_MEMORY); |
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} |
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#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_MASTER_INIT) */ |
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|
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/*************************************************************************
|
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* is_pci_host |
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* |
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* This routine is called to determine if a pci scan should be |
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* performed. With various hardware environments (especially cPCI and |
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* PPMC) it's insufficient to depend on the state of the arbiter enable |
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* bit in the strap register, or generic host/adapter assumptions. |
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* |
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* Rather than hard-code a bad assumption in the general 440 code, the |
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* 440 pci code requires the board to decide at runtime. |
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* |
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* Return 0 for adapter mode, non-zero for host (monarch) mode. |
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* |
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* |
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************************************************************************/ |
||||
#if defined(CONFIG_PCI) |
||||
int is_pci_host(struct pci_controller *hose) |
||||
{ |
||||
/* Bamboo is always configured as host. */ |
||||
return (1); |
||||
} |
||||
#endif /* defined(CONFIG_PCI) */ |
||||
|
||||
/*************************************************************************
|
||||
* hw_watchdog_reset |
||||
* |
||||
* This routine is called to reset (keep alive) the watchdog timer |
||||
* |
||||
************************************************************************/ |
||||
#if defined(CONFIG_HW_WATCHDOG) |
||||
void hw_watchdog_reset(void) |
||||
{ |
||||
|
||||
} |
||||
#endif |
@ -0,0 +1,44 @@ |
||||
#
|
||||
# (C) Copyright 2002
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
#
|
||||
# esd ADCIOP boards
|
||||
#
|
||||
|
||||
#TEXT_BASE = 0x00001000
|
||||
|
||||
ifeq ($(ramsym),1) |
||||
TEXT_BASE = 0xFBD00000
|
||||
else |
||||
TEXT_BASE = 0xFFF80000
|
||||
endif |
||||
|
||||
PLATFORM_CPPFLAGS += -DCONFIG_440=1
|
||||
|
||||
ifeq ($(debug),1) |
||||
PLATFORM_CPPFLAGS += -DDEBUG
|
||||
endif |
||||
|
||||
ifeq ($(dbcr),1) |
||||
PLATFORM_CPPFLAGS += -DCFG_INIT_DBCR=0x8cff0000
|
||||
endif |
@ -0,0 +1,107 @@ |
||||
/* |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#include <ppc_asm.tmpl> |
||||
#include <config.h> |
||||
|
||||
/* General */ |
||||
#define TLB_VALID 0x00000200 |
||||
|
||||
/* Supported page sizes */ |
||||
|
||||
#define SZ_1K 0x00000000 |
||||
#define SZ_4K 0x00000010 |
||||
#define SZ_16K 0x00000020 |
||||
#define SZ_64K 0x00000030 |
||||
#define SZ_256K 0x00000040 |
||||
#define SZ_1M 0x00000050 |
||||
#define SZ_8M 0x00000060 |
||||
#define SZ_16M 0x00000070 |
||||
#define SZ_256M 0x00000090 |
||||
|
||||
/* Storage attributes */ |
||||
#define SA_W 0x00000800 /* Write-through */ |
||||
#define SA_I 0x00000400 /* Caching inhibited */ |
||||
#define SA_M 0x00000200 /* Memory coherence */ |
||||
#define SA_G 0x00000100 /* Guarded */ |
||||
#define SA_E 0x00000080 /* Endian */ |
||||
|
||||
/* Access control */ |
||||
#define AC_X 0x00000024 /* Execute */ |
||||
#define AC_W 0x00000012 /* Write */ |
||||
#define AC_R 0x00000009 /* Read */ |
||||
|
||||
/* Some handy macros */ |
||||
|
||||
#define EPN(e) ((e) & 0xfffffc00) |
||||
#define TLB0(epn,sz) ( (EPN((epn)) | (sz) | TLB_VALID ) ) |
||||
#define TLB1(rpn,erpn) ( ((rpn)&0xfffffc00) | (erpn) ) |
||||
#define TLB2(a) ( (a)&0x00000fbf ) |
||||
|
||||
#define tlbtab_start\ |
||||
mflr r1 ;\
|
||||
bl 0f ;
|
||||
|
||||
#define tlbtab_end\ |
||||
.long 0, 0, 0 ; \
|
||||
0: mflr r0 ; \
|
||||
mtlr r1 ; \
|
||||
blr ;
|
||||
|
||||
#define tlbentry(epn,sz,rpn,erpn,attr)\ |
||||
.long TLB0(epn,sz),TLB1(rpn,erpn),TLB2(attr) |
||||
|
||||
|
||||
/************************************************************************** |
||||
* TLB TABLE |
||||
* |
||||
* This table is used by the cpu boot code to setup the initial tlb |
||||
* entries. Rather than make broad assumptions in the cpu source tree, |
||||
* this table lets each board set things up however they like. |
||||
* |
||||
* Pointer to the table is returned in r1 |
||||
* |
||||
*************************************************************************/ |
||||
|
||||
.section .bootpg,"ax" |
||||
.globl tlbtab
|
||||
|
||||
tlbtab: |
||||
tlbtab_start |
||||
/* |
||||
0xf0000000 must be first, before relocation SA_I must be off to use the |
||||
dcache as stack. It is patched after relocation to enable SA_I |
||||
*/ |
||||
tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 0, AC_R|AC_W|AC_X|SA_G/*|SA_I*/) |
||||
tlbentry( CFG_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) |
||||
tlbentry( CFG_PCI_BASE, SZ_256M, 0xE0000000, 0, AC_R|AC_W|SA_G|SA_I ) |
||||
tlbentry( CFG_NVRAM_BASE_ADDR, SZ_16K, 0x80000000, 0, AC_R|AC_W|AC_X|SA_W|SA_I ) |
||||
|
||||
/* PCI */ |
||||
tlbentry( CFG_PCI_MEMBASE, SZ_256M, CFG_PCI_MEMBASE, 0, AC_R|AC_W|SA_G|SA_I ) |
||||
tlbentry( CFG_PCI_MEMBASE1, SZ_256M, CFG_PCI_MEMBASE1, 0, AC_R|AC_W|SA_G|SA_I ) |
||||
tlbentry( CFG_PCI_MEMBASE2, SZ_256M, CFG_PCI_MEMBASE2, 0, AC_R|AC_W|SA_G|SA_I ) |
||||
tlbentry( CFG_PCI_MEMBASE3, SZ_256M, CFG_PCI_MEMBASE3, 0, AC_R|AC_W|SA_G|SA_I ) |
||||
|
||||
/* USB 2.0 Device */ |
||||
tlbentry( CFG_USB_DEVICE, SZ_1K, 0x50000000, 0, AC_R|AC_W|SA_G|SA_I ) |
||||
|
||||
tlbtab_end |
@ -0,0 +1,155 @@ |
||||
/* |
||||
* (C) Copyright 2002 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
OUTPUT_ARCH(powerpc) |
||||
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); |
||||
/* Do we need any of these for elf? |
||||
__DYNAMIC = 0; */ |
||||
SECTIONS |
||||
{ |
||||
.resetvec 0xFFFFFFFC : |
||||
{ |
||||
*(.resetvec) |
||||
} = 0xffff |
||||
|
||||
.bootpg 0xFFFFF000 : |
||||
{ |
||||
cpu/ppc4xx/start.o (.bootpg) |
||||
} = 0xffff |
||||
|
||||
/* Read-only sections, merged into text segment: */ |
||||
. = + SIZEOF_HEADERS; |
||||
.interp : { *(.interp) } |
||||
.hash : { *(.hash) } |
||||
.dynsym : { *(.dynsym) } |
||||
.dynstr : { *(.dynstr) } |
||||
.rel.text : { *(.rel.text) } |
||||
.rela.text : { *(.rela.text) } |
||||
.rel.data : { *(.rel.data) } |
||||
.rela.data : { *(.rela.data) } |
||||
.rel.rodata : { *(.rel.rodata) } |
||||
.rela.rodata : { *(.rela.rodata) } |
||||
.rel.got : { *(.rel.got) } |
||||
.rela.got : { *(.rela.got) } |
||||
.rel.ctors : { *(.rel.ctors) } |
||||
.rela.ctors : { *(.rela.ctors) } |
||||
.rel.dtors : { *(.rel.dtors) } |
||||
.rela.dtors : { *(.rela.dtors) } |
||||
.rel.bss : { *(.rel.bss) } |
||||
.rela.bss : { *(.rela.bss) } |
||||
.rel.plt : { *(.rel.plt) } |
||||
.rela.plt : { *(.rela.plt) } |
||||
.init : { *(.init) } |
||||
.plt : { *(.plt) } |
||||
.text : |
||||
{ |
||||
/* WARNING - the following is hand-optimized to fit within */ |
||||
/* the sector layout of our flash chips! XXX FIXME XXX */ |
||||
|
||||
cpu/ppc4xx/start.o (.text) |
||||
board/amcc/bamboo/init.o (.text) |
||||
cpu/ppc4xx/kgdb.o (.text) |
||||
cpu/ppc4xx/traps.o (.text) |
||||
cpu/ppc4xx/interrupts.o (.text) |
||||
cpu/ppc4xx/serial.o (.text) |
||||
cpu/ppc4xx/cpu_init.o (.text) |
||||
cpu/ppc4xx/speed.o (.text) |
||||
cpu/ppc4xx/405gp_enet.o (.text) |
||||
common/dlmalloc.o (.text) |
||||
lib_generic/crc32.o (.text) |
||||
lib_ppc/extable.o (.text) |
||||
lib_generic/zlib.o (.text) |
||||
|
||||
/* . = env_offset;*/ |
||||
/* common/environment.o(.text)*/ |
||||
|
||||
*(.text) |
||||
*(.fixup) |
||||
*(.got1) |
||||
} |
||||
_etext = .; |
||||
PROVIDE (etext = .); |
||||
.rodata : |
||||
{ |
||||
*(.rodata) |
||||
*(.rodata1) |
||||
*(.rodata.str1.4) |
||||
} |
||||
.fini : { *(.fini) } =0 |
||||
.ctors : { *(.ctors) } |
||||
.dtors : { *(.dtors) } |
||||
|
||||
/* Read-write section, merged into data segment: */ |
||||
. = (. + 0x00FF) & 0xFFFFFF00; |
||||
_erotext = .; |
||||
PROVIDE (erotext = .); |
||||
.reloc : |
||||
{ |
||||
*(.got) |
||||
_GOT2_TABLE_ = .; |
||||
*(.got2) |
||||
_FIXUP_TABLE_ = .; |
||||
*(.fixup) |
||||
} |
||||
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; |
||||
__fixup_entries = (. - _FIXUP_TABLE_)>>2; |
||||
|
||||
.data : |
||||
{ |
||||
*(.data) |
||||
*(.data1) |
||||
*(.sdata) |
||||
*(.sdata2) |
||||
*(.dynamic) |
||||
CONSTRUCTORS |
||||
} |
||||
_edata = .; |
||||
PROVIDE (edata = .); |
||||
|
||||
__u_boot_cmd_start = .; |
||||
.u_boot_cmd : { *(.u_boot_cmd) } |
||||
__u_boot_cmd_end = .; |
||||
|
||||
|
||||
__start___ex_table = .; |
||||
__ex_table : { *(__ex_table) } |
||||
__stop___ex_table = .; |
||||
|
||||
. = ALIGN(256); |
||||
__init_begin = .; |
||||
.text.init : { *(.text.init) } |
||||
.data.init : { *(.data.init) } |
||||
. = ALIGN(256); |
||||
__init_end = .; |
||||
|
||||
__bss_start = .; |
||||
.bss : |
||||
{ |
||||
*(.sbss) *(.scommon) |
||||
*(.dynbss) |
||||
*(.bss) |
||||
*(COMMON) |
||||
} |
||||
_end = . ; |
||||
PROVIDE (end = .); |
||||
} |
@ -0,0 +1,84 @@ |
||||
/*
|
||||
* (C) Copyright 2000-2005 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
long int spd_sdram(void); |
||||
|
||||
#include <common.h> |
||||
#include <asm/processor.h> |
||||
|
||||
int board_early_init_f(void) |
||||
{ |
||||
mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */ |
||||
mtdcr(uicer, 0x00000000); /* disable all ints */ |
||||
mtdcr(uiccr, 0x00000010); |
||||
mtdcr(uicpr, 0xFFFF7FF0); /* set int polarities */ |
||||
mtdcr(uictr, 0x00000010); /* set int trigger levels */ |
||||
mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */ |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
/*
|
||||
* Check Board Identity: |
||||
*/ |
||||
int checkboard(void) |
||||
{ |
||||
unsigned char *s = getenv("serial#"); |
||||
|
||||
puts("Board: Bubinga - AMCC PPC405EP Evaluation Board"); |
||||
|
||||
if (s != NULL) { |
||||
puts(", serial# "); |
||||
puts(s); |
||||
} |
||||
putc('\n'); |
||||
|
||||
return (0); |
||||
} |
||||
|
||||
/*
|
||||
* sdram_init - Dummy implementation for start.S, spd_sdram used on this board! |
||||
*/ |
||||
void sdram_init(void) |
||||
{ |
||||
return; |
||||
} |
||||
|
||||
/* -------------------------------------------------------------------------
|
||||
initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of |
||||
the necessary info for SDRAM controller configuration |
||||
------------------------------------------------------------------------- */ |
||||
long int initdram(int board_type) |
||||
{ |
||||
long int ret; |
||||
|
||||
ret = spd_sdram(); |
||||
return ret; |
||||
} |
||||
|
||||
int testdram(void) |
||||
{ |
||||
/* TODO: XXX XXX XXX */ |
||||
printf("test: xxx MB - ok\n"); |
||||
|
||||
return (0); |
||||
} |
@ -0,0 +1,204 @@ |
||||
/*
|
||||
* (C) Copyright 2000 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
/*
|
||||
* Modified 4/5/2001 |
||||
* Wait for completion of each sector erase command issued |
||||
* 4/5/2001 |
||||
* Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <ppc4xx.h> |
||||
#include <asm/processor.h> |
||||
|
||||
flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ |
||||
|
||||
#undef DEBUG |
||||
#ifdef DEBUG |
||||
#define DEBUGF(x...) printf(x) |
||||
#else |
||||
#define DEBUGF(x...) |
||||
#endif /* DEBUG */ |
||||
|
||||
/*
|
||||
* include common flash code (for amcc boards) |
||||
*/ |
||||
#include "../common/flash.c" |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Functions |
||||
*/ |
||||
static ulong flash_get_size(vu_long * addr, flash_info_t * info); |
||||
static void flash_get_offsets(ulong base, flash_info_t * info); |
||||
|
||||
unsigned long flash_init(void) |
||||
{ |
||||
unsigned long size_b0, size_b1; |
||||
int i; |
||||
uint pbcr; |
||||
unsigned long base_b0, base_b1; |
||||
|
||||
/* Init: no FLASHes known */ |
||||
for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) { |
||||
flash_info[i].flash_id = FLASH_UNKNOWN; |
||||
} |
||||
|
||||
/* Static FLASH Bank configuration here - FIXME XXX */ |
||||
|
||||
size_b0 = |
||||
flash_get_size((vu_long *) FLASH_BASE0_PRELIM, &flash_info[0]); |
||||
|
||||
if (flash_info[0].flash_id == FLASH_UNKNOWN) { |
||||
printf("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", |
||||
size_b0, size_b0 << 20); |
||||
} |
||||
|
||||
/* Only one bank */ |
||||
if (CFG_MAX_FLASH_BANKS == 1) { |
||||
/* Setup offsets */ |
||||
flash_get_offsets(FLASH_BASE0_PRELIM, &flash_info[0]); |
||||
|
||||
/* Monitor protection ON by default */ |
||||
(void)flash_protect(FLAG_PROTECT_SET, |
||||
CFG_MONITOR_BASE, |
||||
CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1, |
||||
&flash_info[0]); |
||||
#ifdef CFG_ENV_IS_IN_FLASH |
||||
(void)flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR, |
||||
CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1, |
||||
&flash_info[0]); |
||||
(void)flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR_REDUND, |
||||
CFG_ENV_ADDR_REDUND + CFG_ENV_SECT_SIZE - 1, |
||||
&flash_info[0]); |
||||
#endif |
||||
|
||||
size_b1 = 0; |
||||
flash_info[0].size = size_b0; |
||||
} |
||||
|
||||
/* 2 banks */ |
||||
else { |
||||
size_b1 = |
||||
flash_get_size((vu_long *) FLASH_BASE1_PRELIM, |
||||
&flash_info[1]); |
||||
|
||||
/* Re-do sizing to get full correct info */ |
||||
|
||||
if (size_b1) { |
||||
mtdcr(ebccfga, pb0cr); |
||||
pbcr = mfdcr(ebccfgd); |
||||
mtdcr(ebccfga, pb0cr); |
||||
base_b1 = -size_b1; |
||||
pbcr = (pbcr & 0x0001ffff) | base_b1 | |
||||
(((size_b1 / 1024 / 1024) - 1) << 17); |
||||
mtdcr(ebccfgd, pbcr); |
||||
/* printf("pb1cr = %x\n", pbcr); */ |
||||
} |
||||
|
||||
if (size_b0) { |
||||
mtdcr(ebccfga, pb1cr); |
||||
pbcr = mfdcr(ebccfgd); |
||||
mtdcr(ebccfga, pb1cr); |
||||
base_b0 = base_b1 - size_b0; |
||||
pbcr = (pbcr & 0x0001ffff) | base_b0 | |
||||
(((size_b0 / 1024 / 1024) - 1) << 17); |
||||
mtdcr(ebccfgd, pbcr); |
||||
/* printf("pb0cr = %x\n", pbcr); */ |
||||
} |
||||
|
||||
size_b0 = flash_get_size((vu_long *) base_b0, &flash_info[0]); |
||||
|
||||
flash_get_offsets(base_b0, &flash_info[0]); |
||||
|
||||
/* monitor protection ON by default */ |
||||
(void)flash_protect(FLAG_PROTECT_SET, |
||||
base_b0 + size_b0 - CFG_MONITOR_LEN, |
||||
base_b0 + size_b0 - 1, &flash_info[0]); |
||||
/* Also protect sector containing initial power-up instruction */ |
||||
/* (flash_protect() checks address range - other call ignored) */ |
||||
(void)flash_protect(FLAG_PROTECT_SET, |
||||
0xFFFFFFFC, 0xFFFFFFFF, &flash_info[0]); |
||||
(void)flash_protect(FLAG_PROTECT_SET, |
||||
0xFFFFFFFC, 0xFFFFFFFF, &flash_info[1]); |
||||
|
||||
if (size_b1) { |
||||
/* Re-do sizing to get full correct info */ |
||||
size_b1 = |
||||
flash_get_size((vu_long *) base_b1, &flash_info[1]); |
||||
|
||||
flash_get_offsets(base_b1, &flash_info[1]); |
||||
|
||||
/* monitor protection ON by default */ |
||||
(void)flash_protect(FLAG_PROTECT_SET, |
||||
base_b1 + size_b1 - CFG_MONITOR_LEN, |
||||
base_b1 + size_b1 - 1, |
||||
&flash_info[1]); |
||||
/* monitor protection OFF by default (one is enough) */ |
||||
(void)flash_protect(FLAG_PROTECT_CLEAR, |
||||
base_b0 + size_b0 - CFG_MONITOR_LEN, |
||||
base_b0 + size_b0 - 1, |
||||
&flash_info[0]); |
||||
} else { |
||||
flash_info[1].flash_id = FLASH_UNKNOWN; |
||||
flash_info[1].sector_count = -1; |
||||
} |
||||
|
||||
flash_info[0].size = size_b0; |
||||
flash_info[1].size = size_b1; |
||||
} /* else 2 banks */ |
||||
return (size_b0 + size_b1); |
||||
} |
||||
|
||||
static void flash_get_offsets(ulong base, flash_info_t * info) |
||||
{ |
||||
int i; |
||||
|
||||
/* set up sector start address table */ |
||||
if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) || |
||||
(info->flash_id == FLASH_AM040)) { |
||||
for (i = 0; i < info->sector_count; i++) |
||||
info->start[i] = base + (i * 0x00010000); |
||||
} else { |
||||
if (info->flash_id & FLASH_BTYPE) { |
||||
/* set sector offsets for bottom boot block type */ |
||||
info->start[0] = base + 0x00000000; |
||||
info->start[1] = base + 0x00004000; |
||||
info->start[2] = base + 0x00006000; |
||||
info->start[3] = base + 0x00008000; |
||||
for (i = 4; i < info->sector_count; i++) { |
||||
info->start[i] = |
||||
base + (i * 0x00010000) - 0x00030000; |
||||
} |
||||
} else { |
||||
/* set sector offsets for top boot block type */ |
||||
i = info->sector_count - 1; |
||||
info->start[i--] = base + info->size - 0x00004000; |
||||
info->start[i--] = base + info->size - 0x00006000; |
||||
info->start[i--] = base + info->size - 0x00008000; |
||||
for (; i >= 0; i--) { |
||||
info->start[i] = base + i * 0x00010000; |
||||
} |
||||
} |
||||
} |
||||
} |
@ -0,0 +1,140 @@ |
||||
/*
|
||||
* (C) Copyright 2002 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* (C) Copyright 2002 Jun Gu <jung@artesyncp.com> |
||||
* Add support for Am29F016D and dynamic switch setting. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
/*
|
||||
* Modified 4/5/2001 |
||||
* Wait for completion of each sector erase command issued |
||||
* 4/5/2001 |
||||
* Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <ppc4xx.h> |
||||
#include <asm/processor.h> |
||||
|
||||
#undef DEBUG |
||||
#ifdef DEBUG |
||||
#define DEBUGF(x...) printf(x) |
||||
#else |
||||
#define DEBUGF(x...) |
||||
#endif /* DEBUG */ |
||||
|
||||
#define BOOT_SMALL_FLASH 32 /* 00100000 */ |
||||
#define FLASH_ONBD_N 2 /* 00000010 */ |
||||
#define FLASH_SRAM_SEL 1 /* 00000001 */ |
||||
|
||||
#define BOOT_SMALL_FLASH_VAL 4 |
||||
#define FLASH_ONBD_N_VAL 2 |
||||
#define FLASH_SRAM_SEL_VAL 1 |
||||
|
||||
static unsigned long flash_addr_table[8][CFG_MAX_FLASH_BANKS] = { |
||||
{0xffc00000, 0xffe00000, 0xff880000}, /* 0:000: configuraton 3 */ |
||||
{0xffc00000, 0xffe00000, 0xff800000}, /* 1:001: configuraton 4 */ |
||||
{0xffc00000, 0xffe00000, 0x00000000}, /* 2:010: configuraton 7 */ |
||||
{0xffc00000, 0xffe00000, 0x00000000}, /* 3:011: configuraton 8 */ |
||||
{0xff800000, 0xffa00000, 0xfff80000}, /* 4:100: configuraton 1 */ |
||||
{0xff800000, 0xffa00000, 0xfff00000}, /* 5:101: configuraton 2 */ |
||||
{0xffc00000, 0xffe00000, 0x00000000}, /* 6:110: configuraton 5 */ |
||||
{0xffc00000, 0xffe00000, 0x00000000} /* 7:111: configuraton 6 */ |
||||
}; |
||||
|
||||
/*
|
||||
* include common flash code (for amcc boards) |
||||
*/ |
||||
#include "../common/flash.c" |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Functions |
||||
*/ |
||||
static ulong flash_get_size(vu_long * addr, flash_info_t * info); |
||||
|
||||
unsigned long flash_init(void) |
||||
{ |
||||
unsigned long total_b = 0; |
||||
unsigned long size_b[CFG_MAX_FLASH_BANKS]; |
||||
unsigned char *fpga_base = (unsigned char *)CFG_FPGA_BASE; |
||||
unsigned char switch_status; |
||||
unsigned short index = 0; |
||||
int i; |
||||
|
||||
/* read FPGA base register FPGA_REG0 */ |
||||
switch_status = *fpga_base; |
||||
|
||||
/* check the bitmap of switch status */ |
||||
if (switch_status & BOOT_SMALL_FLASH) { |
||||
index += BOOT_SMALL_FLASH_VAL; |
||||
} |
||||
if (switch_status & FLASH_ONBD_N) { |
||||
index += FLASH_ONBD_N_VAL; |
||||
} |
||||
if (switch_status & FLASH_SRAM_SEL) { |
||||
index += FLASH_SRAM_SEL_VAL; |
||||
} |
||||
|
||||
DEBUGF("\n"); |
||||
DEBUGF("FLASH: Index: %d\n", index); |
||||
|
||||
/* Init: no FLASHes known */ |
||||
for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) { |
||||
flash_info[i].flash_id = FLASH_UNKNOWN; |
||||
flash_info[i].sector_count = -1; |
||||
flash_info[i].size = 0; |
||||
|
||||
/* check whether the address is 0 */ |
||||
if (flash_addr_table[index][i] == 0) { |
||||
continue; |
||||
} |
||||
|
||||
/* call flash_get_size() to initialize sector address */ |
||||
size_b[i] = flash_get_size((vu_long *) |
||||
flash_addr_table[index][i], |
||||
&flash_info[i]); |
||||
flash_info[i].size = size_b[i]; |
||||
if (flash_info[i].flash_id == FLASH_UNKNOWN) { |
||||
printf("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n", |
||||
i, size_b[i], size_b[i] << 20); |
||||
flash_info[i].sector_count = -1; |
||||
flash_info[i].size = 0; |
||||
} |
||||
|
||||
/* Monitor protection ON by default */ |
||||
(void)flash_protect(FLAG_PROTECT_SET, CFG_MONITOR_BASE, |
||||
CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1, |
||||
&flash_info[2]); |
||||
#ifdef CFG_ENV_IS_IN_FLASH |
||||
(void)flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR, |
||||
CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1, |
||||
&flash_info[2]); |
||||
(void)flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR_REDUND, |
||||
CFG_ENV_ADDR_REDUND + CFG_ENV_SECT_SIZE - 1, |
||||
&flash_info[2]); |
||||
#endif |
||||
|
||||
total_b += flash_info[i].size; |
||||
} |
||||
|
||||
return total_b; |
||||
} |
@ -0,0 +1,150 @@ |
||||
/*
|
||||
* (C) Copyright 2004-2005 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* (C) Copyright 2002 Jun Gu <jung@artesyncp.com> |
||||
* Add support for Am29F016D and dynamic switch setting. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
/*
|
||||
* Modified 4/5/2001 |
||||
* Wait for completion of each sector erase command issued |
||||
* 4/5/2001 |
||||
* Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <ppc4xx.h> |
||||
#include <asm/processor.h> |
||||
|
||||
#undef DEBUG |
||||
|
||||
#ifdef DEBUG |
||||
#define DEBUGF(x...) printf(x) |
||||
#else |
||||
#define DEBUGF(x...) |
||||
#endif /* DEBUG */ |
||||
|
||||
#define BOOT_SMALL_FLASH 0x40 /* 01000000 */ |
||||
#define FLASH_ONBD_N 2 /* 00000010 */ |
||||
#define FLASH_SRAM_SEL 1 /* 00000001 */ |
||||
#define FLASH_ONBD_N 2 /* 00000010 */ |
||||
#define FLASH_SRAM_SEL 1 /* 00000001 */ |
||||
|
||||
#define BOOT_SMALL_FLASH_VAL 4 |
||||
#define FLASH_ONBD_N_VAL 2 |
||||
#define FLASH_SRAM_SEL_VAL 1 |
||||
|
||||
flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ |
||||
|
||||
static unsigned long flash_addr_table[8][CFG_MAX_FLASH_BANKS] = { |
||||
{0xFF800000, 0xFF880000, 0xFFC00000}, /* 0:000: configuraton 4 */ |
||||
{0xFF900000, 0xFF980000, 0xFFC00000}, /* 1:001: configuraton 3 */ |
||||
{0x00000000, 0x00000000, 0x00000000}, /* 2:010: configuraton 8 */ |
||||
{0x00000000, 0x00000000, 0x00000000}, /* 3:011: configuraton 7 */ |
||||
{0xFFE00000, 0xFFF00000, 0xFF800000}, /* 4:100: configuraton 2 */ |
||||
{0xFFF00000, 0xFFF80000, 0xFF800000}, /* 5:101: configuraton 1 */ |
||||
{0x00000000, 0x00000000, 0x00000000}, /* 6:110: configuraton 6 */ |
||||
{0x00000000, 0x00000000, 0x00000000} /* 7:111: configuraton 5 */ |
||||
}; |
||||
|
||||
/*
|
||||
* include common flash code (for amcc boards) |
||||
*/ |
||||
#include "../common/flash.c" |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Functions |
||||
*/ |
||||
static ulong flash_get_size(vu_long * addr, flash_info_t * info); |
||||
static int write_word(flash_info_t * info, ulong dest, ulong data); |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
|
||||
unsigned long flash_init(void) |
||||
{ |
||||
unsigned long total_b = 0; |
||||
unsigned long size_b[CFG_MAX_FLASH_BANKS]; |
||||
unsigned char *fpga_base = (unsigned char *)CFG_FPGA_BASE; |
||||
unsigned char switch_status; |
||||
unsigned short index = 0; |
||||
int i; |
||||
|
||||
/* read FPGA base register FPGA_REG0 */ |
||||
switch_status = *fpga_base; |
||||
|
||||
/* check the bitmap of switch status */ |
||||
if (switch_status & BOOT_SMALL_FLASH) { |
||||
index += BOOT_SMALL_FLASH_VAL; |
||||
} |
||||
if (switch_status & FLASH_ONBD_N) { |
||||
index += FLASH_ONBD_N_VAL; |
||||
} |
||||
if (switch_status & FLASH_SRAM_SEL) { |
||||
index += FLASH_SRAM_SEL_VAL; |
||||
} |
||||
|
||||
DEBUGF("\n"); |
||||
DEBUGF("FLASH: Index: %d\n", index); |
||||
|
||||
/* Init: no FLASHes known */ |
||||
for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) { |
||||
flash_info[i].flash_id = FLASH_UNKNOWN; |
||||
flash_info[i].sector_count = -1; |
||||
flash_info[i].size = 0; |
||||
|
||||
/* check whether the address is 0 */ |
||||
if (flash_addr_table[index][i] == 0) { |
||||
continue; |
||||
} |
||||
|
||||
/* call flash_get_size() to initialize sector address */ |
||||
size_b[i] = |
||||
flash_get_size((vu_long *) flash_addr_table[index][i], |
||||
&flash_info[i]); |
||||
flash_info[i].size = size_b[i]; |
||||
if (flash_info[i].flash_id == FLASH_UNKNOWN) { |
||||
printf |
||||
("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n", |
||||
i, size_b[i], size_b[i] << 20); |
||||
flash_info[i].sector_count = -1; |
||||
flash_info[i].size = 0; |
||||
} |
||||
|
||||
/* Monitor protection ON by default */ |
||||
(void)flash_protect(FLAG_PROTECT_SET, CFG_MONITOR_BASE, |
||||
CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1, |
||||
&flash_info[i]); |
||||
#ifdef CFG_ENV_IS_IN_FLASH |
||||
(void)flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR, |
||||
CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1, |
||||
&flash_info[i]); |
||||
(void)flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR_REDUND, |
||||
CFG_ENV_ADDR_REDUND + CFG_ENV_SECT_SIZE - 1, |
||||
&flash_info[i]); |
||||
#endif |
||||
|
||||
total_b += flash_info[i].size; |
||||
} |
||||
|
||||
return total_b; |
||||
} |
@ -0,0 +1,199 @@ |
||||
/*
|
||||
* (C) Copyright 2000-2005 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
/*
|
||||
* Modified 4/5/2001 |
||||
* Wait for completion of each sector erase command issued |
||||
* 4/5/2001 |
||||
* Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <ppc4xx.h> |
||||
#include <asm/processor.h> |
||||
|
||||
#undef DEBUG |
||||
#ifdef DEBUG |
||||
#define DEBUGF(x...) printf(x) |
||||
#else |
||||
#define DEBUGF(x...) |
||||
#endif /* DEBUG */ |
||||
|
||||
/*
|
||||
* include common flash code (for amcc boards) |
||||
*/ |
||||
#include "../common/flash.c" |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Functions |
||||
*/ |
||||
static ulong flash_get_size(vu_long * addr, flash_info_t * info); |
||||
static void flash_get_offsets(ulong base, flash_info_t * info); |
||||
|
||||
unsigned long flash_init(void) |
||||
{ |
||||
unsigned long size_b0, size_b1; |
||||
int i; |
||||
uint pbcr; |
||||
unsigned long base_b0, base_b1; |
||||
|
||||
/* Init: no FLASHes known */ |
||||
for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) { |
||||
flash_info[i].flash_id = FLASH_UNKNOWN; |
||||
} |
||||
|
||||
/* Static FLASH Bank configuration here - FIXME XXX */ |
||||
|
||||
size_b0 = |
||||
flash_get_size((vu_long *) FLASH_BASE0_PRELIM, &flash_info[0]); |
||||
|
||||
if (flash_info[0].flash_id == FLASH_UNKNOWN) { |
||||
printf("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", |
||||
size_b0, size_b0 << 20); |
||||
} |
||||
|
||||
/* Only one bank */ |
||||
if (CFG_MAX_FLASH_BANKS == 1) { |
||||
/* Setup offsets */ |
||||
flash_get_offsets(FLASH_BASE0_PRELIM, &flash_info[0]); |
||||
|
||||
/* Monitor protection ON by default */ |
||||
(void)flash_protect(FLAG_PROTECT_SET, |
||||
CFG_MONITOR_BASE, |
||||
CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1, |
||||
&flash_info[0]); |
||||
#ifdef CFG_ENV_IS_IN_FLASH |
||||
(void)flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR, |
||||
CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1, |
||||
&flash_info[0]); |
||||
(void)flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR_REDUND, |
||||
CFG_ENV_ADDR_REDUND + CFG_ENV_SECT_SIZE - 1, |
||||
&flash_info[0]); |
||||
#endif |
||||
|
||||
size_b1 = 0; |
||||
flash_info[0].size = size_b0; |
||||
} else { |
||||
/* 2 banks */ |
||||
size_b1 = |
||||
flash_get_size((vu_long *) FLASH_BASE1_PRELIM, |
||||
&flash_info[1]); |
||||
|
||||
/* Re-do sizing to get full correct info */ |
||||
|
||||
if (size_b1) { |
||||
mtdcr(ebccfga, pb0cr); |
||||
pbcr = mfdcr(ebccfgd); |
||||
mtdcr(ebccfga, pb0cr); |
||||
base_b1 = -size_b1; |
||||
pbcr = |
||||
(pbcr & 0x0001ffff) | base_b1 | |
||||
(((size_b1 / 1024 / 1024) - 1) << 17); |
||||
mtdcr(ebccfgd, pbcr); |
||||
/* printf("pb1cr = %x\n", pbcr); */ |
||||
} |
||||
|
||||
if (size_b0) { |
||||
mtdcr(ebccfga, pb1cr); |
||||
pbcr = mfdcr(ebccfgd); |
||||
mtdcr(ebccfga, pb1cr); |
||||
base_b0 = base_b1 - size_b0; |
||||
pbcr = |
||||
(pbcr & 0x0001ffff) | base_b0 | |
||||
(((size_b0 / 1024 / 1024) - 1) << 17); |
||||
mtdcr(ebccfgd, pbcr); |
||||
/* printf("pb0cr = %x\n", pbcr); */ |
||||
} |
||||
|
||||
size_b0 = flash_get_size((vu_long *) base_b0, &flash_info[0]); |
||||
|
||||
flash_get_offsets(base_b0, &flash_info[0]); |
||||
|
||||
/* monitor protection ON by default */ |
||||
(void)flash_protect(FLAG_PROTECT_SET, |
||||
base_b0 + size_b0 - monitor_flash_len, |
||||
base_b0 + size_b0 - 1, &flash_info[0]); |
||||
|
||||
if (size_b1) { |
||||
/* Re-do sizing to get full correct info */ |
||||
size_b1 = |
||||
flash_get_size((vu_long *) base_b1, &flash_info[1]); |
||||
|
||||
flash_get_offsets(base_b1, &flash_info[1]); |
||||
|
||||
/* monitor protection ON by default */ |
||||
(void)flash_protect(FLAG_PROTECT_SET, |
||||
base_b1 + size_b1 - |
||||
monitor_flash_len, |
||||
base_b1 + size_b1 - 1, |
||||
&flash_info[1]); |
||||
/* monitor protection OFF by default (one is enough) */ |
||||
(void)flash_protect(FLAG_PROTECT_CLEAR, |
||||
base_b0 + size_b0 - |
||||
monitor_flash_len, |
||||
base_b0 + size_b0 - 1, |
||||
&flash_info[0]); |
||||
} else { |
||||
flash_info[1].flash_id = FLASH_UNKNOWN; |
||||
flash_info[1].sector_count = -1; |
||||
} |
||||
|
||||
flash_info[0].size = size_b0; |
||||
flash_info[1].size = size_b1; |
||||
} /* else 2 banks */ |
||||
return (size_b0 + size_b1); |
||||
} |
||||
|
||||
|
||||
static void flash_get_offsets(ulong base, flash_info_t * info) |
||||
{ |
||||
int i; |
||||
|
||||
/* set up sector start address table */ |
||||
if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) || |
||||
(info->flash_id == FLASH_AM040)) { |
||||
for (i = 0; i < info->sector_count; i++) |
||||
info->start[i] = base + (i * 0x00010000); |
||||
} else { |
||||
if (info->flash_id & FLASH_BTYPE) { |
||||
/* set sector offsets for bottom boot block type */ |
||||
info->start[0] = base + 0x00000000; |
||||
info->start[1] = base + 0x00004000; |
||||
info->start[2] = base + 0x00006000; |
||||
info->start[3] = base + 0x00008000; |
||||
for (i = 4; i < info->sector_count; i++) { |
||||
info->start[i] = |
||||
base + (i * 0x00010000) - 0x00030000; |
||||
} |
||||
} else { |
||||
/* set sector offsets for top boot block type */ |
||||
i = info->sector_count - 1; |
||||
info->start[i--] = base + info->size - 0x00004000; |
||||
info->start[i--] = base + info->size - 0x00006000; |
||||
info->start[i--] = base + info->size - 0x00008000; |
||||
for (; i >= 0; i--) { |
||||
info->start[i] = base + i * 0x00010000; |
||||
} |
||||
} |
||||
} |
||||
} |
@ -0,0 +1,111 @@ |
||||
/*
|
||||
* (C) Copyright 2000-2005 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <asm/processor.h> |
||||
#include <spd_sdram.h> |
||||
|
||||
int board_early_init_f(void) |
||||
{ |
||||
/*-------------------------------------------------------------------------+
|
||||
| Interrupt controller setup for the Walnut/Sycamore board. |
||||
| Note: IRQ 0-15 405GP internally generated; active high; level sensitive |
||||
| IRQ 16 405GP internally generated; active low; level sensitive |
||||
| IRQ 17-24 RESERVED |
||||
| IRQ 25 (EXT IRQ 0) FPGA; active high; level sensitive |
||||
| IRQ 26 (EXT IRQ 1) SMI; active high; level sensitive |
||||
| IRQ 27 (EXT IRQ 2) Not Used |
||||
| IRQ 28 (EXT IRQ 3) PCI SLOT 3; active low; level sensitive |
||||
| IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive |
||||
| IRQ 30 (EXT IRQ 5) PCI SLOT 1; active low; level sensitive |
||||
| IRQ 31 (EXT IRQ 6) PCI SLOT 0; active low; level sensitive |
||||
| Note for Walnut board: |
||||
| An interrupt taken for the FPGA (IRQ 25) indicates that either |
||||
| the Mouse, Keyboard, IRDA, or External Expansion caused the |
||||
| interrupt. The FPGA must be read to determine which device |
||||
| caused the interrupt. The default setting of the FPGA clears |
||||
| |
||||
+-------------------------------------------------------------------------*/ |
||||
|
||||
mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */ |
||||
mtdcr(uicer, 0x00000000); /* disable all ints */ |
||||
mtdcr(uiccr, 0x00000020); /* set all but FPGA SMI to be non-critical */ |
||||
mtdcr(uicpr, 0xFFFFFFE0); /* set int polarities */ |
||||
mtdcr(uictr, 0x10000000); /* set int trigger levels */ |
||||
mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */ |
||||
mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */ |
||||
|
||||
/* set UART1 control to select CTS/RTS */ |
||||
#define FPGA_BRDC 0xF0300004 |
||||
*(volatile char *)(FPGA_BRDC) |= 0x1; |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
/*
|
||||
* Check Board Identity: |
||||
*/ |
||||
int checkboard(void) |
||||
{ |
||||
unsigned char *s = getenv("serial#"); |
||||
uint pvr = get_pvr(); |
||||
|
||||
if (pvr == PVR_405GPR_RB) { |
||||
puts("Board: Sycamore - AMCC PPC405GPr Evaluation Board"); |
||||
} else { |
||||
puts("Board: Walnut - AMCC PPC405GP Evaluation Board"); |
||||
} |
||||
|
||||
if (s != NULL) { |
||||
puts(", serial# "); |
||||
puts(s); |
||||
} |
||||
putc('\n'); |
||||
|
||||
return (0); |
||||
} |
||||
|
||||
/*
|
||||
* sdram_init - Dummy implementation for start.S, spd_sdram used on this board! |
||||
*/ |
||||
void sdram_init(void) |
||||
{ |
||||
return; |
||||
} |
||||
|
||||
/*
|
||||
* initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of |
||||
* the necessary info for SDRAM controller configuration |
||||
*/ |
||||
long int initdram(int board_type) |
||||
{ |
||||
return spd_sdram(0); |
||||
} |
||||
|
||||
int testdram(void) |
||||
{ |
||||
/* TODO: XXX XXX XXX */ |
||||
printf("test: xxx MB - ok\n"); |
||||
|
||||
return (0); |
||||
} |
@ -1,117 +0,0 @@ |
||||
/*
|
||||
* (C) Copyright 2000 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
long int spd_sdram (void); |
||||
|
||||
#include <common.h> |
||||
#include <asm/processor.h> |
||||
|
||||
|
||||
int board_early_init_f (void) |
||||
{ |
||||
mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */ |
||||
mtdcr (uicer, 0x00000000); /* disable all ints */ |
||||
mtdcr (uiccr, 0x00000010); |
||||
mtdcr (uicpr, 0xFFFF7FF0); /* set int polarities */ |
||||
mtdcr (uictr, 0x00000010); /* set int trigger levels */ |
||||
mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */ |
||||
|
||||
#if 0 |
||||
#define mtebc(reg, data) mtdcr(ebccfga,reg);mtdcr(ebccfgd,data) |
||||
/* CS1 */ |
||||
/* BAS=0xF00,BS=0x0(1MB),BU=0x3(R/W),BW=0x0( 8 bits) */ |
||||
mtebc (pb1ap, 0x02815480); |
||||
mtebc (pb1cr, 0xF0018000); |
||||
|
||||
p = (unsigned int*)0xEF600708; |
||||
t = *p; |
||||
t = t | 0x00000400; |
||||
*p = t; |
||||
|
||||
/* BAS=0xF01,BS=0x0(1MB),BU=0x3(R/W),BW=0x0(8 bits) */ |
||||
mtebc (pb2ap, 0x04815A80); |
||||
mtebc (pb2cr, 0xF0118000); |
||||
|
||||
/* BAS=0xF02,BS=0x0(1MB),BU=0x3(R/W),BW=0x0( 8 bits) */ |
||||
mtebc (pb3ap, 0x01815280); |
||||
mtebc (pb3cr, 0xF0218000); |
||||
|
||||
/* BAS=0xF03,BS=0x0(1MB),BU=0x3(R/W),BW=0x0(8 bits) */ |
||||
mtebc (pb7ap, 0x01815280); |
||||
mtebc (pb7cr, 0xF0318000); |
||||
|
||||
|
||||
/* set UART1 control to select CTS/RTS */ |
||||
#define FPGA_BRDC 0xF0300004 |
||||
*(volatile char *) (FPGA_BRDC) |= 0x1; |
||||
|
||||
#endif |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
|
||||
/* ------------------------------------------------------------------------- */ |
||||
|
||||
/*
|
||||
* Check Board Identity: |
||||
*/ |
||||
|
||||
int checkboard (void) |
||||
{ |
||||
unsigned char *s = getenv ("serial#"); |
||||
|
||||
puts ("Board: IBM 405EP Eval Board"); |
||||
|
||||
if (s != NULL) { |
||||
puts (", serial# "); |
||||
puts (s); |
||||
} |
||||
putc ('\n'); |
||||
|
||||
return (0); |
||||
} |
||||
|
||||
|
||||
/* -------------------------------------------------------------------------
|
||||
initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of |
||||
the necessary info for SDRAM controller configuration |
||||
------------------------------------------------------------------------- */ |
||||
long int initdram (int board_type) |
||||
{ |
||||
long int ret; |
||||
|
||||
ret = spd_sdram (); |
||||
return ret; |
||||
} |
||||
|
||||
/* ------------------------------------------------------------------------- */ |
||||
|
||||
int testdram (void) |
||||
{ |
||||
/* TODO: XXX XXX XXX */ |
||||
printf ("test: xxx MB - ok\n"); |
||||
|
||||
return (0); |
||||
} |
||||
|
||||
/* ------------------------------------------------------------------------- */ |
@ -1,44 +0,0 @@ |
||||
/*
|
||||
* (C) Copyright 2000 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
/****************************************************************************
|
||||
* FLASH Memory Map as used by TQ Monitor: |
||||
* |
||||
* Start Address Length |
||||
* +-----------------------+ 0x4000_0000 Start of Flash ----------------- |
||||
* | MON8xx code | 0x4000_0100 Reset Vector |
||||
* +-----------------------+ 0x400?_???? |
||||
* | (unused) | |
||||
* +-----------------------+ 0x4001_FF00 |
||||
* | Ethernet Addresses | 0x78 |
||||
* +-----------------------+ 0x4001_FF78 |
||||
* | (Reserved for MON8xx) | 0x44 |
||||
* +-----------------------+ 0x4001_FFBC |
||||
* | Lock Address | 0x04 |
||||
* +-----------------------+ 0x4001_FFC0 ^ |
||||
* | Hardware Information | 0x40 | MON8xx |
||||
* +=======================+ 0x4002_0000 (sector border) ----------------- |
||||
* | Autostart Header | | Applications |
||||
* | ... | v |
||||
* |
||||
*****************************************************************************/ |
@ -1,737 +0,0 @@ |
||||
/*
|
||||
* (C) Copyright 2000 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
/*
|
||||
* Modified 4/5/2001 |
||||
* Wait for completion of each sector erase command issued |
||||
* 4/5/2001 |
||||
* Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <ppc4xx.h> |
||||
#include <asm/processor.h> |
||||
|
||||
flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Functions |
||||
*/ |
||||
static ulong flash_get_size (vu_long *addr, flash_info_t *info); |
||||
static int write_word (flash_info_t *info, ulong dest, ulong data); |
||||
static void flash_get_offsets (ulong base, flash_info_t *info); |
||||
|
||||
#ifdef CONFIG_ADCIOP |
||||
#define ADDR0 0x0aa9 |
||||
#define ADDR1 0x0556 |
||||
#define FLASH_WORD_SIZE unsigned char |
||||
#endif |
||||
|
||||
#ifdef CONFIG_CPCI405 |
||||
#define ADDR0 0x5555 |
||||
#define ADDR1 0x2aaa |
||||
#define FLASH_WORD_SIZE unsigned short |
||||
#endif |
||||
|
||||
#ifdef CONFIG_WALNUT405 |
||||
#define ADDR0 0x5555 |
||||
#define ADDR1 0x2aaa |
||||
#define FLASH_WORD_SIZE unsigned char |
||||
#endif |
||||
|
||||
#ifdef CONFIG_BUBINGA405EP |
||||
#define ADDR0 0x5555 |
||||
#define ADDR1 0x2aaa |
||||
#define FLASH_WORD_SIZE unsigned char |
||||
#endif |
||||
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
|
||||
unsigned long flash_init (void) |
||||
{ |
||||
unsigned long size_b0, size_b1; |
||||
int i; |
||||
uint pbcr; |
||||
unsigned long base_b0, base_b1; |
||||
|
||||
/* Init: no FLASHes known */ |
||||
for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) { |
||||
flash_info[i].flash_id = FLASH_UNKNOWN; |
||||
} |
||||
|
||||
/* Static FLASH Bank configuration here - FIXME XXX */ |
||||
|
||||
size_b0 = flash_get_size ((vu_long *) FLASH_BASE0_PRELIM, &flash_info[0]); |
||||
|
||||
if (flash_info[0].flash_id == FLASH_UNKNOWN) { |
||||
printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", |
||||
size_b0, size_b0 << 20); |
||||
} |
||||
|
||||
/* Only one bank */ |
||||
if (CFG_MAX_FLASH_BANKS == 1) { |
||||
/* Setup offsets */ |
||||
flash_get_offsets (FLASH_BASE0_PRELIM, &flash_info[0]); |
||||
|
||||
/* Monitor protection ON by default */ |
||||
(void) flash_protect (FLAG_PROTECT_SET, |
||||
FLASH_BASE0_PRELIM, |
||||
FLASH_BASE0_PRELIM + CFG_MONITOR_LEN - 1, |
||||
&flash_info[0]); |
||||
/* Also protect sector containing initial power-up instruction */ |
||||
(void) flash_protect (FLAG_PROTECT_SET, |
||||
0xFFFFFFFC, 0xFFFFFFFF, &flash_info[0]); |
||||
size_b1 = 0; |
||||
flash_info[0].size = size_b0; |
||||
} |
||||
|
||||
/* 2 banks */ |
||||
else { |
||||
size_b1 = flash_get_size ((vu_long *) FLASH_BASE1_PRELIM, &flash_info[1]); |
||||
|
||||
/* Re-do sizing to get full correct info */ |
||||
|
||||
if (size_b1) { |
||||
mtdcr (ebccfga, pb0cr); |
||||
pbcr = mfdcr (ebccfgd); |
||||
mtdcr (ebccfga, pb0cr); |
||||
base_b1 = -size_b1; |
||||
pbcr = (pbcr & 0x0001ffff) | base_b1 | |
||||
(((size_b1 / 1024 / 1024) - 1) << 17); |
||||
mtdcr (ebccfgd, pbcr); |
||||
/* printf("pb1cr = %x\n", pbcr); */ |
||||
} |
||||
|
||||
if (size_b0) { |
||||
mtdcr (ebccfga, pb1cr); |
||||
pbcr = mfdcr (ebccfgd); |
||||
mtdcr (ebccfga, pb1cr); |
||||
base_b0 = base_b1 - size_b0; |
||||
pbcr = (pbcr & 0x0001ffff) | base_b0 | |
||||
(((size_b0 / 1024 / 1024) - 1) << 17); |
||||
mtdcr (ebccfgd, pbcr); |
||||
/* printf("pb0cr = %x\n", pbcr); */ |
||||
} |
||||
|
||||
size_b0 = flash_get_size ((vu_long *) base_b0, &flash_info[0]); |
||||
|
||||
flash_get_offsets (base_b0, &flash_info[0]); |
||||
|
||||
/* monitor protection ON by default */ |
||||
(void) flash_protect (FLAG_PROTECT_SET, |
||||
base_b0 + size_b0 - CFG_MONITOR_LEN, |
||||
base_b0 + size_b0 - 1, &flash_info[0]); |
||||
/* Also protect sector containing initial power-up instruction */ |
||||
/* (flash_protect() checks address range - other call ignored) */ |
||||
(void) flash_protect (FLAG_PROTECT_SET, |
||||
0xFFFFFFFC, 0xFFFFFFFF, &flash_info[0]); |
||||
(void) flash_protect (FLAG_PROTECT_SET, |
||||
0xFFFFFFFC, 0xFFFFFFFF, &flash_info[1]); |
||||
|
||||
if (size_b1) { |
||||
/* Re-do sizing to get full correct info */ |
||||
size_b1 = flash_get_size ((vu_long *) base_b1, &flash_info[1]); |
||||
|
||||
flash_get_offsets (base_b1, &flash_info[1]); |
||||
|
||||
/* monitor protection ON by default */ |
||||
(void) flash_protect (FLAG_PROTECT_SET, |
||||
base_b1 + size_b1 - CFG_MONITOR_LEN, |
||||
base_b1 + size_b1 - 1, |
||||
&flash_info[1]); |
||||
/* monitor protection OFF by default (one is enough) */ |
||||
(void) flash_protect (FLAG_PROTECT_CLEAR, |
||||
base_b0 + size_b0 - CFG_MONITOR_LEN, |
||||
base_b0 + size_b0 - 1, |
||||
&flash_info[0]); |
||||
} else { |
||||
flash_info[1].flash_id = FLASH_UNKNOWN; |
||||
flash_info[1].sector_count = -1; |
||||
} |
||||
|
||||
flash_info[0].size = size_b0; |
||||
flash_info[1].size = size_b1; |
||||
} /* else 2 banks */ |
||||
return (size_b0 + size_b1); |
||||
} |
||||
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
static void flash_get_offsets (ulong base, flash_info_t * info) |
||||
{ |
||||
int i; |
||||
|
||||
/* set up sector start address table */ |
||||
if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) || |
||||
(info->flash_id == FLASH_AM040)) { |
||||
for (i = 0; i < info->sector_count; i++) |
||||
info->start[i] = base + (i * 0x00010000); |
||||
} else { |
||||
if (info->flash_id & FLASH_BTYPE) { |
||||
/* set sector offsets for bottom boot block type */ |
||||
info->start[0] = base + 0x00000000; |
||||
info->start[1] = base + 0x00004000; |
||||
info->start[2] = base + 0x00006000; |
||||
info->start[3] = base + 0x00008000; |
||||
for (i = 4; i < info->sector_count; i++) { |
||||
info->start[i] = base + (i * 0x00010000) - 0x00030000; |
||||
} |
||||
} else { |
||||
/* set sector offsets for top boot block type */ |
||||
i = info->sector_count - 1; |
||||
info->start[i--] = base + info->size - 0x00004000; |
||||
info->start[i--] = base + info->size - 0x00006000; |
||||
info->start[i--] = base + info->size - 0x00008000; |
||||
for (; i >= 0; i--) { |
||||
info->start[i] = base + i * 0x00010000; |
||||
} |
||||
} |
||||
} |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
void flash_print_info (flash_info_t * info) |
||||
{ |
||||
int i; |
||||
int k; |
||||
int size; |
||||
int erased; |
||||
volatile unsigned long *flash; |
||||
|
||||
if (info->flash_id == FLASH_UNKNOWN) { |
||||
printf ("missing or unknown FLASH type\n"); |
||||
return; |
||||
} |
||||
|
||||
switch (info->flash_id & FLASH_VENDMASK) { |
||||
case FLASH_MAN_AMD: printf ("AMD "); break; |
||||
case FLASH_MAN_FUJ: printf ("FUJITSU "); break; |
||||
case FLASH_MAN_SST: printf ("SST "); break; |
||||
default: printf ("Unknown Vendor "); break; |
||||
} |
||||
|
||||
switch (info->flash_id & FLASH_TYPEMASK) { |
||||
case FLASH_AM040: printf ("AM29F040 (512 Kbit, uniform sector size)\n"); |
||||
break; |
||||
case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n"); |
||||
break; |
||||
case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n"); |
||||
break; |
||||
case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n"); |
||||
break; |
||||
case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n"); |
||||
break; |
||||
case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n"); |
||||
break; |
||||
case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n"); |
||||
break; |
||||
case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n"); |
||||
break; |
||||
case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n"); |
||||
break; |
||||
case FLASH_SST800A: printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n"); |
||||
break; |
||||
case FLASH_SST160A: printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n"); |
||||
break; |
||||
default: printf ("Unknown Chip Type\n"); |
||||
break; |
||||
} |
||||
|
||||
printf (" Size: %ld KB in %d Sectors\n", |
||||
info->size >> 10, info->sector_count); |
||||
|
||||
printf (" Sector Start Addresses:"); |
||||
for (i = 0; i < info->sector_count; ++i) { |
||||
/*
|
||||
* Check if whole sector is erased |
||||
*/ |
||||
if (i != (info->sector_count - 1)) |
||||
size = info->start[i + 1] - info->start[i]; |
||||
else |
||||
size = info->start[0] + info->size - info->start[i]; |
||||
erased = 1; |
||||
flash = (volatile unsigned long *) info->start[i]; |
||||
size = size >> 2; /* divide by 4 for longword access */ |
||||
for (k = 0; k < size; k++) { |
||||
if (*flash++ != 0xffffffff) { |
||||
erased = 0; |
||||
break; |
||||
} |
||||
} |
||||
|
||||
if ((i % 5) == 0) |
||||
printf ("\n "); |
||||
#if 0 /* test-only */
|
||||
printf (" %08lX%s", |
||||
info->start[i], info->protect[i] ? " (RO)" : " " |
||||
#else |
||||
printf (" %08lX%s%s", |
||||
info->start[i], |
||||
erased ? " E" : " ", info->protect[i] ? "RO " : " " |
||||
#endif |
||||
); |
||||
} |
||||
printf ("\n"); |
||||
return; |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
|
||||
/*
|
||||
* The following code cannot be run from FLASH! |
||||
*/ |
||||
static ulong flash_get_size (vu_long * addr, flash_info_t * info) |
||||
{ |
||||
short i; |
||||
FLASH_WORD_SIZE value; |
||||
ulong base = (ulong) addr; |
||||
volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) addr; |
||||
|
||||
/* Write auto select command: read Manufacturer ID */ |
||||
addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA; |
||||
addr2[ADDR1] = (FLASH_WORD_SIZE) 0x00550055; |
||||
addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00900090; |
||||
|
||||
#ifdef CONFIG_ADCIOP |
||||
value = addr2[2]; |
||||
#else |
||||
value = addr2[0]; |
||||
#endif |
||||
|
||||
switch (value) { |
||||
case (FLASH_WORD_SIZE) AMD_MANUFACT: |
||||
info->flash_id = FLASH_MAN_AMD; |
||||
break; |
||||
case (FLASH_WORD_SIZE) FUJ_MANUFACT: |
||||
info->flash_id = FLASH_MAN_FUJ; |
||||
break; |
||||
case (FLASH_WORD_SIZE) SST_MANUFACT: |
||||
info->flash_id = FLASH_MAN_SST; |
||||
break; |
||||
default: |
||||
info->flash_id = FLASH_UNKNOWN; |
||||
info->sector_count = 0; |
||||
info->size = 0; |
||||
return (0); /* no or unknown flash */ |
||||
} |
||||
|
||||
#ifdef CONFIG_ADCIOP |
||||
value = addr2[0]; /* device ID */ |
||||
/* printf("\ndev_code=%x\n", value); */ |
||||
#else |
||||
value = addr2[1]; /* device ID */ |
||||
#endif |
||||
|
||||
switch (value) { |
||||
case (FLASH_WORD_SIZE) AMD_ID_F040B: |
||||
info->flash_id += FLASH_AM040; |
||||
info->sector_count = 8; |
||||
info->size = 0x0080000; /* => 512 ko */ |
||||
break; |
||||
case (FLASH_WORD_SIZE) AMD_ID_LV400T: |
||||
info->flash_id += FLASH_AM400T; |
||||
info->sector_count = 11; |
||||
info->size = 0x00080000; |
||||
break; /* => 0.5 MB */ |
||||
|
||||
case (FLASH_WORD_SIZE) AMD_ID_LV400B: |
||||
info->flash_id += FLASH_AM400B; |
||||
info->sector_count = 11; |
||||
info->size = 0x00080000; |
||||
break; /* => 0.5 MB */ |
||||
|
||||
case (FLASH_WORD_SIZE) AMD_ID_LV800T: |
||||
info->flash_id += FLASH_AM800T; |
||||
info->sector_count = 19; |
||||
info->size = 0x00100000; |
||||
break; /* => 1 MB */ |
||||
|
||||
case (FLASH_WORD_SIZE) AMD_ID_LV800B: |
||||
info->flash_id += FLASH_AM800B; |
||||
info->sector_count = 19; |
||||
info->size = 0x00100000; |
||||
break; /* => 1 MB */ |
||||
|
||||
case (FLASH_WORD_SIZE) AMD_ID_LV160T: |
||||
info->flash_id += FLASH_AM160T; |
||||
info->sector_count = 35; |
||||
info->size = 0x00200000; |
||||
break; /* => 2 MB */ |
||||
|
||||
case (FLASH_WORD_SIZE) AMD_ID_LV160B: |
||||
info->flash_id += FLASH_AM160B; |
||||
info->sector_count = 35; |
||||
info->size = 0x00200000; |
||||
break; /* => 2 MB */ |
||||
#if 0 /* enable when device IDs are available */
|
||||
case (FLASH_WORD_SIZE) AMD_ID_LV320T: |
||||
info->flash_id += FLASH_AM320T; |
||||
info->sector_count = 67; |
||||
info->size = 0x00400000; |
||||
break; /* => 4 MB */ |
||||
|
||||
case (FLASH_WORD_SIZE) AMD_ID_LV320B: |
||||
info->flash_id += FLASH_AM320B; |
||||
info->sector_count = 67; |
||||
info->size = 0x00400000; |
||||
break; /* => 4 MB */ |
||||
#endif |
||||
case (FLASH_WORD_SIZE) SST_ID_xF800A: |
||||
info->flash_id += FLASH_SST800A; |
||||
info->sector_count = 16; |
||||
info->size = 0x00100000; |
||||
break; /* => 1 MB */ |
||||
|
||||
case (FLASH_WORD_SIZE) SST_ID_xF160A: |
||||
info->flash_id += FLASH_SST160A; |
||||
info->sector_count = 32; |
||||
info->size = 0x00200000; |
||||
break; /* => 2 MB */ |
||||
|
||||
default: |
||||
info->flash_id = FLASH_UNKNOWN; |
||||
return (0); /* => no or unknown flash */ |
||||
|
||||
} |
||||
|
||||
/* set up sector start address table */ |
||||
if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) || |
||||
(info->flash_id == FLASH_AM040)) { |
||||
for (i = 0; i < info->sector_count; i++) |
||||
info->start[i] = base + (i * 0x00010000); |
||||
} else { |
||||
if (info->flash_id & FLASH_BTYPE) { |
||||
/* set sector offsets for bottom boot block type */ |
||||
info->start[0] = base + 0x00000000; |
||||
info->start[1] = base + 0x00004000; |
||||
info->start[2] = base + 0x00006000; |
||||
info->start[3] = base + 0x00008000; |
||||
for (i = 4; i < info->sector_count; i++) { |
||||
info->start[i] = base + (i * 0x00010000) - 0x00030000; |
||||
} |
||||
} else { |
||||
/* set sector offsets for top boot block type */ |
||||
i = info->sector_count - 1; |
||||
info->start[i--] = base + info->size - 0x00004000; |
||||
info->start[i--] = base + info->size - 0x00006000; |
||||
info->start[i--] = base + info->size - 0x00008000; |
||||
for (; i >= 0; i--) { |
||||
info->start[i] = base + i * 0x00010000; |
||||
} |
||||
} |
||||
} |
||||
|
||||
/* check for protected sectors */ |
||||
for (i = 0; i < info->sector_count; i++) { |
||||
/* read sector protection at sector address, (A7 .. A0) = 0x02 */ |
||||
/* D0 = 1 if protected */ |
||||
#ifdef CONFIG_ADCIOP |
||||
addr2 = (volatile FLASH_WORD_SIZE *) (info->start[i]); |
||||
info->protect[i] = addr2[4] & 1; |
||||
#else |
||||
addr2 = (volatile FLASH_WORD_SIZE *) (info->start[i]); |
||||
if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) |
||||
info->protect[i] = 0; |
||||
else |
||||
info->protect[i] = addr2[2] & 1; |
||||
#endif |
||||
} |
||||
|
||||
/*
|
||||
* Prevent writes to uninitialized FLASH. |
||||
*/ |
||||
if (info->flash_id != FLASH_UNKNOWN) { |
||||
#if 0 /* test-only */
|
||||
#ifdef CONFIG_ADCIOP |
||||
addr2 = (volatile unsigned char *) info->start[0]; |
||||
addr2[ADDR0] = 0xAA; |
||||
addr2[ADDR1] = 0x55; |
||||
addr2[ADDR0] = 0xF0; /* reset bank */ |
||||
#else |
||||
addr2 = (FLASH_WORD_SIZE *) info->start[0]; |
||||
*addr2 = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */ |
||||
#endif |
||||
#else /* test-only */ |
||||
addr2 = (FLASH_WORD_SIZE *) info->start[0]; |
||||
*addr2 = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */ |
||||
#endif /* test-only */ |
||||
} |
||||
|
||||
return (info->size); |
||||
} |
||||
|
||||
int wait_for_DQ7 (flash_info_t * info, int sect) |
||||
{ |
||||
ulong start, now, last; |
||||
volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *) (info->start[sect]); |
||||
|
||||
start = get_timer (0); |
||||
last = 0; |
||||
while ((addr[0] & (FLASH_WORD_SIZE) 0x00800080) != (FLASH_WORD_SIZE) 0x00800080) { |
||||
if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) { |
||||
printf ("Timeout\n"); |
||||
return -1; |
||||
} |
||||
/* show that we're waiting */ |
||||
if ((now - last) > 1000) { /* every second */ |
||||
putc ('.'); |
||||
last = now; |
||||
} |
||||
} |
||||
return 0; |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
|
||||
int flash_erase (flash_info_t * info, int s_first, int s_last) |
||||
{ |
||||
volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *) (info->start[0]); |
||||
volatile FLASH_WORD_SIZE *addr2; |
||||
int flag, prot, sect, l_sect; |
||||
int i; |
||||
|
||||
if ((s_first < 0) || (s_first > s_last)) { |
||||
if (info->flash_id == FLASH_UNKNOWN) { |
||||
printf ("- missing\n"); |
||||
} else { |
||||
printf ("- no sectors to erase\n"); |
||||
} |
||||
return 1; |
||||
} |
||||
|
||||
if (info->flash_id == FLASH_UNKNOWN) { |
||||
printf ("Can't erase unknown flash type - aborted\n"); |
||||
return 1; |
||||
} |
||||
|
||||
prot = 0; |
||||
for (sect = s_first; sect <= s_last; ++sect) { |
||||
if (info->protect[sect]) { |
||||
prot++; |
||||
} |
||||
} |
||||
|
||||
if (prot) { |
||||
printf ("- Warning: %d protected sectors will not be erased!\n", prot); |
||||
} else { |
||||
printf ("\n"); |
||||
} |
||||
|
||||
l_sect = -1; |
||||
|
||||
/* Disable interrupts which might cause a timeout here */ |
||||
flag = disable_interrupts (); |
||||
|
||||
/* Start erase on unprotected sectors */ |
||||
for (sect = s_first; sect <= s_last; sect++) { |
||||
if (info->protect[sect] == 0) { /* not protected */ |
||||
addr2 = (FLASH_WORD_SIZE *) (info->start[sect]); |
||||
printf ("Erasing sector %p\n", addr2); /* CLH */ |
||||
|
||||
if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) { |
||||
addr[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA; |
||||
addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055; |
||||
addr[ADDR0] = (FLASH_WORD_SIZE) 0x00800080; |
||||
addr[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA; |
||||
addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055; |
||||
addr2[0] = (FLASH_WORD_SIZE) 0x00500050; /* block erase */ |
||||
for (i = 0; i < 50; i++) |
||||
udelay (1000); /* wait 1 ms */ |
||||
} else { |
||||
addr[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA; |
||||
addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055; |
||||
addr[ADDR0] = (FLASH_WORD_SIZE) 0x00800080; |
||||
addr[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA; |
||||
addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055; |
||||
addr2[0] = (FLASH_WORD_SIZE) 0x00300030; /* sector erase */ |
||||
} |
||||
l_sect = sect; |
||||
/*
|
||||
* Wait for each sector to complete, it's more |
||||
* reliable. According to AMD Spec, you must |
||||
* issue all erase commands within a specified |
||||
* timeout. This has been seen to fail, especially |
||||
* if printf()s are included (for debug)!! |
||||
*/ |
||||
wait_for_DQ7 (info, sect); |
||||
} |
||||
} |
||||
|
||||
/* re-enable interrupts if necessary */ |
||||
if (flag) |
||||
enable_interrupts (); |
||||
|
||||
/* wait at least 80us - let's wait 1 ms */ |
||||
udelay (1000); |
||||
|
||||
#if 0 |
||||
/*
|
||||
* We wait for the last triggered sector |
||||
*/ |
||||
if (l_sect < 0) |
||||
goto DONE; |
||||
wait_for_DQ7 (info, l_sect); |
||||
|
||||
DONE: |
||||
#endif |
||||
/* reset to read mode */ |
||||
addr = (FLASH_WORD_SIZE *) info->start[0]; |
||||
addr[0] = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */ |
||||
|
||||
printf (" done\n"); |
||||
return 0; |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Copy memory to flash, returns: |
||||
* 0 - OK |
||||
* 1 - write timeout |
||||
* 2 - Flash not erased |
||||
*/ |
||||
|
||||
int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) |
||||
{ |
||||
ulong cp, wp, data; |
||||
int i, l, rc; |
||||
|
||||
wp = (addr & ~3); /* get lower word aligned address */ |
||||
|
||||
/*
|
||||
* handle unaligned start bytes |
||||
*/ |
||||
if ((l = addr - wp) != 0) { |
||||
data = 0; |
||||
for (i = 0, cp = wp; i < l; ++i, ++cp) { |
||||
data = (data << 8) | (*(uchar *) cp); |
||||
} |
||||
for (; i < 4 && cnt > 0; ++i) { |
||||
data = (data << 8) | *src++; |
||||
--cnt; |
||||
++cp; |
||||
} |
||||
for (; cnt == 0 && i < 4; ++i, ++cp) { |
||||
data = (data << 8) | (*(uchar *) cp); |
||||
} |
||||
|
||||
if ((rc = write_word (info, wp, data)) != 0) { |
||||
return (rc); |
||||
} |
||||
wp += 4; |
||||
} |
||||
|
||||
/*
|
||||
* handle word aligned part |
||||
*/ |
||||
while (cnt >= 4) { |
||||
data = 0; |
||||
for (i = 0; i < 4; ++i) { |
||||
data = (data << 8) | *src++; |
||||
} |
||||
if ((rc = write_word (info, wp, data)) != 0) { |
||||
return (rc); |
||||
} |
||||
wp += 4; |
||||
cnt -= 4; |
||||
} |
||||
|
||||
if (cnt == 0) { |
||||
return (0); |
||||
} |
||||
|
||||
/*
|
||||
* handle unaligned tail bytes |
||||
*/ |
||||
data = 0; |
||||
for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) { |
||||
data = (data << 8) | *src++; |
||||
--cnt; |
||||
} |
||||
for (; i < 4; ++i, ++cp) { |
||||
data = (data << 8) | (*(uchar *) cp); |
||||
} |
||||
|
||||
return (write_word (info, wp, data)); |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Write a word to Flash, returns: |
||||
* 0 - OK |
||||
* 1 - write timeout |
||||
* 2 - Flash not erased |
||||
*/ |
||||
static int write_word (flash_info_t * info, ulong dest, ulong data) |
||||
{ |
||||
volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) (info->start[0]); |
||||
volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *) dest; |
||||
volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *) & data; |
||||
ulong start; |
||||
int i; |
||||
|
||||
/* Check if Flash is (sufficiently) erased */ |
||||
if ((*((volatile FLASH_WORD_SIZE *) dest) & |
||||
(FLASH_WORD_SIZE) data) != (FLASH_WORD_SIZE) data) { |
||||
return (2); |
||||
} |
||||
|
||||
for (i = 0; i < 4 / sizeof (FLASH_WORD_SIZE); i++) { |
||||
int flag; |
||||
|
||||
/* Disable interrupts which might cause a timeout here */ |
||||
flag = disable_interrupts (); |
||||
|
||||
addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA; |
||||
addr2[ADDR1] = (FLASH_WORD_SIZE) 0x00550055; |
||||
addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00A000A0; |
||||
|
||||
dest2[i] = data2[i]; |
||||
|
||||
/* re-enable interrupts if necessary */ |
||||
if (flag) |
||||
enable_interrupts (); |
||||
|
||||
/* data polling for D7 */ |
||||
start = get_timer (0); |
||||
while ((dest2[i] & (FLASH_WORD_SIZE) 0x00800080) != |
||||
(data2[i] & (FLASH_WORD_SIZE) 0x00800080)) { |
||||
|
||||
if (get_timer (start) > CFG_FLASH_WRITE_TOUT) { |
||||
return (1); |
||||
} |
||||
} |
||||
} |
||||
|
||||
return (0); |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
@ -1,55 +0,0 @@ |
||||
/*------------------------------------------------------------------------------+ */ |
||||
/* */ |
||||
/* This source code has been made available to you by IBM on an AS-IS */ |
||||
/* basis. Anyone receiving this source is licensed under IBM */ |
||||
/* copyrights to use it in any way he or she deems fit, including */ |
||||
/* copying it, modifying it, compiling it, and redistributing it either */ |
||||
/* with or without modifications. No license under IBM patents or */ |
||||
/* patent applications is to be implied by the copyright license. */ |
||||
/* */ |
||||
/* Any user of this software should understand that IBM cannot provide */ |
||||
/* technical support for this software and will not be responsible for */ |
||||
/* any consequences resulting from the use of this software. */ |
||||
/* */ |
||||
/* Any person who transfers this source code or any derivative work */ |
||||
/* must include the IBM copyright notice, this paragraph, and the */ |
||||
/* preceding two paragraphs in the transferred software. */ |
||||
/* */ |
||||
/* COPYRIGHT I B M CORPORATION 1995 */ |
||||
/* LICENSED MATERIAL - PROGRAM PROPERTY OF I B M */ |
||||
/*------------------------------------------------------------------------------- */ |
||||
|
||||
/*----------------------------------------------------------------------------- */ |
||||
/* Function: ext_bus_cntlr_init */ |
||||
/* Description: Initializes the External Bus Controller for the external */ |
||||
/* peripherals. IMPORTANT: For pass1 this code must run from */ |
||||
/* cache since you can not reliably change a peripheral banks */ |
||||
/* timing register (pbxap) while running code from that bank. */ |
||||
/* For ex., since we are running from ROM on bank 0, we can NOT */ |
||||
/* execute the code that modifies bank 0 timings from ROM, so */ |
||||
/* we run it from cache. */ |
||||
/* Bank 0 - Flash and SRAM */ |
||||
/* Bank 1 - NVRAM/RTC */ |
||||
/* Bank 2 - Keyboard/Mouse controller */ |
||||
/* Bank 3 - IR controller */ |
||||
/* Bank 4 - not used */ |
||||
/* Bank 5 - not used */ |
||||
/* Bank 6 - not used */ |
||||
/* Bank 7 - FPGA registers */ |
||||
/*----------------------------------------------------------------------------- */ |
||||
#include <ppc4xx.h> |
||||
|
||||
#include <ppc_asm.tmpl> |
||||
#include <ppc_defs.h> |
||||
|
||||
#include <asm/cache.h> |
||||
#include <asm/mmu.h> |
||||
|
||||
|
||||
/*----------------------------------------------------------------------------- */ |
||||
/* Function: sdram_init */ |
||||
/* Description: Dummy implementation here - done in C later */ |
||||
/*----------------------------------------------------------------------------- */ |
||||
.globl sdram_init
|
||||
sdram_init: |
||||
blr |
@ -1,146 +0,0 @@ |
||||
/* |
||||
* (C) Copyright 2000 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
OUTPUT_ARCH(powerpc) |
||||
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); |
||||
/* Do we need any of these for elf? |
||||
__DYNAMIC = 0; */ |
||||
SECTIONS |
||||
{ |
||||
/* Read-only sections, merged into text segment: */ |
||||
. = + SIZEOF_HEADERS; |
||||
.interp : { *(.interp) } |
||||
.hash : { *(.hash) } |
||||
.dynsym : { *(.dynsym) } |
||||
.dynstr : { *(.dynstr) } |
||||
.rel.text : { *(.rel.text) } |
||||
.rela.text : { *(.rela.text) } |
||||
.rel.data : { *(.rel.data) } |
||||
.rela.data : { *(.rela.data) } |
||||
.rel.rodata : { *(.rel.rodata) } |
||||
.rela.rodata : { *(.rela.rodata) } |
||||
.rel.got : { *(.rel.got) } |
||||
.rela.got : { *(.rela.got) } |
||||
.rel.ctors : { *(.rel.ctors) } |
||||
.rela.ctors : { *(.rela.ctors) } |
||||
.rel.dtors : { *(.rel.dtors) } |
||||
.rela.dtors : { *(.rela.dtors) } |
||||
.rel.bss : { *(.rel.bss) } |
||||
.rela.bss : { *(.rela.bss) } |
||||
.rel.plt : { *(.rel.plt) } |
||||
.rela.plt : { *(.rela.plt) } |
||||
.init : { *(.init) } |
||||
.plt : { *(.plt) } |
||||
.text : |
||||
{ |
||||
/* WARNING - the following is hand-optimized to fit within */ |
||||
/* the sector layout of our flash chips! XXX FIXME XXX */ |
||||
|
||||
/* |
||||
cpu/ppc4xx/start.o (.text) |
||||
common/dlmalloc.o (.text) |
||||
lib_generic/vsprintf.o (.text) |
||||
lib_generic/crc32.o (.text) |
||||
lib_ppc/extable.o (.text) |
||||
*/ |
||||
cpu/ppc4xx/start.o (.text) |
||||
board/bubinga405ep/init.o (.text) |
||||
cpu/ppc4xx/kgdb.o (.text) |
||||
cpu/ppc4xx/traps.o (.text) |
||||
cpu/ppc4xx/interrupts.o (.text) |
||||
cpu/ppc4xx/serial.o (.text) |
||||
cpu/ppc4xx/cpu_init.o (.text) |
||||
cpu/ppc4xx/speed.o (.text) |
||||
cpu/ppc4xx/405gp_enet.o (.text) |
||||
common/dlmalloc.o (.text) |
||||
lib_generic/crc32.o (.text) |
||||
lib_ppc/extable.o (.text) |
||||
lib_generic/zlib.o (.text) |
||||
|
||||
|
||||
common/environment.o(.text) |
||||
|
||||
*(.text) |
||||
*(.fixup) |
||||
*(.got1) |
||||
} |
||||
_etext = .; |
||||
PROVIDE (etext = .); |
||||
.rodata : |
||||
{ |
||||
*(.rodata) |
||||
*(.rodata1) |
||||
} |
||||
.fini : { *(.fini) } =0 |
||||
.ctors : { *(.ctors) } |
||||
.dtors : { *(.dtors) } |
||||
|
||||
/* Read-write section, merged into data segment: */ |
||||
. = (. + 0x0FFF) & 0xFFFFF000; |
||||
_erotext = .; |
||||
PROVIDE (erotext = .); |
||||
.reloc : |
||||
{ |
||||
*(.got) |
||||
_GOT2_TABLE_ = .; |
||||
*(.got2) |
||||
_FIXUP_TABLE_ = .; |
||||
*(.fixup) |
||||
} |
||||
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; |
||||
__fixup_entries = (. - _FIXUP_TABLE_)>>2; |
||||
|
||||
.data : |
||||
{ |
||||
*(.data) |
||||
*(.data1) |
||||
*(.sdata) |
||||
*(.sdata2) |
||||
*(.dynamic) |
||||
CONSTRUCTORS |
||||
} |
||||
_edata = .; |
||||
PROVIDE (edata = .); |
||||
|
||||
__start___ex_table = .; |
||||
__ex_table : { *(__ex_table) } |
||||
__stop___ex_table = .; |
||||
|
||||
. = ALIGN(4096); |
||||
__init_begin = .; |
||||
.text.init : { *(.text.init) } |
||||
.data.init : { *(.data.init) } |
||||
. = ALIGN(4096); |
||||
__init_end = .; |
||||
|
||||
__bss_start = .; |
||||
.bss : |
||||
{ |
||||
*(.sbss) *(.scommon) |
||||
*(.dynbss) |
||||
*(.bss) |
||||
*(COMMON) |
||||
} |
||||
_end = . ; |
||||
PROVIDE (end = .); |
||||
} |
@ -1,44 +0,0 @@ |
||||
/*
|
||||
* (C) Copyright 2002 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
/****************************************************************************
|
||||
* FLASH Memory Map as used by TQ Monitor: |
||||
* |
||||
* Start Address Length |
||||
* +-----------------------+ 0x4000_0000 Start of Flash ----------------- |
||||
* | MON8xx code | 0x4000_0100 Reset Vector |
||||
* +-----------------------+ 0x400?_???? |
||||
* | (unused) | |
||||
* +-----------------------+ 0x4001_FF00 |
||||
* | Ethernet Addresses | 0x78 |
||||
* +-----------------------+ 0x4001_FF78 |
||||
* | (Reserved for MON8xx) | 0x44 |
||||
* +-----------------------+ 0x4001_FFBC |
||||
* | Lock Address | 0x04 |
||||
* +-----------------------+ 0x4001_FFC0 ^ |
||||
* | Hardware Information | 0x40 | MON8xx |
||||
* +=======================+ 0x4002_0000 (sector border) ----------------- |
||||
* | Autostart Header | | Applications |
||||
* | ... | v |
||||
* |
||||
*****************************************************************************/ |
@ -1,743 +0,0 @@ |
||||
/*
|
||||
* (C) Copyright 2002 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* (C) Copyright 2002 Jun Gu <jung@artesyncp.com> |
||||
* Add support for Am29F016D and dynamic switch setting. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
/*
|
||||
* Modified 4/5/2001 |
||||
* Wait for completion of each sector erase command issued |
||||
* 4/5/2001 |
||||
* Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <ppc4xx.h> |
||||
#include <asm/processor.h> |
||||
|
||||
|
||||
#undef DEBUG |
||||
#ifdef DEBUG |
||||
#define DEBUGF(x...) printf(x) |
||||
#else |
||||
#define DEBUGF(x...) |
||||
#endif /* DEBUG */ |
||||
|
||||
#define BOOT_SMALL_FLASH 32 /* 00100000 */ |
||||
#define FLASH_ONBD_N 2 /* 00000010 */ |
||||
#define FLASH_SRAM_SEL 1 /* 00000001 */ |
||||
|
||||
#define BOOT_SMALL_FLASH_VAL 4 |
||||
#define FLASH_ONBD_N_VAL 2 |
||||
#define FLASH_SRAM_SEL_VAL 1 |
||||
|
||||
|
||||
flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ |
||||
|
||||
static unsigned long flash_addr_table[8][CFG_MAX_FLASH_BANKS] = { |
||||
{0xffc00000, 0xffe00000, 0xff880000}, /* 0:000: configuraton 3 */ |
||||
{0xffc00000, 0xffe00000, 0xff800000}, /* 1:001: configuraton 4 */ |
||||
{0xffc00000, 0xffe00000, 0x00000000}, /* 2:010: configuraton 7 */ |
||||
{0xffc00000, 0xffe00000, 0x00000000}, /* 3:011: configuraton 8 */ |
||||
{0xff800000, 0xffa00000, 0xfff80000}, /* 4:100: configuraton 1 */ |
||||
{0xff800000, 0xffa00000, 0xfff00000}, /* 5:101: configuraton 2 */ |
||||
{0xffc00000, 0xffe00000, 0x00000000}, /* 6:110: configuraton 5 */ |
||||
{0xffc00000, 0xffe00000, 0x00000000} /* 7:111: configuraton 6 */ |
||||
}; |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Functions |
||||
*/ |
||||
static ulong flash_get_size (vu_long *addr, flash_info_t *info); |
||||
static int write_word (flash_info_t *info, ulong dest, ulong data); |
||||
#if 0 |
||||
static void flash_get_offsets (ulong base, flash_info_t *info); |
||||
#endif |
||||
|
||||
#ifdef CONFIG_ADCIOP |
||||
#define ADDR0 0x0aa9 |
||||
#define ADDR1 0x0556 |
||||
#define FLASH_WORD_SIZE unsigned char |
||||
#endif |
||||
|
||||
#ifdef CONFIG_CPCI405 |
||||
#define ADDR0 0x5555 |
||||
#define ADDR1 0x2aaa |
||||
#define FLASH_WORD_SIZE unsigned short |
||||
#endif |
||||
|
||||
#ifdef CONFIG_WALNUT405 |
||||
#define ADDR0 0x5555 |
||||
#define ADDR1 0x2aaa |
||||
#define FLASH_WORD_SIZE unsigned char |
||||
#endif |
||||
|
||||
#ifdef CONFIG_EBONY |
||||
#define ADDR0 0x5555 |
||||
#define ADDR1 0x2aaa |
||||
#define FLASH_WORD_SIZE unsigned char |
||||
#endif |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
|
||||
unsigned long flash_init (void) { |
||||
unsigned long total_b = 0; |
||||
unsigned long size_b[CFG_MAX_FLASH_BANKS]; |
||||
unsigned char * fpga_base = (unsigned char *)CFG_FPGA_BASE; |
||||
unsigned char switch_status; |
||||
unsigned short index = 0; |
||||
int i; |
||||
|
||||
|
||||
/* read FPGA base register FPGA_REG0 */ |
||||
switch_status = *fpga_base; |
||||
|
||||
/* check the bitmap of switch status */ |
||||
if (switch_status & BOOT_SMALL_FLASH) { |
||||
index += BOOT_SMALL_FLASH_VAL; |
||||
} |
||||
if (switch_status & FLASH_ONBD_N) { |
||||
index += FLASH_ONBD_N_VAL; |
||||
} |
||||
if (switch_status & FLASH_SRAM_SEL) { |
||||
index += FLASH_SRAM_SEL_VAL; |
||||
} |
||||
|
||||
DEBUGF("\n"); |
||||
DEBUGF("FLASH: Index: %d\n", index); |
||||
|
||||
/* Init: no FLASHes known */ |
||||
for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) { |
||||
flash_info[i].flash_id = FLASH_UNKNOWN; |
||||
flash_info[i].sector_count = -1; |
||||
flash_info[i].size = 0; |
||||
|
||||
/* check whether the address is 0 */ |
||||
if (flash_addr_table[index][i] == 0) { |
||||
continue; |
||||
} |
||||
|
||||
/* call flash_get_size() to initialize sector address */ |
||||
size_b[i] = flash_get_size( |
||||
(vu_long *)flash_addr_table[index][i], &flash_info[i]); |
||||
flash_info[i].size = size_b[i]; |
||||
if (flash_info[i].flash_id == FLASH_UNKNOWN) { |
||||
printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n", |
||||
i, size_b[i], size_b[i]<<20); |
||||
flash_info[i].sector_count = -1; |
||||
flash_info[i].size = 0; |
||||
} |
||||
|
||||
total_b += flash_info[i].size; |
||||
} |
||||
|
||||
return total_b; |
||||
} |
||||
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
#if 0 |
||||
static void flash_get_offsets (ulong base, flash_info_t *info) |
||||
{ |
||||
int i; |
||||
|
||||
/* set up sector start address table */ |
||||
if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) || |
||||
(info->flash_id == FLASH_AM040) || |
||||
(info->flash_id == FLASH_AMD016)) { |
||||
for (i = 0; i < info->sector_count; i++) |
||||
info->start[i] = base + (i * 0x00010000); |
||||
} else { |
||||
if (info->flash_id & FLASH_BTYPE) { |
||||
/* set sector offsets for bottom boot block type */ |
||||
info->start[0] = base + 0x00000000; |
||||
info->start[1] = base + 0x00004000; |
||||
info->start[2] = base + 0x00006000; |
||||
info->start[3] = base + 0x00008000; |
||||
for (i = 4; i < info->sector_count; i++) { |
||||
info->start[i] = base + (i * 0x00010000) - 0x00030000; |
||||
} |
||||
} else { |
||||
/* set sector offsets for top boot block type */ |
||||
i = info->sector_count - 1; |
||||
info->start[i--] = base + info->size - 0x00004000; |
||||
info->start[i--] = base + info->size - 0x00006000; |
||||
info->start[i--] = base + info->size - 0x00008000; |
||||
for (; i >= 0; i--) { |
||||
info->start[i] = base + i * 0x00010000; |
||||
} |
||||
} |
||||
} |
||||
} |
||||
#endif /* 0 */ |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
void flash_print_info (flash_info_t *info) |
||||
{ |
||||
int i; |
||||
int k; |
||||
int size; |
||||
int erased; |
||||
volatile unsigned long *flash; |
||||
|
||||
if (info->flash_id == FLASH_UNKNOWN) { |
||||
printf ("missing or unknown FLASH type\n"); |
||||
return; |
||||
} |
||||
|
||||
switch (info->flash_id & FLASH_VENDMASK) { |
||||
case FLASH_MAN_AMD: printf ("AMD "); break; |
||||
case FLASH_MAN_FUJ: printf ("FUJITSU "); break; |
||||
case FLASH_MAN_SST: printf ("SST "); break; |
||||
default: printf ("Unknown Vendor "); break; |
||||
} |
||||
|
||||
switch (info->flash_id & FLASH_TYPEMASK) { |
||||
case FLASH_AMD016: printf ("AM29F016D (16 Mbit, uniform sector size)\n"); |
||||
break; |
||||
case FLASH_AM040: printf ("AM29F040 (512 Kbit, uniform sector size)\n"); |
||||
break; |
||||
case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n"); |
||||
break; |
||||
case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n"); |
||||
break; |
||||
case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n"); |
||||
break; |
||||
case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n"); |
||||
break; |
||||
case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n"); |
||||
break; |
||||
case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n"); |
||||
break; |
||||
case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n"); |
||||
break; |
||||
case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n"); |
||||
break; |
||||
case FLASH_SST800A: printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n"); |
||||
break; |
||||
case FLASH_SST160A: printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n"); |
||||
break; |
||||
default: printf ("Unknown Chip Type\n"); |
||||
break; |
||||
} |
||||
|
||||
printf (" Size: %ld KB in %d Sectors\n", |
||||
info->size >> 10, info->sector_count); |
||||
|
||||
printf (" Sector Start Addresses:"); |
||||
for (i=0; i<info->sector_count; ++i) { |
||||
/*
|
||||
* Check if whole sector is erased |
||||
*/ |
||||
if (i != (info->sector_count-1)) |
||||
size = info->start[i+1] - info->start[i]; |
||||
else |
||||
size = info->start[0] + info->size - info->start[i]; |
||||
erased = 1; |
||||
flash = (volatile unsigned long *)info->start[i]; |
||||
size = size >> 2; /* divide by 4 for longword access */ |
||||
for (k=0; k<size; k++) |
||||
{ |
||||
if (*flash++ != 0xffffffff) |
||||
{ |
||||
erased = 0; |
||||
break; |
||||
} |
||||
} |
||||
|
||||
if ((i % 5) == 0) |
||||
printf ("\n "); |
||||
printf (" %08lX%s%s", |
||||
info->start[i], |
||||
erased ? " E" : " ", |
||||
info->protect[i] ? "RO " : " " |
||||
); |
||||
} |
||||
printf ("\n"); |
||||
return; |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
|
||||
/*
|
||||
* The following code cannot be run from FLASH! |
||||
*/ |
||||
static ulong flash_get_size (vu_long *addr, flash_info_t *info) |
||||
{ |
||||
short i; |
||||
FLASH_WORD_SIZE value; |
||||
ulong base = (ulong)addr; |
||||
volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr; |
||||
|
||||
DEBUGF("FLASH ADDR: %08x\n", (unsigned)addr ); |
||||
|
||||
/* Write auto select command: read Manufacturer ID */ |
||||
udelay(10000); |
||||
addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; |
||||
udelay(1000); |
||||
addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055; |
||||
udelay(1000); |
||||
addr2[ADDR0] = (FLASH_WORD_SIZE)0x00900090; |
||||
udelay(1000); |
||||
|
||||
#ifdef CONFIG_ADCIOP |
||||
value = addr2[2]; |
||||
#else |
||||
value = addr2[0]; |
||||
#endif |
||||
|
||||
DEBUGF("FLASH MANUFACT: %x\n", value); |
||||
|
||||
switch (value) { |
||||
case (FLASH_WORD_SIZE)AMD_MANUFACT: |
||||
info->flash_id = FLASH_MAN_AMD; |
||||
break; |
||||
case (FLASH_WORD_SIZE)FUJ_MANUFACT: |
||||
info->flash_id = FLASH_MAN_FUJ; |
||||
break; |
||||
case (FLASH_WORD_SIZE)SST_MANUFACT: |
||||
info->flash_id = FLASH_MAN_SST; |
||||
break; |
||||
case (FLASH_WORD_SIZE)STM_MANUFACT: |
||||
info->flash_id = FLASH_MAN_STM; |
||||
break; |
||||
default: |
||||
info->flash_id = FLASH_UNKNOWN; |
||||
info->sector_count = 0; |
||||
info->size = 0; |
||||
return (0); /* no or unknown flash */ |
||||
} |
||||
|
||||
#ifdef CONFIG_ADCIOP |
||||
value = addr2[0]; /* device ID */ |
||||
debug ("\ndev_code=%x\n", value); |
||||
#else |
||||
value = addr2[1]; /* device ID */ |
||||
#endif |
||||
|
||||
DEBUGF("\nFLASH DEVICEID: %x\n", value); |
||||
|
||||
switch (value) { |
||||
case (FLASH_WORD_SIZE)AMD_ID_F016D: |
||||
info->flash_id += FLASH_AMD016; |
||||
info->sector_count = 32; |
||||
info->size = 0x00200000; |
||||
break; /* => 2 MB */ |
||||
case (FLASH_WORD_SIZE)STM_ID_F040B: |
||||
info->flash_id += FLASH_AM040; |
||||
info->sector_count = 8; |
||||
info->size = 0x0080000; /* => 512 ko */ |
||||
break; |
||||
case (FLASH_WORD_SIZE)AMD_ID_F040B: |
||||
info->flash_id += FLASH_AM040; |
||||
info->sector_count = 8; |
||||
info->size = 0x0080000; /* => 512 ko */ |
||||
break; |
||||
case (FLASH_WORD_SIZE)AMD_ID_LV400T: |
||||
info->flash_id += FLASH_AM400T; |
||||
info->sector_count = 11; |
||||
info->size = 0x00080000; |
||||
break; /* => 0.5 MB */ |
||||
|
||||
case (FLASH_WORD_SIZE)AMD_ID_LV400B: |
||||
info->flash_id += FLASH_AM400B; |
||||
info->sector_count = 11; |
||||
info->size = 0x00080000; |
||||
break; /* => 0.5 MB */ |
||||
|
||||
case (FLASH_WORD_SIZE)AMD_ID_LV800T: |
||||
info->flash_id += FLASH_AM800T; |
||||
info->sector_count = 19; |
||||
info->size = 0x00100000; |
||||
break; /* => 1 MB */ |
||||
|
||||
case (FLASH_WORD_SIZE)AMD_ID_LV800B: |
||||
info->flash_id += FLASH_AM800B; |
||||
info->sector_count = 19; |
||||
info->size = 0x00100000; |
||||
break; /* => 1 MB */ |
||||
|
||||
case (FLASH_WORD_SIZE)AMD_ID_LV160T: |
||||
info->flash_id += FLASH_AM160T; |
||||
info->sector_count = 35; |
||||
info->size = 0x00200000; |
||||
break; /* => 2 MB */ |
||||
|
||||
case (FLASH_WORD_SIZE)AMD_ID_LV160B: |
||||
info->flash_id += FLASH_AM160B; |
||||
info->sector_count = 35; |
||||
info->size = 0x00200000; |
||||
break; /* => 2 MB */ |
||||
#if 0 /* enable when device IDs are available */
|
||||
case (FLASH_WORD_SIZE)AMD_ID_LV320T: |
||||
info->flash_id += FLASH_AM320T; |
||||
info->sector_count = 67; |
||||
info->size = 0x00400000; |
||||
break; /* => 4 MB */ |
||||
|
||||
case (FLASH_WORD_SIZE)AMD_ID_LV320B: |
||||
info->flash_id += FLASH_AM320B; |
||||
info->sector_count = 67; |
||||
info->size = 0x00400000; |
||||
break; /* => 4 MB */ |
||||
#endif |
||||
case (FLASH_WORD_SIZE)SST_ID_xF800A: |
||||
info->flash_id += FLASH_SST800A; |
||||
info->sector_count = 16; |
||||
info->size = 0x00100000; |
||||
break; /* => 1 MB */ |
||||
|
||||
case (FLASH_WORD_SIZE)SST_ID_xF160A: |
||||
info->flash_id += FLASH_SST160A; |
||||
info->sector_count = 32; |
||||
info->size = 0x00200000; |
||||
break; /* => 2 MB */ |
||||
|
||||
default: |
||||
info->flash_id = FLASH_UNKNOWN; |
||||
return (0); /* => no or unknown flash */ |
||||
|
||||
} |
||||
|
||||
/* set up sector start address table */ |
||||
if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) || |
||||
(info->flash_id == FLASH_AM040) || |
||||
(info->flash_id == FLASH_AMD016)) { |
||||
for (i = 0; i < info->sector_count; i++) |
||||
info->start[i] = base + (i * 0x00010000); |
||||
} else { |
||||
if (info->flash_id & FLASH_BTYPE) { |
||||
/* set sector offsets for bottom boot block type */ |
||||
info->start[0] = base + 0x00000000; |
||||
info->start[1] = base + 0x00004000; |
||||
info->start[2] = base + 0x00006000; |
||||
info->start[3] = base + 0x00008000; |
||||
for (i = 4; i < info->sector_count; i++) { |
||||
info->start[i] = base + (i * 0x00010000) - 0x00030000; |
||||
} |
||||
} else { |
||||
/* set sector offsets for top boot block type */ |
||||
i = info->sector_count - 1; |
||||
info->start[i--] = base + info->size - 0x00004000; |
||||
info->start[i--] = base + info->size - 0x00006000; |
||||
info->start[i--] = base + info->size - 0x00008000; |
||||
for (; i >= 0; i--) { |
||||
info->start[i] = base + i * 0x00010000; |
||||
} |
||||
} |
||||
} |
||||
|
||||
/* check for protected sectors */ |
||||
for (i = 0; i < info->sector_count; i++) { |
||||
/* read sector protection at sector address, (A7 .. A0) = 0x02 */ |
||||
/* D0 = 1 if protected */ |
||||
#ifdef CONFIG_ADCIOP |
||||
addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]); |
||||
info->protect[i] = addr2[4] & 1; |
||||
#else |
||||
addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]); |
||||
if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) |
||||
info->protect[i] = 0; |
||||
else |
||||
info->protect[i] = addr2[2] & 1; |
||||
#endif |
||||
} |
||||
|
||||
/*
|
||||
* Prevent writes to uninitialized FLASH. |
||||
*/ |
||||
if (info->flash_id != FLASH_UNKNOWN) { |
||||
#if 0 /* test-only */
|
||||
#ifdef CONFIG_ADCIOP |
||||
addr2 = (volatile unsigned char *)info->start[0]; |
||||
addr2[ADDR0] = 0xAA; |
||||
addr2[ADDR1] = 0x55; |
||||
addr2[ADDR0] = 0xF0; /* reset bank */ |
||||
#else |
||||
addr2 = (FLASH_WORD_SIZE *)info->start[0]; |
||||
*addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */ |
||||
#endif |
||||
#else /* test-only */ |
||||
addr2 = (FLASH_WORD_SIZE *)info->start[0]; |
||||
*addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */ |
||||
#endif /* test-only */ |
||||
} |
||||
|
||||
return (info->size); |
||||
} |
||||
|
||||
int wait_for_DQ7(flash_info_t *info, int sect) |
||||
{ |
||||
ulong start, now, last; |
||||
volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]); |
||||
|
||||
start = get_timer (0); |
||||
last = start; |
||||
while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) { |
||||
if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { |
||||
printf ("Timeout\n"); |
||||
return -1; |
||||
} |
||||
/* show that we're waiting */ |
||||
if ((now - last) > 1000) { /* every second */ |
||||
putc ('.'); |
||||
last = now; |
||||
} |
||||
} |
||||
return 0; |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
|
||||
int flash_erase (flash_info_t *info, int s_first, int s_last) |
||||
{ |
||||
volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]); |
||||
volatile FLASH_WORD_SIZE *addr2; |
||||
int flag, prot, sect, l_sect; |
||||
int i; |
||||
|
||||
if ((s_first < 0) || (s_first > s_last)) { |
||||
if (info->flash_id == FLASH_UNKNOWN) { |
||||
printf ("- missing\n"); |
||||
} else { |
||||
printf ("- no sectors to erase\n"); |
||||
} |
||||
return 1; |
||||
} |
||||
|
||||
if (info->flash_id == FLASH_UNKNOWN) { |
||||
printf ("Can't erase unknown flash type - aborted\n"); |
||||
return 1; |
||||
} |
||||
|
||||
prot = 0; |
||||
for (sect=s_first; sect<=s_last; ++sect) { |
||||
if (info->protect[sect]) { |
||||
prot++; |
||||
} |
||||
} |
||||
|
||||
if (prot) { |
||||
printf ("- Warning: %d protected sectors will not be erased!\n", |
||||
prot); |
||||
} else { |
||||
printf ("\n"); |
||||
} |
||||
|
||||
l_sect = -1; |
||||
|
||||
/* Disable interrupts which might cause a timeout here */ |
||||
flag = disable_interrupts(); |
||||
|
||||
/* Start erase on unprotected sectors */ |
||||
for (sect = s_first; sect<=s_last; sect++) { |
||||
if (info->protect[sect] == 0) { /* not protected */ |
||||
addr2 = (FLASH_WORD_SIZE *)(info->start[sect]); |
||||
printf("Erasing sector %p\n", addr2); |
||||
|
||||
if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) { |
||||
addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; |
||||
addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; |
||||
addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080; |
||||
addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; |
||||
addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; |
||||
addr2[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */ |
||||
for (i=0; i<50; i++) |
||||
udelay(1000); /* wait 1 ms */ |
||||
} else { |
||||
addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; |
||||
addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; |
||||
addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080; |
||||
addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; |
||||
addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; |
||||
addr2[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */ |
||||
} |
||||
l_sect = sect; |
||||
/*
|
||||
* Wait for each sector to complete, it's more |
||||
* reliable. According to AMD Spec, you must |
||||
* issue all erase commands within a specified |
||||
* timeout. This has been seen to fail, especially |
||||
* if printf()s are included (for debug)!! |
||||
*/ |
||||
wait_for_DQ7(info, sect); |
||||
} |
||||
} |
||||
|
||||
/* re-enable interrupts if necessary */ |
||||
if (flag) |
||||
enable_interrupts(); |
||||
|
||||
/* wait at least 80us - let's wait 1 ms */ |
||||
udelay (1000); |
||||
|
||||
#if 0 |
||||
/*
|
||||
* We wait for the last triggered sector |
||||
*/ |
||||
if (l_sect < 0) |
||||
goto DONE; |
||||
wait_for_DQ7(info, l_sect); |
||||
|
||||
DONE: |
||||
#endif |
||||
/* reset to read mode */ |
||||
addr = (FLASH_WORD_SIZE *)info->start[0]; |
||||
addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */ |
||||
|
||||
printf (" done\n"); |
||||
return 0; |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Copy memory to flash, returns: |
||||
* 0 - OK |
||||
* 1 - write timeout |
||||
* 2 - Flash not erased |
||||
*/ |
||||
|
||||
int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) |
||||
{ |
||||
ulong cp, wp, data; |
||||
int i, l, rc; |
||||
|
||||
wp = (addr & ~3); /* get lower word aligned address */ |
||||
|
||||
/*
|
||||
* handle unaligned start bytes |
||||
*/ |
||||
if ((l = addr - wp) != 0) { |
||||
data = 0; |
||||
for (i=0, cp=wp; i<l; ++i, ++cp) { |
||||
data = (data << 8) | (*(uchar *)cp); |
||||
} |
||||
for (; i<4 && cnt>0; ++i) { |
||||
data = (data << 8) | *src++; |
||||
--cnt; |
||||
++cp; |
||||
} |
||||
for (; cnt==0 && i<4; ++i, ++cp) { |
||||
data = (data << 8) | (*(uchar *)cp); |
||||
} |
||||
|
||||
if ((rc = write_word(info, wp, data)) != 0) { |
||||
return (rc); |
||||
} |
||||
wp += 4; |
||||
} |
||||
|
||||
/*
|
||||
* handle word aligned part |
||||
*/ |
||||
while (cnt >= 4) { |
||||
data = 0; |
||||
for (i=0; i<4; ++i) { |
||||
data = (data << 8) | *src++; |
||||
} |
||||
if ((rc = write_word(info, wp, data)) != 0) { |
||||
return (rc); |
||||
} |
||||
wp += 4; |
||||
cnt -= 4; |
||||
} |
||||
|
||||
if (cnt == 0) { |
||||
return (0); |
||||
} |
||||
|
||||
/*
|
||||
* handle unaligned tail bytes |
||||
*/ |
||||
data = 0; |
||||
for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { |
||||
data = (data << 8) | *src++; |
||||
--cnt; |
||||
} |
||||
for (; i<4; ++i, ++cp) { |
||||
data = (data << 8) | (*(uchar *)cp); |
||||
} |
||||
|
||||
return (write_word(info, wp, data)); |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Write a word to Flash, returns: |
||||
* 0 - OK |
||||
* 1 - write timeout |
||||
* 2 - Flash not erased |
||||
*/ |
||||
static int write_word (flash_info_t * info, ulong dest, ulong data) |
||||
{ |
||||
volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) (info->start[0]); |
||||
volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *) dest; |
||||
volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *) & data; |
||||
ulong start; |
||||
int i; |
||||
|
||||
/* Check if Flash is (sufficiently) erased */ |
||||
if ((*((volatile FLASH_WORD_SIZE *) dest) & |
||||
(FLASH_WORD_SIZE) data) != (FLASH_WORD_SIZE) data) { |
||||
return (2); |
||||
} |
||||
|
||||
for (i = 0; i < 4 / sizeof (FLASH_WORD_SIZE); i++) { |
||||
int flag; |
||||
|
||||
/* Disable interrupts which might cause a timeout here */ |
||||
flag = disable_interrupts (); |
||||
|
||||
addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA; |
||||
addr2[ADDR1] = (FLASH_WORD_SIZE) 0x00550055; |
||||
addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00A000A0; |
||||
|
||||
dest2[i] = data2[i]; |
||||
|
||||
/* re-enable interrupts if necessary */ |
||||
if (flag) |
||||
enable_interrupts (); |
||||
|
||||
/* data polling for D7 */ |
||||
start = get_timer (0); |
||||
while ((dest2[i] & (FLASH_WORD_SIZE) 0x00800080) != |
||||
(data2[i] & (FLASH_WORD_SIZE) 0x00800080)) { |
||||
|
||||
if (get_timer (start) > CFG_FLASH_WRITE_TOUT) { |
||||
return (1); |
||||
} |
||||
} |
||||
} |
||||
|
||||
return (0); |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
@ -1,135 +0,0 @@ |
||||
/* |
||||
* (C) Copyright 2002 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
OUTPUT_ARCH(powerpc) |
||||
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); |
||||
/* Do we need any of these for elf? |
||||
__DYNAMIC = 0; */ |
||||
SECTIONS |
||||
{ |
||||
/* Read-only sections, merged into text segment: */ |
||||
. = + SIZEOF_HEADERS; |
||||
.interp : { *(.interp) } |
||||
.hash : { *(.hash) } |
||||
.dynsym : { *(.dynsym) } |
||||
.dynstr : { *(.dynstr) } |
||||
.rel.text : { *(.rel.text) } |
||||
.rela.text : { *(.rela.text) } |
||||
.rel.data : { *(.rel.data) } |
||||
.rela.data : { *(.rela.data) } |
||||
.rel.rodata : { *(.rel.rodata) } |
||||
.rela.rodata : { *(.rela.rodata) } |
||||
.rel.got : { *(.rel.got) } |
||||
.rela.got : { *(.rela.got) } |
||||
.rel.ctors : { *(.rel.ctors) } |
||||
.rela.ctors : { *(.rela.ctors) } |
||||
.rel.dtors : { *(.rel.dtors) } |
||||
.rela.dtors : { *(.rela.dtors) } |
||||
.rel.bss : { *(.rel.bss) } |
||||
.rela.bss : { *(.rela.bss) } |
||||
.rel.plt : { *(.rel.plt) } |
||||
.rela.plt : { *(.rela.plt) } |
||||
.init : { *(.init) } |
||||
.plt : { *(.plt) } |
||||
.text : |
||||
{ |
||||
/* WARNING - the following is hand-optimized to fit within */ |
||||
/* the sector layout of our flash chips! XXX FIXME XXX */ |
||||
|
||||
mpc8xx/start.o (.text) |
||||
common/dlmalloc.o (.text) |
||||
ppc/vsprintf.o (.text) |
||||
ppc/crc32.o (.text) |
||||
ppc/extable.o (.text) |
||||
|
||||
common/environment.o(.text) |
||||
|
||||
*(.text) |
||||
*(.fixup) |
||||
*(.got1) |
||||
} |
||||
_etext = .; |
||||
PROVIDE (etext = .); |
||||
.rodata : |
||||
{ |
||||
*(.rodata) |
||||
*(.rodata1) |
||||
} |
||||
.fini : { *(.fini) } =0 |
||||
.ctors : { *(.ctors) } |
||||
.dtors : { *(.dtors) } |
||||
|
||||
/* Read-write section, merged into data segment: */ |
||||
. = (. + 0x0FFF) & 0xFFFFF000; |
||||
_erotext = .; |
||||
PROVIDE (erotext = .); |
||||
.reloc : |
||||
{ |
||||
*(.got) |
||||
_GOT2_TABLE_ = .; |
||||
*(.got2) |
||||
_FIXUP_TABLE_ = .; |
||||
*(.fixup) |
||||
} |
||||
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; |
||||
__fixup_entries = (. - _FIXUP_TABLE_)>>2; |
||||
|
||||
.data : |
||||
{ |
||||
*(.data) |
||||
*(.data1) |
||||
*(.sdata) |
||||
*(.sdata2) |
||||
*(.dynamic) |
||||
CONSTRUCTORS |
||||
} |
||||
_edata = .; |
||||
PROVIDE (edata = .); |
||||
|
||||
__u_boot_cmd_start = .; |
||||
.u_boot_cmd : { *(.u_boot_cmd) } |
||||
__u_boot_cmd_end = .; |
||||
|
||||
|
||||
__start___ex_table = .; |
||||
__ex_table : { *(__ex_table) } |
||||
__stop___ex_table = .; |
||||
|
||||
. = ALIGN(4096); |
||||
__init_begin = .; |
||||
.text.init : { *(.text.init) } |
||||
.data.init : { *(.data.init) } |
||||
. = ALIGN(4096); |
||||
__init_end = .; |
||||
|
||||
__bss_start = .; |
||||
.bss : |
||||
{ |
||||
*(.sbss) *(.scommon) |
||||
*(.dynbss) |
||||
*(.bss) |
||||
*(COMMON) |
||||
} |
||||
_end = . ; |
||||
PROVIDE (end = .); |
||||
} |
@ -1,144 +0,0 @@ |
||||
/* |
||||
* (C) Copyright 2002-2004 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
OUTPUT_ARCH(powerpc) |
||||
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); |
||||
/* Do we need any of these for elf? |
||||
__DYNAMIC = 0; */ |
||||
SECTIONS |
||||
{ |
||||
/* Read-only sections, merged into text segment: */ |
||||
. = + SIZEOF_HEADERS; |
||||
.interp : { *(.interp) } |
||||
.hash : { *(.hash) } |
||||
.dynsym : { *(.dynsym) } |
||||
.dynstr : { *(.dynstr) } |
||||
.rel.text : { *(.rel.text) } |
||||
.rela.text : { *(.rela.text) } |
||||
.rel.data : { *(.rel.data) } |
||||
.rela.data : { *(.rela.data) } |
||||
.rel.rodata : { *(.rel.rodata) } |
||||
.rela.rodata : { *(.rela.rodata) } |
||||
.rel.got : { *(.rel.got) } |
||||
.rela.got : { *(.rela.got) } |
||||
.rel.ctors : { *(.rel.ctors) } |
||||
.rela.ctors : { *(.rela.ctors) } |
||||
.rel.dtors : { *(.rel.dtors) } |
||||
.rela.dtors : { *(.rela.dtors) } |
||||
.rel.bss : { *(.rel.bss) } |
||||
.rela.bss : { *(.rela.bss) } |
||||
.rel.plt : { *(.rel.plt) } |
||||
.rela.plt : { *(.rela.plt) } |
||||
.init : { *(.init) } |
||||
.plt : { *(.plt) } |
||||
.text : |
||||
{ |
||||
/* WARNING - the following is hand-optimized to fit within */ |
||||
/* the sector layout of our flash chips! XXX FIXME XXX */ |
||||
|
||||
cpu/ppc4xx/start.o (.text) |
||||
board/ocotea/init.o (.text) |
||||
cpu/ppc4xx/kgdb.o (.text) |
||||
cpu/ppc4xx/traps.o (.text) |
||||
cpu/ppc4xx/interrupts.o (.text) |
||||
cpu/ppc4xx/serial.o (.text) |
||||
cpu/ppc4xx/cpu_init.o (.text) |
||||
cpu/ppc4xx/speed.o (.text) |
||||
cpu/ppc4xx/440gx_enet.o (.text) |
||||
common/dlmalloc.o (.text) |
||||
lib_generic/crc32.o (.text) |
||||
lib_ppc/extable.o (.text) |
||||
lib_generic/zlib.o (.text) |
||||
|
||||
/* common/environment.o(.text) */ |
||||
|
||||
*(.text) |
||||
*(.fixup) |
||||
*(.got1) |
||||
} |
||||
_etext = .; |
||||
PROVIDE (etext = .); |
||||
.rodata : |
||||
{ |
||||
*(.rodata) |
||||
*(.rodata1) |
||||
*(.rodata.str1.4) |
||||
} |
||||
.fini : { *(.fini) } =0 |
||||
.ctors : { *(.ctors) } |
||||
.dtors : { *(.dtors) } |
||||
|
||||
/* Read-write section, merged into data segment: */ |
||||
. = (. + 0x0FFF) & 0xFFFFF000; |
||||
_erotext = .; |
||||
PROVIDE (erotext = .); |
||||
.reloc : |
||||
{ |
||||
*(.got) |
||||
_GOT2_TABLE_ = .; |
||||
*(.got2) |
||||
_FIXUP_TABLE_ = .; |
||||
*(.fixup) |
||||
} |
||||
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; |
||||
__fixup_entries = (. - _FIXUP_TABLE_)>>2; |
||||
|
||||
.data : |
||||
{ |
||||
*(.data) |
||||
*(.data1) |
||||
*(.sdata) |
||||
*(.sdata2) |
||||
*(.dynamic) |
||||
CONSTRUCTORS |
||||
} |
||||
_edata = .; |
||||
PROVIDE (edata = .); |
||||
|
||||
__u_boot_cmd_start = .; |
||||
.u_boot_cmd : { *(.u_boot_cmd) } |
||||
__u_boot_cmd_end = .; |
||||
|
||||
|
||||
__start___ex_table = .; |
||||
__ex_table : { *(__ex_table) } |
||||
__stop___ex_table = .; |
||||
|
||||
. = ALIGN(256); |
||||
__init_begin = .; |
||||
.text.init : { *(.text.init) } |
||||
.data.init : { *(.data.init) } |
||||
. = ALIGN(256); |
||||
__init_end = .; |
||||
|
||||
__bss_start = .; |
||||
.bss : |
||||
{ |
||||
*(.sbss) *(.scommon) |
||||
*(.dynbss) |
||||
*(.bss) |
||||
*(COMMON) |
||||
} |
||||
_end = . ; |
||||
PROVIDE (end = .); |
||||
} |
@ -1,729 +0,0 @@ |
||||
/*
|
||||
* (C) Copyright 2000 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
/*
|
||||
* Modified 4/5/2001 |
||||
* Wait for completion of each sector erase command issued |
||||
* 4/5/2001 |
||||
* Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <ppc4xx.h> |
||||
#include <asm/processor.h> |
||||
|
||||
flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Functions |
||||
*/ |
||||
static ulong flash_get_size (vu_long *addr, flash_info_t *info); |
||||
static int write_word (flash_info_t *info, ulong dest, ulong data); |
||||
static void flash_get_offsets (ulong base, flash_info_t *info); |
||||
|
||||
#ifdef CONFIG_ADCIOP |
||||
#define ADDR0 0x0aa9 |
||||
#define ADDR1 0x0556 |
||||
#define FLASH_WORD_SIZE unsigned char |
||||
#endif |
||||
|
||||
#ifdef CONFIG_CPCI405 |
||||
#define ADDR0 0x5555 |
||||
#define ADDR1 0x2aaa |
||||
#define FLASH_WORD_SIZE unsigned short |
||||
#endif |
||||
|
||||
#ifdef CONFIG_WALNUT405 |
||||
#define ADDR0 0x5555 |
||||
#define ADDR1 0x2aaa |
||||
#define FLASH_WORD_SIZE unsigned char |
||||
#endif |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
|
||||
unsigned long flash_init (void) |
||||
{ |
||||
unsigned long size_b0, size_b1; |
||||
int i; |
||||
uint pbcr; |
||||
unsigned long base_b0, base_b1; |
||||
|
||||
/* Init: no FLASHes known */ |
||||
for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) { |
||||
flash_info[i].flash_id = FLASH_UNKNOWN; |
||||
} |
||||
|
||||
/* Static FLASH Bank configuration here - FIXME XXX */ |
||||
|
||||
size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]); |
||||
|
||||
if (flash_info[0].flash_id == FLASH_UNKNOWN) { |
||||
printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", |
||||
size_b0, size_b0<<20); |
||||
} |
||||
|
||||
/* Only one bank */ |
||||
if (CFG_MAX_FLASH_BANKS == 1) |
||||
{ |
||||
/* Setup offsets */ |
||||
flash_get_offsets (FLASH_BASE0_PRELIM, &flash_info[0]); |
||||
|
||||
/* Monitor protection ON by default */ |
||||
(void)flash_protect(FLAG_PROTECT_SET, |
||||
FLASH_BASE0_PRELIM, |
||||
FLASH_BASE0_PRELIM+monitor_flash_len-1, |
||||
&flash_info[0]); |
||||
size_b1 = 0 ; |
||||
flash_info[0].size = size_b0; |
||||
} |
||||
|
||||
/* 2 banks */ |
||||
else |
||||
{ |
||||
size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]); |
||||
|
||||
/* Re-do sizing to get full correct info */ |
||||
|
||||
if (size_b1) |
||||
{ |
||||
mtdcr(ebccfga, pb0cr); |
||||
pbcr = mfdcr(ebccfgd); |
||||
mtdcr(ebccfga, pb0cr); |
||||
base_b1 = -size_b1; |
||||
pbcr = (pbcr & 0x0001ffff) | base_b1 | (((size_b1/1024/1024)-1)<<17); |
||||
mtdcr(ebccfgd, pbcr); |
||||
/* printf("pb1cr = %x\n", pbcr); */ |
||||
} |
||||
|
||||
if (size_b0) |
||||
{ |
||||
mtdcr(ebccfga, pb1cr); |
||||
pbcr = mfdcr(ebccfgd); |
||||
mtdcr(ebccfga, pb1cr); |
||||
base_b0 = base_b1 - size_b0; |
||||
pbcr = (pbcr & 0x0001ffff) | base_b0 | (((size_b0/1024/1024)-1)<<17); |
||||
mtdcr(ebccfgd, pbcr); |
||||
/* printf("pb0cr = %x\n", pbcr); */ |
||||
} |
||||
|
||||
size_b0 = flash_get_size((vu_long *)base_b0, &flash_info[0]); |
||||
|
||||
flash_get_offsets (base_b0, &flash_info[0]); |
||||
|
||||
/* monitor protection ON by default */ |
||||
(void)flash_protect(FLAG_PROTECT_SET, |
||||
base_b0+size_b0-monitor_flash_len, |
||||
base_b0+size_b0-1, |
||||
&flash_info[0]); |
||||
|
||||
if (size_b1) { |
||||
/* Re-do sizing to get full correct info */ |
||||
size_b1 = flash_get_size((vu_long *)base_b1, &flash_info[1]); |
||||
|
||||
flash_get_offsets (base_b1, &flash_info[1]); |
||||
|
||||
/* monitor protection ON by default */ |
||||
(void)flash_protect(FLAG_PROTECT_SET, |
||||
base_b1+size_b1-monitor_flash_len, |
||||
base_b1+size_b1-1, |
||||
&flash_info[1]); |
||||
/* monitor protection OFF by default (one is enough) */ |
||||
(void)flash_protect(FLAG_PROTECT_CLEAR, |
||||
base_b0+size_b0-monitor_flash_len, |
||||
base_b0+size_b0-1, |
||||
&flash_info[0]); |
||||
} else { |
||||
flash_info[1].flash_id = FLASH_UNKNOWN; |
||||
flash_info[1].sector_count = -1; |
||||
} |
||||
|
||||
flash_info[0].size = size_b0; |
||||
flash_info[1].size = size_b1; |
||||
}/* else 2 banks */ |
||||
return (size_b0 + size_b1); |
||||
} |
||||
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
static void flash_get_offsets (ulong base, flash_info_t *info) |
||||
{ |
||||
int i; |
||||
|
||||
/* set up sector start address table */ |
||||
if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) || |
||||
(info->flash_id == FLASH_AM040)){ |
||||
for (i = 0; i < info->sector_count; i++) |
||||
info->start[i] = base + (i * 0x00010000); |
||||
} else { |
||||
if (info->flash_id & FLASH_BTYPE) { |
||||
/* set sector offsets for bottom boot block type */ |
||||
info->start[0] = base + 0x00000000; |
||||
info->start[1] = base + 0x00004000; |
||||
info->start[2] = base + 0x00006000; |
||||
info->start[3] = base + 0x00008000; |
||||
for (i = 4; i < info->sector_count; i++) { |
||||
info->start[i] = base + (i * 0x00010000) - 0x00030000; |
||||
} |
||||
} else { |
||||
/* set sector offsets for top boot block type */ |
||||
i = info->sector_count - 1; |
||||
info->start[i--] = base + info->size - 0x00004000; |
||||
info->start[i--] = base + info->size - 0x00006000; |
||||
info->start[i--] = base + info->size - 0x00008000; |
||||
for (; i >= 0; i--) { |
||||
info->start[i] = base + i * 0x00010000; |
||||
} |
||||
} |
||||
} |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
void flash_print_info (flash_info_t *info) |
||||
{ |
||||
int i; |
||||
int k; |
||||
int size; |
||||
int erased; |
||||
volatile unsigned long *flash; |
||||
|
||||
if (info->flash_id == FLASH_UNKNOWN) { |
||||
printf ("missing or unknown FLASH type\n"); |
||||
return; |
||||
} |
||||
|
||||
switch (info->flash_id & FLASH_VENDMASK) { |
||||
case FLASH_MAN_AMD: printf ("AMD "); break; |
||||
case FLASH_MAN_FUJ: printf ("FUJITSU "); break; |
||||
case FLASH_MAN_SST: printf ("SST "); break; |
||||
default: printf ("Unknown Vendor "); break; |
||||
} |
||||
|
||||
switch (info->flash_id & FLASH_TYPEMASK) { |
||||
case FLASH_AM040: printf ("AM29F040 (512 Kbit, uniform sector size)\n"); |
||||
break; |
||||
case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n"); |
||||
break; |
||||
case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n"); |
||||
break; |
||||
case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n"); |
||||
break; |
||||
case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n"); |
||||
break; |
||||
case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n"); |
||||
break; |
||||
case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n"); |
||||
break; |
||||
case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n"); |
||||
break; |
||||
case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n"); |
||||
break; |
||||
case FLASH_SST800A: printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n"); |
||||
break; |
||||
case FLASH_SST160A: printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n"); |
||||
break; |
||||
default: printf ("Unknown Chip Type\n"); |
||||
break; |
||||
} |
||||
|
||||
printf (" Size: %ld KB in %d Sectors\n", |
||||
info->size >> 10, info->sector_count); |
||||
|
||||
printf (" Sector Start Addresses:"); |
||||
for (i=0; i<info->sector_count; ++i) { |
||||
/*
|
||||
* Check if whole sector is erased |
||||
*/ |
||||
if (i != (info->sector_count-1)) |
||||
size = info->start[i+1] - info->start[i]; |
||||
else |
||||
size = info->start[0] + info->size - info->start[i]; |
||||
erased = 1; |
||||
flash = (volatile unsigned long *)info->start[i]; |
||||
size = size >> 2; /* divide by 4 for longword access */ |
||||
for (k=0; k<size; k++) |
||||
{ |
||||
if (*flash++ != 0xffffffff) |
||||
{ |
||||
erased = 0; |
||||
break; |
||||
} |
||||
} |
||||
|
||||
if ((i % 5) == 0) |
||||
printf ("\n "); |
||||
#if 0 /* test-only */
|
||||
printf (" %08lX%s", |
||||
info->start[i], |
||||
info->protect[i] ? " (RO)" : " " |
||||
#else |
||||
printf (" %08lX%s%s", |
||||
info->start[i], |
||||
erased ? " E" : " ", |
||||
info->protect[i] ? "RO " : " " |
||||
#endif |
||||
); |
||||
} |
||||
printf ("\n"); |
||||
return; |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
|
||||
/*
|
||||
* The following code cannot be run from FLASH! |
||||
*/ |
||||
static ulong flash_get_size (vu_long *addr, flash_info_t *info) |
||||
{ |
||||
short i; |
||||
FLASH_WORD_SIZE value; |
||||
ulong base = (ulong)addr; |
||||
volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr; |
||||
|
||||
/* Write auto select command: read Manufacturer ID */ |
||||
addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; |
||||
addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055; |
||||
addr2[ADDR0] = (FLASH_WORD_SIZE)0x00900090; |
||||
|
||||
#ifdef CONFIG_ADCIOP |
||||
value = addr2[2]; |
||||
#else |
||||
value = addr2[0]; |
||||
#endif |
||||
|
||||
switch (value) { |
||||
case (FLASH_WORD_SIZE)AMD_MANUFACT: |
||||
info->flash_id = FLASH_MAN_AMD; |
||||
break; |
||||
case (FLASH_WORD_SIZE)FUJ_MANUFACT: |
||||
info->flash_id = FLASH_MAN_FUJ; |
||||
break; |
||||
case (FLASH_WORD_SIZE)SST_MANUFACT: |
||||
info->flash_id = FLASH_MAN_SST; |
||||
break; |
||||
default: |
||||
info->flash_id = FLASH_UNKNOWN; |
||||
info->sector_count = 0; |
||||
info->size = 0; |
||||
return (0); /* no or unknown flash */ |
||||
} |
||||
|
||||
#ifdef CONFIG_ADCIOP |
||||
value = addr2[0]; /* device ID */ |
||||
/* printf("\ndev_code=%x\n", value); */ |
||||
#else |
||||
value = addr2[1]; /* device ID */ |
||||
#endif |
||||
|
||||
switch (value) { |
||||
case (FLASH_WORD_SIZE)AMD_ID_F040B: |
||||
info->flash_id += FLASH_AM040; |
||||
info->sector_count = 8; |
||||
info->size = 0x0080000; /* => 512 ko */ |
||||
break; |
||||
case (FLASH_WORD_SIZE)AMD_ID_LV400T: |
||||
info->flash_id += FLASH_AM400T; |
||||
info->sector_count = 11; |
||||
info->size = 0x00080000; |
||||
break; /* => 0.5 MB */ |
||||
|
||||
case (FLASH_WORD_SIZE)AMD_ID_LV400B: |
||||
info->flash_id += FLASH_AM400B; |
||||
info->sector_count = 11; |
||||
info->size = 0x00080000; |
||||
break; /* => 0.5 MB */ |
||||
|
||||
case (FLASH_WORD_SIZE)AMD_ID_LV800T: |
||||
info->flash_id += FLASH_AM800T; |
||||
info->sector_count = 19; |
||||
info->size = 0x00100000; |
||||
break; /* => 1 MB */ |
||||
|
||||
case (FLASH_WORD_SIZE)AMD_ID_LV800B: |
||||
info->flash_id += FLASH_AM800B; |
||||
info->sector_count = 19; |
||||
info->size = 0x00100000; |
||||
break; /* => 1 MB */ |
||||
|
||||
case (FLASH_WORD_SIZE)AMD_ID_LV160T: |
||||
info->flash_id += FLASH_AM160T; |
||||
info->sector_count = 35; |
||||
info->size = 0x00200000; |
||||
break; /* => 2 MB */ |
||||
|
||||
case (FLASH_WORD_SIZE)AMD_ID_LV160B: |
||||
info->flash_id += FLASH_AM160B; |
||||
info->sector_count = 35; |
||||
info->size = 0x00200000; |
||||
break; /* => 2 MB */ |
||||
#if 0 /* enable when device IDs are available */
|
||||
case (FLASH_WORD_SIZE)AMD_ID_LV320T: |
||||
info->flash_id += FLASH_AM320T; |
||||
info->sector_count = 67; |
||||
info->size = 0x00400000; |
||||
break; /* => 4 MB */ |
||||
|
||||
case (FLASH_WORD_SIZE)AMD_ID_LV320B: |
||||
info->flash_id += FLASH_AM320B; |
||||
info->sector_count = 67; |
||||
info->size = 0x00400000; |
||||
break; /* => 4 MB */ |
||||
#endif |
||||
case (FLASH_WORD_SIZE)SST_ID_xF800A: |
||||
info->flash_id += FLASH_SST800A; |
||||
info->sector_count = 16; |
||||
info->size = 0x00100000; |
||||
break; /* => 1 MB */ |
||||
|
||||
case (FLASH_WORD_SIZE)SST_ID_xF160A: |
||||
info->flash_id += FLASH_SST160A; |
||||
info->sector_count = 32; |
||||
info->size = 0x00200000; |
||||
break; /* => 2 MB */ |
||||
|
||||
default: |
||||
info->flash_id = FLASH_UNKNOWN; |
||||
return (0); /* => no or unknown flash */ |
||||
|
||||
} |
||||
|
||||
/* set up sector start address table */ |
||||
if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) || |
||||
(info->flash_id == FLASH_AM040)){ |
||||
for (i = 0; i < info->sector_count; i++) |
||||
info->start[i] = base + (i * 0x00010000); |
||||
} else { |
||||
if (info->flash_id & FLASH_BTYPE) { |
||||
/* set sector offsets for bottom boot block type */ |
||||
info->start[0] = base + 0x00000000; |
||||
info->start[1] = base + 0x00004000; |
||||
info->start[2] = base + 0x00006000; |
||||
info->start[3] = base + 0x00008000; |
||||
for (i = 4; i < info->sector_count; i++) { |
||||
info->start[i] = base + (i * 0x00010000) - 0x00030000; |
||||
} |
||||
} else { |
||||
/* set sector offsets for top boot block type */ |
||||
i = info->sector_count - 1; |
||||
info->start[i--] = base + info->size - 0x00004000; |
||||
info->start[i--] = base + info->size - 0x00006000; |
||||
info->start[i--] = base + info->size - 0x00008000; |
||||
for (; i >= 0; i--) { |
||||
info->start[i] = base + i * 0x00010000; |
||||
} |
||||
} |
||||
} |
||||
|
||||
/* check for protected sectors */ |
||||
for (i = 0; i < info->sector_count; i++) { |
||||
/* read sector protection at sector address, (A7 .. A0) = 0x02 */ |
||||
/* D0 = 1 if protected */ |
||||
#ifdef CONFIG_ADCIOP |
||||
addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]); |
||||
info->protect[i] = addr2[4] & 1; |
||||
#else |
||||
addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]); |
||||
if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) |
||||
info->protect[i] = 0; |
||||
else |
||||
info->protect[i] = addr2[2] & 1; |
||||
#endif |
||||
} |
||||
|
||||
/*
|
||||
* Prevent writes to uninitialized FLASH. |
||||
*/ |
||||
if (info->flash_id != FLASH_UNKNOWN) { |
||||
#if 0 /* test-only */
|
||||
#ifdef CONFIG_ADCIOP |
||||
addr2 = (volatile unsigned char *)info->start[0]; |
||||
addr2[ADDR0] = 0xAA; |
||||
addr2[ADDR1] = 0x55; |
||||
addr2[ADDR0] = 0xF0; /* reset bank */ |
||||
#else |
||||
addr2 = (FLASH_WORD_SIZE *)info->start[0]; |
||||
*addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */ |
||||
#endif |
||||
#else /* test-only */ |
||||
addr2 = (FLASH_WORD_SIZE *)info->start[0]; |
||||
*addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */ |
||||
#endif /* test-only */ |
||||
} |
||||
|
||||
return (info->size); |
||||
} |
||||
|
||||
int wait_for_DQ7(flash_info_t *info, int sect) |
||||
{ |
||||
ulong start, now, last; |
||||
volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]); |
||||
|
||||
start = get_timer (0); |
||||
last = start; |
||||
while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) { |
||||
if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { |
||||
printf ("Timeout\n"); |
||||
return -1; |
||||
} |
||||
/* show that we're waiting */ |
||||
if ((now - last) > 1000) { /* every second */ |
||||
putc ('.'); |
||||
last = now; |
||||
} |
||||
} |
||||
return 0; |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
|
||||
int flash_erase (flash_info_t *info, int s_first, int s_last) |
||||
{ |
||||
volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]); |
||||
volatile FLASH_WORD_SIZE *addr2; |
||||
int flag, prot, sect, l_sect; |
||||
int i; |
||||
|
||||
if ((s_first < 0) || (s_first > s_last)) { |
||||
if (info->flash_id == FLASH_UNKNOWN) { |
||||
printf ("- missing\n"); |
||||
} else { |
||||
printf ("- no sectors to erase\n"); |
||||
} |
||||
return 1; |
||||
} |
||||
|
||||
if (info->flash_id == FLASH_UNKNOWN) { |
||||
printf ("Can't erase unknown flash type - aborted\n"); |
||||
return 1; |
||||
} |
||||
|
||||
prot = 0; |
||||
for (sect=s_first; sect<=s_last; ++sect) { |
||||
if (info->protect[sect]) { |
||||
prot++; |
||||
} |
||||
} |
||||
|
||||
if (prot) { |
||||
printf ("- Warning: %d protected sectors will not be erased!\n", |
||||
prot); |
||||
} else { |
||||
printf ("\n"); |
||||
} |
||||
|
||||
l_sect = -1; |
||||
|
||||
/* Disable interrupts which might cause a timeout here */ |
||||
flag = disable_interrupts(); |
||||
|
||||
/* Start erase on unprotected sectors */ |
||||
for (sect = s_first; sect<=s_last; sect++) { |
||||
if (info->protect[sect] == 0) { /* not protected */ |
||||
addr2 = (FLASH_WORD_SIZE *)(info->start[sect]); |
||||
printf("Erasing sector %p\n", addr2); /* CLH */ |
||||
|
||||
if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) { |
||||
addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; |
||||
addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; |
||||
addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080; |
||||
addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; |
||||
addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; |
||||
addr2[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */ |
||||
for (i=0; i<50; i++) |
||||
udelay(1000); /* wait 1 ms */ |
||||
} else { |
||||
addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; |
||||
addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; |
||||
addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080; |
||||
addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; |
||||
addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; |
||||
addr2[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */ |
||||
} |
||||
l_sect = sect; |
||||
/*
|
||||
* Wait for each sector to complete, it's more |
||||
* reliable. According to AMD Spec, you must |
||||
* issue all erase commands within a specified |
||||
* timeout. This has been seen to fail, especially |
||||
* if printf()s are included (for debug)!! |
||||
*/ |
||||
wait_for_DQ7(info, sect); |
||||
} |
||||
} |
||||
|
||||
/* re-enable interrupts if necessary */ |
||||
if (flag) |
||||
enable_interrupts(); |
||||
|
||||
/* wait at least 80us - let's wait 1 ms */ |
||||
udelay (1000); |
||||
|
||||
#if 0 |
||||
/*
|
||||
* We wait for the last triggered sector |
||||
*/ |
||||
if (l_sect < 0) |
||||
goto DONE; |
||||
wait_for_DQ7(info, l_sect); |
||||
|
||||
DONE: |
||||
#endif |
||||
/* reset to read mode */ |
||||
addr = (FLASH_WORD_SIZE *)info->start[0]; |
||||
addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */ |
||||
|
||||
printf (" done\n"); |
||||
return 0; |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Copy memory to flash, returns: |
||||
* 0 - OK |
||||
* 1 - write timeout |
||||
* 2 - Flash not erased |
||||
*/ |
||||
|
||||
int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) |
||||
{ |
||||
ulong cp, wp, data; |
||||
int i, l, rc; |
||||
|
||||
wp = (addr & ~3); /* get lower word aligned address */ |
||||
|
||||
/*
|
||||
* handle unaligned start bytes |
||||
*/ |
||||
if ((l = addr - wp) != 0) { |
||||
data = 0; |
||||
for (i=0, cp=wp; i<l; ++i, ++cp) { |
||||
data = (data << 8) | (*(uchar *)cp); |
||||
} |
||||
for (; i<4 && cnt>0; ++i) { |
||||
data = (data << 8) | *src++; |
||||
--cnt; |
||||
++cp; |
||||
} |
||||
for (; cnt==0 && i<4; ++i, ++cp) { |
||||
data = (data << 8) | (*(uchar *)cp); |
||||
} |
||||
|
||||
if ((rc = write_word(info, wp, data)) != 0) { |
||||
return (rc); |
||||
} |
||||
wp += 4; |
||||
} |
||||
|
||||
/*
|
||||
* handle word aligned part |
||||
*/ |
||||
while (cnt >= 4) { |
||||
data = 0; |
||||
for (i=0; i<4; ++i) { |
||||
data = (data << 8) | *src++; |
||||
} |
||||
if ((rc = write_word(info, wp, data)) != 0) { |
||||
return (rc); |
||||
} |
||||
wp += 4; |
||||
cnt -= 4; |
||||
} |
||||
|
||||
if (cnt == 0) { |
||||
return (0); |
||||
} |
||||
|
||||
/*
|
||||
* handle unaligned tail bytes |
||||
*/ |
||||
data = 0; |
||||
for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { |
||||
data = (data << 8) | *src++; |
||||
--cnt; |
||||
} |
||||
for (; i<4; ++i, ++cp) { |
||||
data = (data << 8) | (*(uchar *)cp); |
||||
} |
||||
|
||||
return (write_word(info, wp, data)); |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Write a word to Flash, returns: |
||||
* 0 - OK |
||||
* 1 - write timeout |
||||
* 2 - Flash not erased |
||||
*/ |
||||
static int write_word (flash_info_t * info, ulong dest, ulong data) |
||||
{ |
||||
volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) (info->start[0]); |
||||
volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *) dest; |
||||
volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *) & data; |
||||
ulong start; |
||||
int i; |
||||
|
||||
/* Check if Flash is (sufficiently) erased */ |
||||
if ((*((volatile FLASH_WORD_SIZE *) dest) & |
||||
(FLASH_WORD_SIZE) data) != (FLASH_WORD_SIZE) data) { |
||||
return (2); |
||||
} |
||||
|
||||
for (i = 0; i < 4 / sizeof (FLASH_WORD_SIZE); i++) { |
||||
int flag; |
||||
|
||||
/* Disable interrupts which might cause a timeout here */ |
||||
flag = disable_interrupts (); |
||||
|
||||
addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA; |
||||
addr2[ADDR1] = (FLASH_WORD_SIZE) 0x00550055; |
||||
addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00A000A0; |
||||
|
||||
dest2[i] = data2[i]; |
||||
|
||||
/* re-enable interrupts if necessary */ |
||||
if (flag) |
||||
enable_interrupts (); |
||||
|
||||
/* data polling for D7 */ |
||||
start = get_timer (0); |
||||
while ((dest2[i] & (FLASH_WORD_SIZE) 0x00800080) != |
||||
(data2[i] & (FLASH_WORD_SIZE) 0x00800080)) { |
||||
|
||||
if (get_timer (start) > CFG_FLASH_WRITE_TOUT) { |
||||
return (1); |
||||
} |
||||
} |
||||
} |
||||
|
||||
return (0); |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
@ -1,99 +0,0 @@ |
||||
/*------------------------------------------------------------------------------+ */ |
||||
/* */ |
||||
/* This source code has been made available to you by IBM on an AS-IS */ |
||||
/* basis. Anyone receiving this source is licensed under IBM */ |
||||
/* copyrights to use it in any way he or she deems fit, including */ |
||||
/* copying it, modifying it, compiling it, and redistributing it either */ |
||||
/* with or without modifications. No license under IBM patents or */ |
||||
/* patent applications is to be implied by the copyright license. */ |
||||
/* */ |
||||
/* Any user of this software should understand that IBM cannot provide */ |
||||
/* technical support for this software and will not be responsible for */ |
||||
/* any consequences resulting from the use of this software. */ |
||||
/* */ |
||||
/* Any person who transfers this source code or any derivative work */ |
||||
/* must include the IBM copyright notice, this paragraph, and the */ |
||||
/* preceding two paragraphs in the transferred software. */ |
||||
/* */ |
||||
/* COPYRIGHT I B M CORPORATION 1995 */ |
||||
/* LICENSED MATERIAL - PROGRAM PROPERTY OF I B M */ |
||||
/*------------------------------------------------------------------------------- */ |
||||
|
||||
/*----------------------------------------------------------------------------- */ |
||||
/* Function: ext_bus_cntlr_init */ |
||||
/* Description: Initializes the External Bus Controller for the external */ |
||||
/* peripherals. IMPORTANT: For pass1 this code must run from */ |
||||
/* cache since you can not reliably change a peripheral banks */ |
||||
/* timing register (pbxap) while running code from that bank. */ |
||||
/* For ex., since we are running from ROM on bank 0, we can NOT */ |
||||
/* execute the code that modifies bank 0 timings from ROM, so */ |
||||
/* we run it from cache. */ |
||||
/* Bank 0 - Flash and SRAM */ |
||||
/* Bank 1 - NVRAM/RTC */ |
||||
/* Bank 2 - Keyboard/Mouse controller */ |
||||
/* Bank 3 - IR controller */ |
||||
/* Bank 4 - not used */ |
||||
/* Bank 5 - not used */ |
||||
/* Bank 6 - not used */ |
||||
/* Bank 7 - FPGA registers */ |
||||
/*----------------------------------------------------------------------------- */ |
||||
#include <ppc4xx.h> |
||||
|
||||
#include <ppc_asm.tmpl> |
||||
#include <ppc_defs.h> |
||||
|
||||
#include <asm/cache.h> |
||||
#include <asm/mmu.h> |
||||
|
||||
|
||||
.globl ext_bus_cntlr_init
|
||||
ext_bus_cntlr_init: |
||||
mflr r4 /* save link register */ |
||||
bl ..getAddr |
||||
..getAddr: |
||||
mflr r3 /* get address of ..getAddr */ |
||||
mtlr r4 /* restore link register */ |
||||
addi r4,0,14 /* set ctr to 10; used to prefetch */
|
||||
mtctr r4 /* 10 cache lines to fit this function */ |
||||
/* in cache (gives us 8x10=80 instrctns) */ |
||||
..ebcloop: |
||||
icbt r0,r3 /* prefetch cache line for addr in r3 */ |
||||
addi r3,r3,32 /* move to next cache line */ |
||||
bdnz ..ebcloop /* continue for 10 cache lines */ |
||||
|
||||
/*------------------------------------------------------------------- */ |
||||
/* Delay to ensure all accesses to ROM are complete before changing */ |
||||
/* bank 0 timings. 200usec should be enough. */ |
||||
/* 200,000,000 (cycles/sec) X .000200 (sec) = 0x9C40 cycles */ |
||||
/*------------------------------------------------------------------- */ |
||||
addis r3,0,0x0 |
||||
ori r3,r3,0xA000 /* ensure 200usec have passed since reset */ |
||||
mtctr r3 |
||||
..spinlp: |
||||
bdnz ..spinlp /* spin loop */ |
||||
|
||||
/*----------------------------------------------------------------------- */ |
||||
/* Memory Bank 0 (Flash and SRAM) initialization */ |
||||
/*----------------------------------------------------------------------- */ |
||||
addi r4,0,pb0ap |
||||
mtdcr ebccfga,r4 |
||||
addis r4,0,0x9B01 |
||||
ori r4,r4,0x5480 |
||||
mtdcr ebccfgd,r4 |
||||
|
||||
addi r4,0,pb0cr |
||||
mtdcr ebccfga,r4 |
||||
addis r4,0,0xFFF1 /* BAS=0xFFF,BS=0x0(1MB),BU=0x3(R/W), */ |
||||
ori r4,r4,0x8000 /* BW=0x0( 8 bits) */ |
||||
mtdcr ebccfgd,r4 |
||||
|
||||
blr |
||||
|
||||
|
||||
/*----------------------------------------------------------------------------- */ |
||||
/* Function: sdram_init */ |
||||
/* Description: Dummy implementation here - done in C later */ |
||||
/*----------------------------------------------------------------------------- */ |
||||
.globl sdram_init
|
||||
sdram_init: |
||||
blr |
@ -1,135 +0,0 @@ |
||||
/* |
||||
* (C) Copyright 2000 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
OUTPUT_ARCH(powerpc) |
||||
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); |
||||
/* Do we need any of these for elf? |
||||
__DYNAMIC = 0; */ |
||||
SECTIONS |
||||
{ |
||||
/* Read-only sections, merged into text segment: */ |
||||
. = + SIZEOF_HEADERS; |
||||
.interp : { *(.interp) } |
||||
.hash : { *(.hash) } |
||||
.dynsym : { *(.dynsym) } |
||||
.dynstr : { *(.dynstr) } |
||||
.rel.text : { *(.rel.text) } |
||||
.rela.text : { *(.rela.text) } |
||||
.rel.data : { *(.rel.data) } |
||||
.rela.data : { *(.rela.data) } |
||||
.rel.rodata : { *(.rel.rodata) } |
||||
.rela.rodata : { *(.rela.rodata) } |
||||
.rel.got : { *(.rel.got) } |
||||
.rela.got : { *(.rela.got) } |
||||
.rel.ctors : { *(.rel.ctors) } |
||||
.rela.ctors : { *(.rela.ctors) } |
||||
.rel.dtors : { *(.rel.dtors) } |
||||
.rela.dtors : { *(.rela.dtors) } |
||||
.rel.bss : { *(.rel.bss) } |
||||
.rela.bss : { *(.rela.bss) } |
||||
.rel.plt : { *(.rel.plt) } |
||||
.rela.plt : { *(.rela.plt) } |
||||
.init : { *(.init) } |
||||
.plt : { *(.plt) } |
||||
.text : |
||||
{ |
||||
/* WARNING - the following is hand-optimized to fit within */ |
||||
/* the sector layout of our flash chips! XXX FIXME XXX */ |
||||
|
||||
mpc8xx/start.o (.text) |
||||
common/dlmalloc.o (.text) |
||||
lib_generic/vsprintf.o (.text) |
||||
lib_generic/crc32.o (.text) |
||||
lib_ppc/extable.o (.text) |
||||
|
||||
common/environment.o(.text) |
||||
|
||||
*(.text) |
||||
*(.fixup) |
||||
*(.got1) |
||||
} |
||||
_etext = .; |
||||
PROVIDE (etext = .); |
||||
.rodata : |
||||
{ |
||||
*(.rodata) |
||||
*(.rodata1) |
||||
} |
||||
.fini : { *(.fini) } =0 |
||||
.ctors : { *(.ctors) } |
||||
.dtors : { *(.dtors) } |
||||
|
||||
/* Read-write section, merged into data segment: */ |
||||
. = (. + 0x0FFF) & 0xFFFFF000; |
||||
_erotext = .; |
||||
PROVIDE (erotext = .); |
||||
.reloc : |
||||
{ |
||||
*(.got) |
||||
_GOT2_TABLE_ = .; |
||||
*(.got2) |
||||
_FIXUP_TABLE_ = .; |
||||
*(.fixup) |
||||
} |
||||
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; |
||||
__fixup_entries = (. - _FIXUP_TABLE_)>>2; |
||||
|
||||
.data : |
||||
{ |
||||
*(.data) |
||||
*(.data1) |
||||
*(.sdata) |
||||
*(.sdata2) |
||||
*(.dynamic) |
||||
CONSTRUCTORS |
||||
} |
||||
_edata = .; |
||||
PROVIDE (edata = .); |
||||
|
||||
__u_boot_cmd_start = .; |
||||
.u_boot_cmd : { *(.u_boot_cmd) } |
||||
__u_boot_cmd_end = .; |
||||
|
||||
|
||||
__start___ex_table = .; |
||||
__ex_table : { *(__ex_table) } |
||||
__stop___ex_table = .; |
||||
|
||||
. = ALIGN(4096); |
||||
__init_begin = .; |
||||
.text.init : { *(.text.init) } |
||||
.data.init : { *(.data.init) } |
||||
. = ALIGN(4096); |
||||
__init_end = .; |
||||
|
||||
__bss_start = .; |
||||
.bss : |
||||
{ |
||||
*(.sbss) *(.scommon) |
||||
*(.dynbss) |
||||
*(.bss) |
||||
*(COMMON) |
||||
} |
||||
_end = . ; |
||||
PROVIDE (end = .); |
||||
} |
@ -1,133 +0,0 @@ |
||||
/*
|
||||
* (C) Copyright 2000 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include "walnut405.h" |
||||
#include <asm/processor.h> |
||||
#include <spd_sdram.h> |
||||
|
||||
int board_early_init_f (void) |
||||
{ |
||||
/*-------------------------------------------------------------------------+
|
||||
| Interrupt controller setup for the Walnut board. |
||||
| Note: IRQ 0-15 405GP internally generated; active high; level sensitive |
||||
| IRQ 16 405GP internally generated; active low; level sensitive |
||||
| IRQ 17-24 RESERVED |
||||
| IRQ 25 (EXT IRQ 0) FPGA; active high; level sensitive |
||||
| IRQ 26 (EXT IRQ 1) SMI; active high; level sensitive |
||||
| IRQ 27 (EXT IRQ 2) Not Used |
||||
| IRQ 28 (EXT IRQ 3) PCI SLOT 3; active low; level sensitive |
||||
| IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive |
||||
| IRQ 30 (EXT IRQ 5) PCI SLOT 1; active low; level sensitive |
||||
| IRQ 31 (EXT IRQ 6) PCI SLOT 0; active low; level sensitive |
||||
| Note for Walnut board: |
||||
| An interrupt taken for the FPGA (IRQ 25) indicates that either |
||||
| the Mouse, Keyboard, IRDA, or External Expansion caused the |
||||
| interrupt. The FPGA must be read to determine which device |
||||
| caused the interrupt. The default setting of the FPGA clears |
||||
| |
||||
+-------------------------------------------------------------------------*/ |
||||
|
||||
mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */ |
||||
mtdcr (uicer, 0x00000000); /* disable all ints */ |
||||
mtdcr (uiccr, 0x00000020); /* set all but FPGA SMI to be non-critical */ |
||||
mtdcr (uicpr, 0xFFFFFFE0); /* set int polarities */ |
||||
mtdcr (uictr, 0x10000000); /* set int trigger levels */ |
||||
mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */ |
||||
mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */ |
||||
|
||||
#define mtebc(reg, data) mtdcr(ebccfga,reg);mtdcr(ebccfgd,data) |
||||
/* BAS=0xF00,BS=0x0(1MB),BU=0x3(R/W),BW=0x0( 8 bits) */ |
||||
mtebc (pb1ap, 0x02815480); |
||||
mtebc (pb1cr, 0xF0018000); |
||||
|
||||
/* BAS=0xF01,BS=0x0(1MB),BU=0x3(R/W),BW=0x0(8 bits) */ |
||||
mtebc (pb2ap, 0x04815A80); |
||||
mtebc (pb2cr, 0xF0118000); |
||||
|
||||
/* BAS=0xF02,BS=0x0(1MB),BU=0x3(R/W),BW=0x0( 8 bits) */ |
||||
mtebc (pb3ap, 0x01815280); |
||||
mtebc (pb3cr, 0xF0218000); |
||||
|
||||
/* BAS=0xF03,BS=0x0(1MB),BU=0x3(R/W),BW=0x0(8 bits) */ |
||||
mtebc (pb7ap, 0x01815280); |
||||
mtebc (pb7cr, 0xF0318000); |
||||
|
||||
/* set UART1 control to select CTS/RTS */ |
||||
#define FPGA_BRDC 0xF0300004 |
||||
*(volatile char *) (FPGA_BRDC) |= 0x1; |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
|
||||
/* ------------------------------------------------------------------------- */ |
||||
|
||||
/*
|
||||
* Check Board Identity: |
||||
*/ |
||||
|
||||
int checkboard (void) |
||||
{ |
||||
unsigned char *s = getenv ("serial#"); |
||||
unsigned char *e; |
||||
|
||||
puts ("Board: "); |
||||
|
||||
if (!s || strncmp (s, "WALNUT405", 9)) { |
||||
puts ("### No HW ID - assuming WALNUT405"); |
||||
} else { |
||||
for (e = s; *e; ++e) { |
||||
if (*e == ' ') |
||||
break; |
||||
} |
||||
for (; s < e; ++s) { |
||||
putc (*s); |
||||
} |
||||
} |
||||
putc ('\n'); |
||||
|
||||
return (0); |
||||
} |
||||
|
||||
|
||||
/* -------------------------------------------------------------------------
|
||||
initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of |
||||
the necessary info for SDRAM controller configuration |
||||
------------------------------------------------------------------------- */ |
||||
long int initdram (int board_type) |
||||
{ |
||||
return spd_sdram (0); |
||||
} |
||||
|
||||
/* ------------------------------------------------------------------------- */ |
||||
|
||||
int testdram (void) |
||||
{ |
||||
/* TODO: XXX XXX XXX */ |
||||
printf ("test: xxx MB - ok\n"); |
||||
|
||||
return (0); |
||||
} |
||||
|
||||
/* ------------------------------------------------------------------------- */ |
@ -1,44 +0,0 @@ |
||||
/*
|
||||
* (C) Copyright 2000 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
/****************************************************************************
|
||||
* FLASH Memory Map as used by TQ Monitor: |
||||
* |
||||
* Start Address Length |
||||
* +-----------------------+ 0x4000_0000 Start of Flash ----------------- |
||||
* | MON8xx code | 0x4000_0100 Reset Vector |
||||
* +-----------------------+ 0x400?_???? |
||||
* | (unused) | |
||||
* +-----------------------+ 0x4001_FF00 |
||||
* | Ethernet Addresses | 0x78 |
||||
* +-----------------------+ 0x4001_FF78 |
||||
* | (Reserved for MON8xx) | 0x44 |
||||
* +-----------------------+ 0x4001_FFBC |
||||
* | Lock Address | 0x04 |
||||
* +-----------------------+ 0x4001_FFC0 ^ |
||||
* | Hardware Information | 0x40 | MON8xx |
||||
* +=======================+ 0x4002_0000 (sector border) ----------------- |
||||
* | Autostart Header | | Applications |
||||
* | ... | v |
||||
* |
||||
*****************************************************************************/ |
@ -0,0 +1,31 @@ |
||||
--------------------------------------------------------------------- |
||||
Cleanup of AMCC eval boards (Walnut/Sycamore, Bubinga, Ebony, Ocotea) |
||||
--------------------------------------------------------------------- |
||||
|
||||
Changes to all AMCC eval boards: |
||||
-------------------------------- |
||||
|
||||
o Changed u-boot image size to 256 kBytes instead of 512 kBytes on most |
||||
boards. |
||||
|
||||
o Use 115200 baud as default console baudrate. |
||||
|
||||
o Added config option to use redundant environment in flash. This is also |
||||
the default setting. Option for environment in nvram is still available |
||||
for backward compatibility. |
||||
|
||||
o Merged board specific flash drivers to common flash driver: |
||||
board/amcc/common/flash.c |
||||
|
||||
|
||||
Sycamore/Walnut (one port supporting both eval boards): |
||||
------------------------------------------------------- |
||||
|
||||
o Cleanup to allow easier "cloning" for different (custom) boards: |
||||
|
||||
o Moved EBC configuration from board specific asm-file "init.S" |
||||
using defines in board configuration file. No board specific |
||||
asm file needed anymore. |
||||
|
||||
|
||||
August 01 2005, Stefan Roese <sr@denx.de> |
@ -0,0 +1,316 @@ |
||||
/*
|
||||
* (C) Copyright 2005 |
||||
* Stefan Roese, DENX Software Engineering, sr@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
/************************************************************************
|
||||
* bamboo.h - configuration for BAMBOO board |
||||
***********************************************************************/ |
||||
#ifndef __CONFIG_H |
||||
#define __CONFIG_H |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* High Level Configuration Options |
||||
*----------------------------------------------------------------------*/ |
||||
#define CONFIG_BAMBOO 1 /* Board is BAMBOO */ |
||||
#define CONFIG_440_EP 1 /* Specific PPC440EP support */ |
||||
|
||||
#define CONFIG_4xx 1 /* ... PPC4xx family */ |
||||
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ |
||||
#undef CFG_DRAM_TEST /* disable - takes long time! */ |
||||
//#define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */
|
||||
#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Base addresses -- Note these are effective addresses where the |
||||
* actual resources get mapped (not physical addresses) |
||||
*----------------------------------------------------------------------*/ |
||||
#define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */ |
||||
#define CFG_FLASH_BASE 0xfe000000 /* start of FLASH */ |
||||
#define CFG_MONITOR_BASE TEXT_BASE /* start of monitor */ |
||||
#define CFG_PCI_MEMBASE 0xa0000000 /* mapped pci memory */ |
||||
#define CFG_PCI_MEMBASE1 CFG_PCI_MEMBASE + 0x10000000 |
||||
#define CFG_PCI_MEMBASE2 CFG_PCI_MEMBASE1 + 0x10000000 |
||||
#define CFG_PCI_MEMBASE3 CFG_PCI_MEMBASE2 + 0x10000000 |
||||
|
||||
|
||||
/*Don't change either of these*/ |
||||
#define CFG_PERIPHERAL_BASE 0xef600000 /* internal peripherals */ |
||||
#define CFG_PCI_BASE 0xe0000000 /* internal PCI regs */ |
||||
/*Don't change either of these*/ |
||||
|
||||
#define CFG_USB_DEVICE 0x50000000 |
||||
#define CFG_NVRAM_BASE_ADDR 0x80000000 |
||||
#define CFG_BCSR_BASE (CFG_NVRAM_BASE_ADDR | 0x2000) |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Initial RAM & stack pointer (placed in SDRAM) |
||||
*----------------------------------------------------------------------*/ |
||||
#define CFG_INIT_RAM_ADDR 0xf0000000 /* DCache */ |
||||
#define CFG_INIT_RAM_END 0x2000 |
||||
#define CFG_GBL_DATA_SIZE 256 /* num bytes initial data */ |
||||
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) |
||||
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET |
||||
|
||||
#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */ |
||||
#define CFG_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc*/ |
||||
#define CFG_KBYTES_SDRAM ( 128 * 1024) /* 128MB */ |
||||
//#define CFG_SDRAM_BANKS (2)
|
||||
#define CFG_SDRAM_BANKS (1) |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Serial Port |
||||
*----------------------------------------------------------------------*/ |
||||
#define CFG_EXT_SERIAL_CLOCK 11059200 /* use external 11.059MHz clk */ |
||||
#define CONFIG_BAUDRATE 115200 |
||||
#define CONFIG_SERIAL_MULTI 1 |
||||
/*define this if you want console on UART1*/ |
||||
#undef CONFIG_UART1_CONSOLE |
||||
|
||||
#define CFG_BAUDRATE_TABLE \ |
||||
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* NVRAM/RTC |
||||
* |
||||
* NOTE: The RTC registers are located at 0x7FFF0 - 0x7FFFF |
||||
* The DS1558 code assumes this condition |
||||
* |
||||
*----------------------------------------------------------------------*/ |
||||
#define CFG_NVRAM_SIZE (0x2000 - 0x10) /* NVRAM size(8k)- RTC regs */ |
||||
#define CONFIG_RTC_DS1556 1 /* DS1556 RTC */ |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* FLASH related |
||||
*----------------------------------------------------------------------*/ |
||||
#if 0 /* test-only */
|
||||
#define CFG_MAX_FLASH_BANKS 1 /* number of banks */ |
||||
#define CFG_MAX_FLASH_SECT 256 /* sectors per device */ |
||||
|
||||
#undef CFG_FLASH_CHECKSUM |
||||
#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ |
||||
#define CFG_FLASH_WRITE_TOUT 120000 /* Timeout for Flash Write (in ms) */ |
||||
#else |
||||
#define CFG_FLASH_CFI /* The flash is CFI compatible */ |
||||
#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */ |
||||
#define CFG_FLASH_CFI_AMD_RESET 1 /* AMD RESET for STM 29W320DB! */ |
||||
|
||||
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
||||
#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ |
||||
|
||||
#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ |
||||
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ |
||||
|
||||
#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ |
||||
#endif |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* DDR SDRAM |
||||
*----------------------------------------------------------------------*/ |
||||
#undef CONFIG_SPD_EEPROM /* Don't use SPD EEPROM for setup */ |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* I2C |
||||
*----------------------------------------------------------------------*/ |
||||
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ |
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */ |
||||
#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */ |
||||
#define CFG_I2C_SLAVE 0x7F |
||||
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Environment |
||||
*----------------------------------------------------------------------*/ |
||||
#undef CFG_ENV_IS_IN_NVRAM /*No NVRAM on board*/ |
||||
#undef CFG_ENV_IS_IN_FLASH /* ... not in flash */ |
||||
#define CFG_ENV_IS_IN_EEPROM 1 |
||||
|
||||
/* Define to allow the user to overwrite serial and ethaddr */ |
||||
#define CONFIG_ENV_OVERWRITE |
||||
|
||||
#define CFG_I2C_MULTI_EEPROMS |
||||
#define CFG_ENV_SIZE 0x200 /* Size of Environment vars */ |
||||
#define CFG_ENV_OFFSET 0x0 |
||||
#define CFG_I2C_EEPROM_ADDR (0xa8>>1) |
||||
#define CFG_I2C_EEPROM_ADDR_LEN 1 |
||||
#define CFG_EEPROM_PAGE_WRITE_ENABLE |
||||
#define CFG_EEPROM_PAGE_WRITE_BITS 3 |
||||
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 |
||||
|
||||
#define CONFIG_BOOTCOMMAND "bootm 0xfe000000" /* autoboot command */ |
||||
#define CONFIG_BOOTDELAY 3 /* disable autoboot */ |
||||
|
||||
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ |
||||
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ |
||||
|
||||
#define CONFIG_MII 1 /* MII PHY management */ |
||||
#define CONFIG_NET_MULTI 1 /* required for netconsole */ |
||||
#define CONFIG_PHY1_ADDR 3 |
||||
#define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */ |
||||
#define CONFIG_PHY_ADDR 1 /* PHY address, See schematics */ |
||||
#define CONFIG_NETMASK 255.255.255.0 |
||||
#define CONFIG_IPADDR 10.0.4.251 |
||||
#define CONFIG_ETHADDR 00:10:EC:00:12:34 |
||||
#define CONFIG_ETH1ADDR 00:10:EC:00:12:35 |
||||
|
||||
#define CFG_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */ |
||||
#define CONFIG_SERVERIP 10.0.4.115 |
||||
|
||||
/* Partitions */ |
||||
#define CONFIG_MAC_PARTITION |
||||
#define CONFIG_DOS_PARTITION |
||||
#define CONFIG_ISO_PARTITION |
||||
|
||||
#ifdef CONFIG_440_EP |
||||
/* USB */ |
||||
#define CONFIG_USB_OHCI |
||||
#define CONFIG_USB_STORAGE |
||||
|
||||
/*Comment this out to enable USB 1.1 device*/ |
||||
#define USB_2_0_DEVICE |
||||
#endif /*CONFIG_440_EP*/ |
||||
|
||||
#ifdef DEBUG |
||||
#define CONFIG_PANIC_HANG |
||||
#else |
||||
#define CONFIG_HW_WATCHDOG /* watchdog */ |
||||
#endif |
||||
|
||||
#ifdef CONFIG_440_EP |
||||
/* Need to define POST */ |
||||
#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | \ |
||||
CFG_CMD_DATE | \
|
||||
CFG_CMD_DHCP | \
|
||||
CFG_CMD_DIAG | \
|
||||
CFG_CMD_ECHO | \
|
||||
CFG_CMD_EEPROM | \
|
||||
CFG_CMD_ELF | \
|
||||
/* CFG_CMD_EXT2 |*/ \
|
||||
/* CFG_CMD_FAT |*/ \
|
||||
CFG_CMD_I2C | \
|
||||
/* CFG_CMD_IDE |*/ \
|
||||
CFG_CMD_IRQ | \
|
||||
/* CFG_CMD_KGDB |*/ \
|
||||
CFG_CMD_MII | \
|
||||
CFG_CMD_PCI | \
|
||||
CFG_CMD_PING | \
|
||||
CFG_CMD_REGINFO | \
|
||||
CFG_CMD_SDRAM | \
|
||||
CFG_CMD_FLASH | \
|
||||
/* CFG_CMD_SPI |*/ \
|
||||
CFG_CMD_USB | \
|
||||
0 ) & ~CFG_CMD_IMLS) |
||||
#else |
||||
#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | \ |
||||
CFG_CMD_DATE | \
|
||||
CFG_CMD_DHCP | \
|
||||
CFG_CMD_DIAG | \
|
||||
CFG_CMD_ECHO | \
|
||||
CFG_CMD_EEPROM | \
|
||||
CFG_CMD_ELF | \
|
||||
/* CFG_CMD_EXT2 |*/ \
|
||||
/* CFG_CMD_FAT |*/ \
|
||||
CFG_CMD_I2C | \
|
||||
/* CFG_CMD_IDE |*/ \
|
||||
CFG_CMD_IRQ | \
|
||||
/* CFG_CMD_KGDB |*/ \
|
||||
CFG_CMD_MII | \
|
||||
CFG_CMD_PCI | \
|
||||
CFG_CMD_PING | \
|
||||
CFG_CMD_REGINFO | \
|
||||
CFG_CMD_SDRAM | \
|
||||
CFG_CMD_FLASH | \
|
||||
/* CFG_CMD_SPI |*/ \
|
||||
0 ) & ~CFG_CMD_IMLS) |
||||
#endif |
||||
|
||||
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ |
||||
#include <cmd_confdefs.h> |
||||
|
||||
/*
|
||||
* Miscellaneous configurable options |
||||
*/ |
||||
#define CFG_LONGHELP /* undef to save memory */ |
||||
#define CFG_PROMPT "=> " /* Monitor Command Prompt */ |
||||
#if (CONFIG_COMMANDS & CFG_CMD_KGDB) |
||||
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ |
||||
#else |
||||
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ |
||||
#endif |
||||
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ |
||||
#define CFG_MAXARGS 16 /* max number of command args */ |
||||
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ |
||||
|
||||
#define CFG_MEMTEST_START 0x0400000 /* memtest works on */ |
||||
#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ |
||||
|
||||
#define CFG_LOAD_ADDR 0x100000 /* default load address */ |
||||
#define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */ |
||||
#define CONFIG_LYNXKDI 1 /* support kdi files */ |
||||
|
||||
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* PCI stuff |
||||
*----------------------------------------------------------------------- |
||||
*/ |
||||
/* General PCI */ |
||||
#define CONFIG_PCI /* include pci support */ |
||||
#undef CONFIG_PCI_PNP /* do (not) pci plug-and-play */ |
||||
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ |
||||
#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE */ |
||||
|
||||
/* Board-specific PCI */ |
||||
#define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */ |
||||
#define CFG_PCI_TARGET_INIT |
||||
#define CFG_PCI_MASTER_INIT |
||||
|
||||
#define CFG_PCI_SUBSYS_VENDORID 0x1014 /* IBM */ |
||||
#define CFG_PCI_SUBSYS_ID 0xcafe /* Whatever */ |
||||
|
||||
/*
|
||||
* For booting Linux, the board info and command line data |
||||
* have to be in the first 8 MB of memory, since this is |
||||
* the maximum mapped by the Linux kernel during initialization. |
||||
*/ |
||||
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ |
||||
/*-----------------------------------------------------------------------
|
||||
* Cache Configuration |
||||
*/ |
||||
#define CFG_DCACHE_SIZE 8192 /* For IBM 405 CPUs */ |
||||
#define CFG_CACHELINE_SIZE 32 /* ... */ |
||||
#if (CONFIG_COMMANDS & CFG_CMD_KGDB) |
||||
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ |
||||
#endif |
||||
|
||||
/*
|
||||
* Internal Definitions |
||||
* |
||||
* Boot Flags |
||||
*/ |
||||
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ |
||||
#define BOOTFLAG_WARM 0x02 /* Software reboot */ |
||||
|
||||
#if (CONFIG_COMMANDS & CFG_CMD_KGDB) |
||||
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ |
||||
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ |
||||
#endif |
||||
#endif /* __CONFIG_H */ |
Loading…
Reference in new issue