ARM: dts: stm32mp1: Add usb gadget support for stm32mp157c-ev1 board

Add DT nodes to enable DWC2 gadget support

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
lime2-spi
Patrice Chotard 6 years ago committed by Tom Rini
parent 284b27cf81
commit 8e9c94d766
  1. 6
      arch/arm/dts/stm32mp157-pinctrl.dtsi
  2. 5
      arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi
  3. 8
      arch/arm/dts/stm32mp157c-ev1.dts
  4. 36
      arch/arm/dts/stm32mp157c.dtsi

@ -321,6 +321,12 @@
bias-disable; bias-disable;
}; };
}; };
usbotg_hs_pins_a: usbotg_hs-0 {
pins {
pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
};
};
}; };
pinctrl_z: pin-controller-z@54004000 { pinctrl_z: pin-controller-z@54004000 {

@ -25,6 +25,10 @@
regulator-always-on; regulator-always-on;
}; };
&usbotg_hs {
g-tx-fifo-size = <576>;
};
/* SPL part **************************************/ /* SPL part **************************************/
&qspi { &qspi {
u-boot,dm-spl; u-boot,dm-spl;
@ -60,3 +64,4 @@
&flash0 { &flash0 {
u-boot,dm-spl; u-boot,dm-spl;
}; };

@ -96,6 +96,14 @@
}; };
}; };
&usbotg_hs {
pinctrl-names = "default";
pinctrl-0 = <&usbotg_hs_pins_a>;
phys = <&usbphyc_port1 0>;
phy-names = "usb2-phy";
status = "okay";
};
&usbphyc { &usbphyc {
status = "okay"; status = "okay";
}; };

@ -106,6 +106,26 @@
}; };
}; };
pm_domain {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32mp157c-pd";
pd_core_ret: core-ret-power-domain@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
#power-domain-cells = <0>;
label = "CORE-RETENTION";
pd_core: core-power-domain@2 {
reg = <2>;
#power-domain-cells = <0>;
label = "CORE";
};
};
};
soc { soc {
compatible = "simple-bus"; compatible = "simple-bus";
#address-cells = <1>; #address-cells = <1>;
@ -654,6 +674,22 @@
status = "disabled"; status = "disabled";
}; };
usbotg_hs: usb-otg@49000000 {
compatible = "st,stm32mp1-hsotg", "snps,dwc2";
reg = <0x49000000 0x10000>;
clocks = <&rcc USBO_K>;
clock-names = "otg";
resets = <&rcc USBO_R>;
reset-names = "dwc2";
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
g-rx-fifo-size = <256>;
g-np-tx-fifo-size = <32>;
g-tx-fifo-size = <128 128 64 64 64 64 32 32>;
dr_mode = "otg";
power-domains = <&pd_core>;
status = "disabled";
};
rcc: rcc@50000000 { rcc: rcc@50000000 {
compatible = "st,stm32mp1-rcc", "syscon"; compatible = "st,stm32mp1-rcc", "syscon";
reg = <0x50000000 0x1000>; reg = <0x50000000 0x1000>;

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