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drivers: net: cpsw: add support to have phy address from cpsw platform data

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Some platforms like AM437x have different EVMs with different phy addresses,
so this patch adds support for passing phy address via cpsw plaform data.
Also renamed phy_id to phy_addr so better understanding of the code.

Reviewed-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
[trini: Update BuR am335x_igep0033 pcm051_rev3 pcm051_rev1 cm_t335
pengwyn boards]
Signed-off-by: Tom Rini <trini@ti.com>
master
Mugunthan V N 10 years ago committed by Tom Rini
parent eeb72e6761
commit 9c653aad16
24 changed files with 22 additions and 33 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
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  1. 4
      board/BuR/common/common.c
  2. 2
      board/compulab/cm_t335/cm_t335.c
  3. 2
      board/isee/igep0033/board.c
  4. 4
      board/phytec/pcm051/board.c
  5. 2
      board/siemens/dxr2/board.c
  6. 4
      board/siemens/pxm2/board.c
  7. 4
      board/siemens/rut/board.c
  8. 4
      board/silica/pengwyn/board.c
  9. 4
      board/ti/am335x/board.c
  10. 4
      board/ti/dra7xx/evm.c
  11. 4
      board/ti/ti814x/evm.c
  12. 4
      drivers/net/cpsw.c
  13. 1
      include/configs/am335x_evm.h
  14. 1
      include/configs/am335x_igep0033.h
  15. 1
      include/configs/bur_am335x_common.h
  16. 1
      include/configs/cm_t335.h
  17. 1
      include/configs/dra7xx_evm.h
  18. 1
      include/configs/dxr2.h
  19. 1
      include/configs/pcm051.h
  20. 1
      include/configs/pengwyn.h
  21. 1
      include/configs/pxm2.h
  22. 1
      include/configs/rut.h
  23. 1
      include/configs/ti814x_evm.h
  24. 2
      include/cpsw.h

4
board/BuR/common/common.c
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@ -141,12 +141,12 @@ static struct cpsw_slave_data cpsw_slaves[] = {
{
.slave_reg_ofs = 0x208,
.sliver_reg_ofs = 0xd80,
.phy_id = 0,
.phy_addr = 0,
},
{
.slave_reg_ofs = 0x308,
.sliver_reg_ofs = 0xdc0,
.phy_id = 1,
.phy_addr = 1,
},
};

2
board/compulab/cm_t335/cm_t335.c
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@ -47,7 +47,7 @@ static void cpsw_control(int enabled)
static struct cpsw_slave_data cpsw_slave = {
.slave_reg_ofs = 0x208,
.sliver_reg_ofs = 0xd80,
.phy_id = 0,
.phy_addr = 0,
.phy_if = PHY_INTERFACE_MODE_RGMII,
};

2
board/isee/igep0033/board.c
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@ -116,7 +116,7 @@ static struct cpsw_slave_data cpsw_slaves[] = {
{
.slave_reg_ofs = 0x208,
.sliver_reg_ofs = 0xd80,
.phy_id = 0,
.phy_addr = 0,
.phy_if = PHY_INTERFACE_MODE_RMII,
},
};

4
board/phytec/pcm051/board.c
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@ -176,13 +176,13 @@ static struct cpsw_slave_data cpsw_slaves[] = {
{
.slave_reg_ofs = 0x208,
.sliver_reg_ofs = 0xd80,
.phy_id = 0,
.phy_addr = 0,
.phy_if = PHY_INTERFACE_MODE_RGMII,
},
{
.slave_reg_ofs = 0x308,
.sliver_reg_ofs = 0xdc0,
.phy_id = 1,
.phy_addr = 1,
.phy_if = PHY_INTERFACE_MODE_RGMII,
},
};

2
board/siemens/dxr2/board.c
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@ -198,7 +198,7 @@ static struct cpsw_slave_data cpsw_slaves[] = {
{
.slave_reg_ofs = 0x208,
.sliver_reg_ofs = 0xd80,
.phy_id = 0,
.phy_addr = 0,
.phy_if = PHY_INTERFACE_MODE_MII,
},
};

4
board/siemens/pxm2/board.c
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@ -181,13 +181,13 @@ static struct cpsw_slave_data cpsw_slaves[] = {
{
.slave_reg_ofs = 0x208,
.sliver_reg_ofs = 0xd80,
.phy_id = 0,
.phy_addr = 0,
.phy_if = PHY_INTERFACE_MODE_RMII,
},
{
.slave_reg_ofs = 0x308,
.sliver_reg_ofs = 0xdc0,
.phy_id = 1,
.phy_addr = 1,
.phy_if = PHY_INTERFACE_MODE_RMII,
},
};

4
board/siemens/rut/board.c
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@ -143,13 +143,13 @@ static struct cpsw_slave_data cpsw_slaves[] = {
{
.slave_reg_ofs = 0x208,
.sliver_reg_ofs = 0xd80,
.phy_id = 1,
.phy_addr = 1,
.phy_if = PHY_INTERFACE_MODE_RMII,
},
{
.slave_reg_ofs = 0x308,
.sliver_reg_ofs = 0xdc0,
.phy_id = 0,
.phy_addr = 0,
.phy_if = PHY_INTERFACE_MODE_RMII,
},
};

4
board/silica/pengwyn/board.c
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@ -141,13 +141,13 @@ static struct cpsw_slave_data cpsw_slaves[] = {
{
.slave_reg_ofs = 0x208,
.sliver_reg_ofs = 0xd80,
.phy_id = 0,
.phy_addr = 0,
.phy_if = PHY_INTERFACE_MODE_MII,
},
{
.slave_reg_ofs = 0x308,
.sliver_reg_ofs = 0xdc0,
.phy_id = 1,
.phy_addr = 1,
.phy_if = PHY_INTERFACE_MODE_MII,
},
};

4
board/ti/am335x/board.c
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@ -544,12 +544,12 @@ static struct cpsw_slave_data cpsw_slaves[] = {
{
.slave_reg_ofs = 0x208,
.sliver_reg_ofs = 0xd80,
.phy_id = 0,
.phy_addr = 0,
},
{
.slave_reg_ofs = 0x308,
.sliver_reg_ofs = 0xdc0,
.phy_id = 1,
.phy_addr = 1,
},
};

4
board/ti/dra7xx/evm.c
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@ -149,12 +149,12 @@ static struct cpsw_slave_data cpsw_slaves[] = {
{
.slave_reg_ofs = 0x208,
.sliver_reg_ofs = 0xd80,
.phy_id = 0,
.phy_addr = 2,
},
{
.slave_reg_ofs = 0x308,
.sliver_reg_ofs = 0xdc0,
.phy_id = 1,
.phy_addr = 3,
},
};

4
board/ti/ti814x/evm.c
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@ -132,12 +132,12 @@ static struct cpsw_slave_data cpsw_slaves[] = {
{
.slave_reg_ofs = 0x50,
.sliver_reg_ofs = 0x700,
.phy_id = 1,
.phy_addr = 1,
},
{
.slave_reg_ofs = 0x90,
.sliver_reg_ofs = 0x740,
.phy_id = 0,
.phy_addr = 0,
},
};

4
drivers/net/cpsw.c
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@ -656,7 +656,7 @@ static void cpsw_slave_init(struct cpsw_slave *slave, struct cpsw_priv *priv)
cpsw_ale_add_mcast(priv, NetBcastAddr, 1 << slave_port);
priv->phy_mask |= 1 << slave->data->phy_id;
priv->phy_mask |= 1 << slave->data->phy_addr;
}
static struct cpdma_desc *cpdma_desc_alloc(struct cpsw_priv *priv)
@ -948,7 +948,7 @@ static int cpsw_phy_init(struct eth_device *dev, struct cpsw_slave *slave)
SUPPORTED_1000baseT_Full);
phydev = phy_connect(priv->bus,
CONFIG_PHY_ADDR,
slave->data->phy_addr,
dev,
slave->data->phy_if);

1
include/configs/am335x_evm.h
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@ -398,7 +398,6 @@
/* Network. */
#define CONFIG_PHY_GIGE
#define CONFIG_PHYLIB
#define CONFIG_PHY_ADDR 0
#define CONFIG_PHY_SMSC
/* NAND support */

1
include/configs/am335x_igep0033.h
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@ -181,7 +181,6 @@
#define CONFIG_NET_RETRY_COUNT 10
#define CONFIG_NET_MULTI
#define CONFIG_PHYLIB
#define CONFIG_PHY_ADDR 0
#define CONFIG_PHY_SMSC
/* NAND support */

1
include/configs/bur_am335x_common.h
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@ -51,7 +51,6 @@
#define CONFIG_MII /* Required in net/eth.c */
#define CONFIG_SPL_ETH_SUPPORT
#define CONFIG_PHYLIB
#define CONFIG_PHY_ADDR 1
#define CONFIG_PHY_NATSEMI
#define CONFIG_SPL_NET_SUPPORT
#define CONFIG_SPL_ENV_SUPPORT /* used for a fetching MAC-Address */

1
include/configs/cm_t335.h
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@ -114,7 +114,6 @@
/* Network. */
#define CONFIG_PHY_GIGE
#define CONFIG_PHYLIB
#define CONFIG_PHY_ADDR 0
#define CONFIG_PHY_ATHEROS
/* NAND support */

1
include/configs/dra7xx_evm.h
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@ -62,7 +62,6 @@
#define CONFIG_MII /* Required in net/eth.c */
#define CONFIG_PHY_GIGE /* per-board part of CPSW */
#define CONFIG_PHYLIB
#define CONFIG_PHY_ADDR 2
/* SPI */
#undef CONFIG_OMAP3_SPI

1
include/configs/dxr2.h
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@ -49,7 +49,6 @@
#undef CONFIG_MII
#undef CONFIG_PHY_GIGE
#define CONFIG_PHY_ADDR 0
#define CONFIG_PHY_SMSC
#define CONFIG_FACTORYSET

1
include/configs/pcm051.h
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@ -297,7 +297,6 @@
#define CONFIG_NET_MULTI
#define CONFIG_PHY_GIGE
#define CONFIG_PHYLIB
#define CONFIG_PHY_ADDR 0
#define CONFIG_PHY_SMSC
#endif /* ! __CONFIG_PCM051_H */

1
include/configs/pengwyn.h
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@ -196,7 +196,6 @@
/* Network */
#define CONFIG_CMD_MII
#define CONFIG_PHYLIB
#define CONFIG_PHY_ADDR 1
#define CONFIG_PHY_RESET 1
#define CONFIG_PHY_NATSEMI

1
include/configs/pxm2.h
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@ -44,7 +44,6 @@
#undef CONFIG_SPL_NET_VCI_STRING
#undef CONFIG_SPL_ETH_SUPPORT
#define CONFIG_PHY_ADDR 0
#define CONFIG_PHY_ATHEROS
#define CONFIG_FACTORYSET

1
include/configs/rut.h
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@ -41,7 +41,6 @@
#undef CONFIG_SPL_NET_VCI_STRING
#undef CONFIG_SPL_ETH_SUPPORT
#define CONFIG_PHY_ADDR 1
#define CONFIG_PHY_NATSEMI
#define CONFIG_FACTORYSET

1
include/configs/ti814x_evm.h
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@ -233,7 +233,6 @@
#define CONFIG_NET_MULTI
#define CONFIG_PHY_GIGE
#define CONFIG_PHYLIB
#define CONFIG_PHY_ADDR 1
#define CONFIG_PHY_ET1011C
#define CONFIG_PHY_ET1011C_TX_CLK_FIX

2
include/cpsw.h
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@ -19,7 +19,7 @@
struct cpsw_slave_data {
u32 slave_reg_ofs;
u32 sliver_reg_ofs;
int phy_id;
int phy_addr;
int phy_if;
};

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