ppc4xx: Change SysACE address on Katmai

With this new base address of the Xilinx SystemACE controller
the Linux driver will be easier to adapt, since it can now be
mapped via the "normal" ioremap() call.

Signed-off-by: Stefan Roese <sr@denx.de>
master
Stefan Roese 18 years ago
parent 0e7d4916af
commit a65c5768e5
  1. 2
      board/amcc/katmai/init.S
  2. 2
      include/configs/katmai.h

@ -103,7 +103,7 @@ tlbtabB:
tlbentry(CFG_PERIPHERAL_BASE, SZ_4K, 0xF0000000, 4, AC_R|AC_W|SA_G|SA_I) tlbentry(CFG_PERIPHERAL_BASE, SZ_4K, 0xF0000000, 4, AC_R|AC_W|SA_G|SA_I)
tlbentry(CFG_ACE_BASE, SZ_1K, 0xE0000000, 4,AC_R|AC_W|SA_G|SA_I) tlbentry(CFG_ACE_BASE, SZ_1K, CFG_ACE_BASE, 4,AC_R|AC_W|SA_G|SA_I)
tlbentry(CFG_PCI_BASE, SZ_256M, 0x00000000, 0xC, AC_R|AC_W|SA_G|SA_I) tlbentry(CFG_PCI_BASE, SZ_256M, 0x00000000, 0xC, AC_R|AC_W|SA_G|SA_I)
tlbentry(CFG_PCI_MEMBASE, SZ_256M, 0x10000000, 0xC, AC_R|AC_W|SA_G|SA_I) tlbentry(CFG_PCI_MEMBASE, SZ_256M, 0x10000000, 0xC, AC_R|AC_W|SA_G|SA_I)

@ -78,7 +78,7 @@
#define CONFIG_PCI_SYS_MEM_PHYS CFG_SDRAM_BASE #define CONFIG_PCI_SYS_MEM_PHYS CFG_SDRAM_BASE
#define CONFIG_PCI_SYS_MEM_SIZE (1024 * 1024 * 1024) #define CONFIG_PCI_SYS_MEM_SIZE (1024 * 1024 * 1024)
#define CFG_ACE_BASE 0xe0000000 /* Xilinx ACE controller - Compact Flash */ #define CFG_ACE_BASE 0xfe000000 /* Xilinx ACE controller - Compact Flash */
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* Initial RAM & stack pointer (placed in internal SRAM) * Initial RAM & stack pointer (placed in internal SRAM)

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