am33xx: refactor am33xx mux support and add ti814x support

AM33XX and TI814X have a similar mux though the pinmux register
layout and address space differ. Add a separate ti814x mux include
to support the TI814X-specific differences.

Signed-off-by: Matt Porter <mporter@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
master
Matt Porter 12 years ago committed by Tom Rini
parent b43c17cba6
commit b2e682f7a0
  1. 235
      arch/arm/include/asm/arch-am33xx/mux.h
  2. 247
      arch/arm/include/asm/arch-am33xx/mux_am33xx.h
  3. 311
      arch/arm/include/asm/arch-am33xx/mux_ti814x.h

@ -1,7 +1,7 @@
/*
* mux.h
*
* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
@ -19,234 +19,15 @@
#include <common.h>
#include <asm/io.h>
#define MUX_CFG(value, offset) \
__raw_writel(value, (CTRL_BASE + offset));
/* PAD Control Fields */
#define SLEWCTRL (0x1 << 6)
#define RXACTIVE (0x1 << 5)
#define PULLDOWN_EN (0x0 << 4) /* Pull Down Selection */
#define PULLUP_EN (0x1 << 4) /* Pull Up Selection */
#define PULLUDEN (0x0 << 3) /* Pull up enabled */
#define PULLUDDIS (0x1 << 3) /* Pull up disabled */
#define MODE(val) val /* used for Readability */
/*
* PAD CONTROL OFFSETS
* Field names corresponds to the pad signal name
*/
struct pad_signals {
int gpmc_ad0;
int gpmc_ad1;
int gpmc_ad2;
int gpmc_ad3;
int gpmc_ad4;
int gpmc_ad5;
int gpmc_ad6;
int gpmc_ad7;
int gpmc_ad8;
int gpmc_ad9;
int gpmc_ad10;
int gpmc_ad11;
int gpmc_ad12;
int gpmc_ad13;
int gpmc_ad14;
int gpmc_ad15;
int gpmc_a0;
int gpmc_a1;
int gpmc_a2;
int gpmc_a3;
int gpmc_a4;
int gpmc_a5;
int gpmc_a6;
int gpmc_a7;
int gpmc_a8;
int gpmc_a9;
int gpmc_a10;
int gpmc_a11;
int gpmc_wait0;
int gpmc_wpn;
int gpmc_be1n;
int gpmc_csn0;
int gpmc_csn1;
int gpmc_csn2;
int gpmc_csn3;
int gpmc_clk;
int gpmc_advn_ale;
int gpmc_oen_ren;
int gpmc_wen;
int gpmc_be0n_cle;
int lcd_data0;
int lcd_data1;
int lcd_data2;
int lcd_data3;
int lcd_data4;
int lcd_data5;
int lcd_data6;
int lcd_data7;
int lcd_data8;
int lcd_data9;
int lcd_data10;
int lcd_data11;
int lcd_data12;
int lcd_data13;
int lcd_data14;
int lcd_data15;
int lcd_vsync;
int lcd_hsync;
int lcd_pclk;
int lcd_ac_bias_en;
int mmc0_dat3;
int mmc0_dat2;
int mmc0_dat1;
int mmc0_dat0;
int mmc0_clk;
int mmc0_cmd;
int mii1_col;
int mii1_crs;
int mii1_rxerr;
int mii1_txen;
int mii1_rxdv;
int mii1_txd3;
int mii1_txd2;
int mii1_txd1;
int mii1_txd0;
int mii1_txclk;
int mii1_rxclk;
int mii1_rxd3;
int mii1_rxd2;
int mii1_rxd1;
int mii1_rxd0;
int rmii1_refclk;
int mdio_data;
int mdio_clk;
int spi0_sclk;
int spi0_d0;
int spi0_d1;
int spi0_cs0;
int spi0_cs1;
int ecap0_in_pwm0_out;
int uart0_ctsn;
int uart0_rtsn;
int uart0_rxd;
int uart0_txd;
int uart1_ctsn;
int uart1_rtsn;
int uart1_rxd;
int uart1_txd;
int i2c0_sda;
int i2c0_scl;
int mcasp0_aclkx;
int mcasp0_fsx;
int mcasp0_axr0;
int mcasp0_ahclkr;
int mcasp0_aclkr;
int mcasp0_fsr;
int mcasp0_axr1;
int mcasp0_ahclkx;
int xdma_event_intr0;
int xdma_event_intr1;
int nresetin_out;
int porz;
int nnmi;
int osc0_in;
int osc0_out;
int rsvd1;
int tms;
int tdi;
int tdo;
int tck;
int ntrst;
int emu0;
int emu1;
int osc1_in;
int osc1_out;
int pmic_power_en;
int rtc_porz;
int rsvd2;
int ext_wakeup;
int enz_kaldo_1p8v;
int usb0_dm;
int usb0_dp;
int usb0_ce;
int usb0_id;
int usb0_vbus;
int usb0_drvvbus;
int usb1_dm;
int usb1_dp;
int usb1_ce;
int usb1_id;
int usb1_vbus;
int usb1_drvvbus;
int ddr_resetn;
int ddr_csn0;
int ddr_cke;
int ddr_ck;
int ddr_nck;
int ddr_casn;
int ddr_rasn;
int ddr_wen;
int ddr_ba0;
int ddr_ba1;
int ddr_ba2;
int ddr_a0;
int ddr_a1;
int ddr_a2;
int ddr_a3;
int ddr_a4;
int ddr_a5;
int ddr_a6;
int ddr_a7;
int ddr_a8;
int ddr_a9;
int ddr_a10;
int ddr_a11;
int ddr_a12;
int ddr_a13;
int ddr_a14;
int ddr_a15;
int ddr_odt;
int ddr_d0;
int ddr_d1;
int ddr_d2;
int ddr_d3;
int ddr_d4;
int ddr_d5;
int ddr_d6;
int ddr_d7;
int ddr_d8;
int ddr_d9;
int ddr_d10;
int ddr_d11;
int ddr_d12;
int ddr_d13;
int ddr_d14;
int ddr_d15;
int ddr_dqm0;
int ddr_dqm1;
int ddr_dqs0;
int ddr_dqsn0;
int ddr_dqs1;
int ddr_dqsn1;
int ddr_vref;
int ddr_vtp;
int ddr_strben0;
int ddr_strben1;
int ain7;
int ain6;
int ain5;
int ain4;
int ain3;
int ain2;
int ain1;
int ain0;
int vrefp;
int vrefn;
};
#ifdef CONFIG_AM33XX
#include <asm/arch/mux_am33xx.h>
#elif defined(CONFIG_TI814X)
#include <asm/arch/mux_ti814x.h>
#endif
struct module_pin_mux {
short reg_offset;
unsigned char val;
unsigned int val;
};
/* Pad control register offset */
@ -259,4 +40,4 @@ struct module_pin_mux {
*/
void configure_module_pin_mux(struct module_pin_mux *mod_pin_mux);
#endif
#endif /* endif _MUX_H */

@ -0,0 +1,247 @@
/*
* mux_am33xx.h
*
* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef _MUX_AM33XX_H_
#define _MUX_AM33XX_H_
#include <common.h>
#include <asm/io.h>
#define MUX_CFG(value, offset) \
__raw_writel(value, (CTRL_BASE + offset));
/* PAD Control Fields */
#define SLEWCTRL (0x1 << 6)
#define RXACTIVE (0x1 << 5)
#define PULLDOWN_EN (0x0 << 4) /* Pull Down Selection */
#define PULLUP_EN (0x1 << 4) /* Pull Up Selection */
#define PULLUDEN (0x0 << 3) /* Pull up enabled */
#define PULLUDDIS (0x1 << 3) /* Pull up disabled */
#define MODE(val) val /* used for Readability */
/*
* PAD CONTROL OFFSETS
* Field names corresponds to the pad signal name
*/
struct pad_signals {
int gpmc_ad0;
int gpmc_ad1;
int gpmc_ad2;
int gpmc_ad3;
int gpmc_ad4;
int gpmc_ad5;
int gpmc_ad6;
int gpmc_ad7;
int gpmc_ad8;
int gpmc_ad9;
int gpmc_ad10;
int gpmc_ad11;
int gpmc_ad12;
int gpmc_ad13;
int gpmc_ad14;
int gpmc_ad15;
int gpmc_a0;
int gpmc_a1;
int gpmc_a2;
int gpmc_a3;
int gpmc_a4;
int gpmc_a5;
int gpmc_a6;
int gpmc_a7;
int gpmc_a8;
int gpmc_a9;
int gpmc_a10;
int gpmc_a11;
int gpmc_wait0;
int gpmc_wpn;
int gpmc_be1n;
int gpmc_csn0;
int gpmc_csn1;
int gpmc_csn2;
int gpmc_csn3;
int gpmc_clk;
int gpmc_advn_ale;
int gpmc_oen_ren;
int gpmc_wen;
int gpmc_be0n_cle;
int lcd_data0;
int lcd_data1;
int lcd_data2;
int lcd_data3;
int lcd_data4;
int lcd_data5;
int lcd_data6;
int lcd_data7;
int lcd_data8;
int lcd_data9;
int lcd_data10;
int lcd_data11;
int lcd_data12;
int lcd_data13;
int lcd_data14;
int lcd_data15;
int lcd_vsync;
int lcd_hsync;
int lcd_pclk;
int lcd_ac_bias_en;
int mmc0_dat3;
int mmc0_dat2;
int mmc0_dat1;
int mmc0_dat0;
int mmc0_clk;
int mmc0_cmd;
int mii1_col;
int mii1_crs;
int mii1_rxerr;
int mii1_txen;
int mii1_rxdv;
int mii1_txd3;
int mii1_txd2;
int mii1_txd1;
int mii1_txd0;
int mii1_txclk;
int mii1_rxclk;
int mii1_rxd3;
int mii1_rxd2;
int mii1_rxd1;
int mii1_rxd0;
int rmii1_refclk;
int mdio_data;
int mdio_clk;
int spi0_sclk;
int spi0_d0;
int spi0_d1;
int spi0_cs0;
int spi0_cs1;
int ecap0_in_pwm0_out;
int uart0_ctsn;
int uart0_rtsn;
int uart0_rxd;
int uart0_txd;
int uart1_ctsn;
int uart1_rtsn;
int uart1_rxd;
int uart1_txd;
int i2c0_sda;
int i2c0_scl;
int mcasp0_aclkx;
int mcasp0_fsx;
int mcasp0_axr0;
int mcasp0_ahclkr;
int mcasp0_aclkr;
int mcasp0_fsr;
int mcasp0_axr1;
int mcasp0_ahclkx;
int xdma_event_intr0;
int xdma_event_intr1;
int nresetin_out;
int porz;
int nnmi;
int osc0_in;
int osc0_out;
int rsvd1;
int tms;
int tdi;
int tdo;
int tck;
int ntrst;
int emu0;
int emu1;
int osc1_in;
int osc1_out;
int pmic_power_en;
int rtc_porz;
int rsvd2;
int ext_wakeup;
int enz_kaldo_1p8v;
int usb0_dm;
int usb0_dp;
int usb0_ce;
int usb0_id;
int usb0_vbus;
int usb0_drvvbus;
int usb1_dm;
int usb1_dp;
int usb1_ce;
int usb1_id;
int usb1_vbus;
int usb1_drvvbus;
int ddr_resetn;
int ddr_csn0;
int ddr_cke;
int ddr_ck;
int ddr_nck;
int ddr_casn;
int ddr_rasn;
int ddr_wen;
int ddr_ba0;
int ddr_ba1;
int ddr_ba2;
int ddr_a0;
int ddr_a1;
int ddr_a2;
int ddr_a3;
int ddr_a4;
int ddr_a5;
int ddr_a6;
int ddr_a7;
int ddr_a8;
int ddr_a9;
int ddr_a10;
int ddr_a11;
int ddr_a12;
int ddr_a13;
int ddr_a14;
int ddr_a15;
int ddr_odt;
int ddr_d0;
int ddr_d1;
int ddr_d2;
int ddr_d3;
int ddr_d4;
int ddr_d5;
int ddr_d6;
int ddr_d7;
int ddr_d8;
int ddr_d9;
int ddr_d10;
int ddr_d11;
int ddr_d12;
int ddr_d13;
int ddr_d14;
int ddr_d15;
int ddr_dqm0;
int ddr_dqm1;
int ddr_dqs0;
int ddr_dqsn0;
int ddr_dqs1;
int ddr_dqsn1;
int ddr_vref;
int ddr_vtp;
int ddr_strben0;
int ddr_strben1;
int ain7;
int ain6;
int ain5;
int ain4;
int ain3;
int ain2;
int ain1;
int ain0;
int vrefp;
int vrefn;
};
#endif /* endif _MUX_AM33XX_H_ */

@ -0,0 +1,311 @@
/*
* mux_ti814x.h
*
* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef _MUX_TI814X_H_
#define _MUX_TI814X_H_
/* PAD Control Fields */
#define PINCNTL_RSV_MSK (0x3 << 18) /* Reserved bitmask */
#define PULLUP_EN (0x1 << 17) /* Pull UP Selection */
#define PULLUDEN (0x0 << 16) /* Pull up enabled */
#define PULLUDDIS (0x1 << 16) /* Pull up disabled */
#define MODE(val) val /* used for Readability */
#define MUX_CFG(value, offset) \
{ \
int tmp; \
tmp = __raw_readl(CTRL_BASE + offset); \
tmp &= PINCNTL_RSV_MSK; \
__raw_writel(tmp | value, (CTRL_BASE + offset));\
}
/*
* PAD CONTROL OFFSETS
* Field names corresponds to the pad signal name
*/
struct pad_signals {
int pincntl1;
int pincntl2;
int pincntl3;
int pincntl4;
int pincntl5;
int pincntl6;
int pincntl7;
int pincntl8;
int pincntl9;
int pincntl10;
int pincntl11;
int pincntl12;
int pincntl13;
int pincntl14;
int pincntl15;
int pincntl16;
int pincntl17;
int pincntl18;
int pincntl19;
int pincntl20;
int pincntl21;
int pincntl22;
int pincntl23;
int pincntl24;
int pincntl25;
int pincntl26;
int pincntl27;
int pincntl28;
int pincntl29;
int pincntl30;
int pincntl31;
int pincntl32;
int pincntl33;
int pincntl34;
int pincntl35;
int pincntl36;
int pincntl37;
int pincntl38;
int pincntl39;
int pincntl40;
int pincntl41;
int pincntl42;
int pincntl43;
int pincntl44;
int pincntl45;
int pincntl46;
int pincntl47;
int pincntl48;
int pincntl49;
int pincntl50;
int pincntl51;
int pincntl52;
int pincntl53;
int pincntl54;
int pincntl55;
int pincntl56;
int pincntl57;
int pincntl58;
int pincntl59;
int pincntl60;
int pincntl61;
int pincntl62;
int pincntl63;
int pincntl64;
int pincntl65;
int pincntl66;
int pincntl67;
int pincntl68;
int pincntl69;
int pincntl70;
int pincntl71;
int pincntl72;
int pincntl73;
int pincntl74;
int pincntl75;
int pincntl76;
int pincntl77;
int pincntl78;
int pincntl79;
int pincntl80;
int pincntl81;
int pincntl82;
int pincntl83;
int pincntl84;
int pincntl85;
int pincntl86;
int pincntl87;
int pincntl88;
int pincntl89;
int pincntl90;
int pincntl91;
int pincntl92;
int pincntl93;
int pincntl94;
int pincntl95;
int pincntl96;
int pincntl97;
int pincntl98;
int pincntl99;
int pincntl100;
int pincntl101;
int pincntl102;
int pincntl103;
int pincntl104;
int pincntl105;
int pincntl106;
int pincntl107;
int pincntl108;
int pincntl109;
int pincntl110;
int pincntl111;
int pincntl112;
int pincntl113;
int pincntl114;
int pincntl115;
int pincntl116;
int pincntl117;
int pincntl118;
int pincntl119;
int pincntl120;
int pincntl121;
int pincntl122;
int pincntl123;
int pincntl124;
int pincntl125;
int pincntl126;
int pincntl127;
int pincntl128;
int pincntl129;
int pincntl130;
int pincntl131;
int pincntl132;
int pincntl133;
int pincntl134;
int pincntl135;
int pincntl136;
int pincntl137;
int pincntl138;
int pincntl139;
int pincntl140;
int pincntl141;
int pincntl142;
int pincntl143;
int pincntl144;
int pincntl145;
int pincntl146;
int pincntl147;
int pincntl148;
int pincntl149;
int pincntl150;
int pincntl151;
int pincntl152;
int pincntl153;
int pincntl154;
int pincntl155;
int pincntl156;
int pincntl157;
int pincntl158;
int pincntl159;
int pincntl160;
int pincntl161;
int pincntl162;
int pincntl163;
int pincntl164;
int pincntl165;
int pincntl166;
int pincntl167;
int pincntl168;
int pincntl169;
int pincntl170;
int pincntl171;
int pincntl172;
int pincntl173;
int pincntl174;
int pincntl175;
int pincntl176;
int pincntl177;
int pincntl178;
int pincntl179;
int pincntl180;
int pincntl181;
int pincntl182;
int pincntl183;
int pincntl184;
int pincntl185;
int pincntl186;
int pincntl187;
int pincntl188;
int pincntl189;
int pincntl190;
int pincntl191;
int pincntl192;
int pincntl193;
int pincntl194;
int pincntl195;
int pincntl196;
int pincntl197;
int pincntl198;
int pincntl199;
int pincntl200;
int pincntl201;
int pincntl202;
int pincntl203;
int pincntl204;
int pincntl205;
int pincntl206;
int pincntl207;
int pincntl208;
int pincntl209;
int pincntl210;
int pincntl211;
int pincntl212;
int pincntl213;
int pincntl214;
int pincntl215;
int pincntl216;
int pincntl217;
int pincntl218;
int pincntl219;
int pincntl220;
int pincntl221;
int pincntl222;
int pincntl223;
int pincntl224;
int pincntl225;
int pincntl226;
int pincntl227;
int pincntl228;
int pincntl229;
int pincntl230;
int pincntl231;
int pincntl232;
int pincntl233;
int pincntl234;
int pincntl235;
int pincntl236;
int pincntl237;
int pincntl238;
int pincntl239;
int pincntl240;
int pincntl241;
int pincntl242;
int pincntl243;
int pincntl244;
int pincntl245;
int pincntl246;
int pincntl247;
int pincntl248;
int pincntl249;
int pincntl250;
int pincntl251;
int pincntl252;
int pincntl253;
int pincntl254;
int pincntl255;
int pincntl256;
int pincntl257;
int pincntl258;
int pincntl259;
int pincntl260;
int pincntl261;
int pincntl262;
int pincntl263;
int pincntl264;
int pincntl265;
int pincntl266;
int pincntl267;
int pincntl268;
int pincntl269;
int pincntl270;
};
#endif /* endif _MUX_TI814X_H_ */
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