Add support for Bluewater Systems AT91 based Snapper 9260 and 9G20 single board computer modules. Includes NAND flash and Ethernet support. Signed-off-by: Ryan Mallon <ryan@bluewatersys.com>master
Ryan Mallon
14 years ago
committed by
Albert ARIBAUD
parent
8073399444
commit
b8d41dda22
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#
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# (C) Copyright 2003-2008
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# (C) Copyright 2011 Bluewater Systems
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# Ryan Mallon <ryan@bluewatersys.com>
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk |
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LIB = $(obj)lib$(BOARD).o
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COBJS-y += snapper9260.o
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SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS-y))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS) $(SOBJS) |
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$(call cmd_link_o_target, $(OBJS) $(SOBJS))
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clean: |
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rm -f $(SOBJS) $(OBJS)
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distclean: clean |
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rm -f $(LIB) core *.bak $(obj).depend
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk |
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sinclude $(obj).depend |
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#########################################################################
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@ -0,0 +1,169 @@ |
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/*
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* Bluewater Systems Snapper 9260/9G20 modules |
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* |
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* (C) Copyright 2011 Bluewater Systems |
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* Author: Andre Renaud <andre@bluewatersys.com> |
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* Author: Ryan Mallon <ryan@bluewatersys.com> |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <asm/io.h> |
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#include <asm/arch/at91sam9260_matrix.h> |
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#include <asm/arch/at91sam9_smc.h> |
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#include <asm/arch/at91_common.h> |
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#include <asm/arch/at91_pmc.h> |
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#include <asm/arch/at91_rstc.h> |
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#include <asm/arch/gpio.h> |
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#include <net.h> |
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#include <netdev.h> |
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#include <i2c.h> |
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#include <pca953x.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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/* IO Expander pins */ |
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#define IO_EXP_ETH_RESET (0 << 1) |
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#define IO_EXP_ETH_POWER (1 << 1) |
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static void macb_hw_init(void) |
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{ |
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struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; |
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struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA; |
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struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC; |
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unsigned long erstl; |
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/* Enable clock */ |
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writel(1 << ATMEL_ID_EMAC0, &pmc->pcer); |
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/* Disable pull-ups to prevent PHY going into test mode */ |
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writel(pin_to_mask(AT91_PIN_PA14) | |
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pin_to_mask(AT91_PIN_PA15) | |
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pin_to_mask(AT91_PIN_PA18), |
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&pioa->pudr); |
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/* Power down ethernet */ |
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pca953x_set_dir(0x28, IO_EXP_ETH_POWER, PCA953X_DIR_OUT); |
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pca953x_set_val(0x28, IO_EXP_ETH_POWER, 1); |
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/* Hold ethernet in reset */ |
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pca953x_set_dir(0x28, IO_EXP_ETH_RESET, PCA953X_DIR_OUT); |
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pca953x_set_val(0x28, IO_EXP_ETH_RESET, 0); |
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/* Enable ethernet power */ |
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pca953x_set_val(0x28, IO_EXP_ETH_POWER, 0); |
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/* Need to reset PHY -> 500ms reset */ |
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erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK; |
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writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) | |
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AT91_RSTC_MR_URSTEN, &rstc->mr); |
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writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr); |
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/* Wait for end hardware reset */ |
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while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL)) |
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; |
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/* Restore NRST value */ |
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writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, &rstc->mr); |
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/* Bring the ethernet out of reset */ |
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pca953x_set_val(0x28, IO_EXP_ETH_RESET, 1); |
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/* The phy internal reset take 21ms */ |
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udelay(21 * 1000); |
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/* Re-enable pull-up */ |
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writel(pin_to_mask(AT91_PIN_PA14) | |
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pin_to_mask(AT91_PIN_PA15) | |
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pin_to_mask(AT91_PIN_PA18), |
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&pioa->puer); |
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at91_macb_hw_init(); |
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} |
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static void nand_hw_init(void) |
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{ |
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struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; |
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struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; |
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unsigned long csa; |
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/* Enable CS3 as NAND/SmartMedia */ |
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csa = readl(&matrix->ebicsa); |
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csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA; |
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writel(csa, &matrix->ebicsa); |
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/* Configure SMC CS3 for NAND/SmartMedia */ |
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writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) | |
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AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0), |
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&smc->cs[3].setup); |
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writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(4) | |
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AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(4), |
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&smc->cs[3].pulse); |
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writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7), |
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&smc->cs[3].cycle); |
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writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | |
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AT91_SMC_MODE_EXNW_DISABLE | |
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AT91_SMC_MODE_DBW_8 | |
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AT91_SMC_MODE_TDF_CYCLE(3), |
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&smc->cs[3].mode); |
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/* Configure RDY/BSY */ |
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at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); |
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/* Enable NandFlash */ |
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at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); |
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} |
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int board_init(void) |
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{ |
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struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; |
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/* Enable PIO clocks */ |
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writel((1 << ATMEL_ID_PIOA) | |
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(1 << ATMEL_ID_PIOB) | |
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(1 << ATMEL_ID_PIOC), &pmc->pcer); |
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/* The mach-type is the same for both Snapper 9260 and 9G20 */ |
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gd->bd->bi_arch_number = MACH_TYPE_SNAPPER_9260; |
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/* Address of boot parameters */ |
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; |
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/* Initialise peripherals */ |
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at91_seriald_hw_init(); |
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i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); |
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nand_hw_init(); |
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macb_hw_init(); |
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return 0; |
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} |
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int board_eth_init(bd_t *bis) |
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{ |
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return macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x1f); |
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} |
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int dram_init(void) |
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{ |
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gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, |
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CONFIG_SYS_SDRAM_SIZE); |
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return 0; |
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} |
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void reset_phy(void) |
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{ |
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} |
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@ -0,0 +1,191 @@ |
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/*
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* Bluewater Systems Snapper 9260 and 9G20 modules |
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* |
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* (C) Copyright 2011 Bluewater Systems |
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* Author: Andre Renaud <andre@bluewatersys.com> |
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* Author: Ryan Mallon <ryan@bluewatersys.com> |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#ifndef __CONFIG_H |
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#define __CONFIG_H |
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/* SoC type is defined in boards.cfg */ |
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#include <asm/hardware.h> |
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#include <asm/sizes.h> |
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#define CONFIG_SYS_TEXT_BASE 0x20000000 |
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/* ARM asynchronous clock */ |
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#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* External Crystal, in Hz */ |
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#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 |
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#define CONFIG_SYS_HZ 1000 |
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/* CPU */ |
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#define CONFIG_ARCH_CPU_INIT |
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#undef CONFIG_USE_IRQ |
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
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#define CONFIG_SETUP_MEMORY_TAGS |
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#define CONFIG_INITRD_TAG |
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#define CONFIG_SKIP_LOWLEVEL_INIT |
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#define CONFIG_SKIP_RELOCATE_UBOOT |
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#define CONFIG_DISPLAY_CPUINFO |
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#define CONFIG_FIT |
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/* SDRAM */ |
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#define CONFIG_NR_DRAM_BANKS 1 |
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#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 |
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#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) /* 64MB */ |
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#define CONFIG_SYS_INIT_SP_ADDR (ATMEL_BASE_SRAM1 + 0x1000 - \ |
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GENERATED_GBL_DATA_SIZE) |
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/* Mem test settings */ |
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#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + (1024 * 1024)) |
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/* NAND Flash */ |
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#define CONFIG_NAND_ATMEL |
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#define CONFIG_SYS_NO_FLASH |
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#define CONFIG_SYS_MAX_NAND_DEVICE 1 |
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#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 |
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#define CONFIG_SYS_NAND_DBW_8 |
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#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* AD21 */ |
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#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) /* AD22 */ |
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#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 |
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#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 |
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/* Ethernet */ |
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#define CONFIG_MACB |
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#define CONFIG_RMII |
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#define CONFIG_NET_MULTI |
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#define CONFIG_NET_RETRY_COUNT 20 |
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#define CONFIG_RESET_PHY_R |
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#define CONFIG_TFTP_PORT |
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#define CONFIG_TFTP_TSIZE |
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/* USB */ |
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#define CONFIG_USB_ATMEL |
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#define CONFIG_USB_OHCI_NEW |
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#define CONFIG_DOS_PARTITION |
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#define CONFIG_SYS_USB_OHCI_CPU_INIT |
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#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE |
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#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" |
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 |
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#define CONFIG_USB_STORAGE |
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/* GPIOs and IO expander */ |
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#define CONFIG_AT91_LEGACY |
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#define CONFIG_ATMEL_LEGACY |
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#define CONFIG_AT91_GPIO |
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#define CONFIG_AT91_GPIO_PULLUP 1 |
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#define CONFIG_PCA953X |
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#define CONFIG_SYS_I2C_PCA953X_ADDR 0x28 |
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#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x28, 16} } |
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/* UARTs/Serial console */ |
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#define CONFIG_ATMEL_USART |
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#define CONFIG_USART_BASE ATMEL_BASE_DBGU |
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#define CONFIG_USART_ID ATMEL_ID_SYS |
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#define CONFIG_BAUDRATE 115200 |
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#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } |
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#define CONFIG_SYS_PROMPT "Snapper> " |
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/* I2C - Bit-bashed */ |
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#define CONFIG_SOFT_I2C |
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#define CONFIG_SYS_I2C_SPEED 100000 |
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#define CONFIG_SYS_I2C_SLAVE 0x7F |
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#define CONFIG_SOFT_I2C_READ_REPEATED_START |
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#define CONFIG_I2C_MULTI_BUS |
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#define I2C_INIT do { \ |
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at91_set_gpio_output(AT91_PIN_PA23, 1); \
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at91_set_gpio_output(AT91_PIN_PA24, 1); \
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at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 1); \
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at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 1); \
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} while (0) |
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#define I2C_SOFT_DECLARATIONS |
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#define I2C_ACTIVE |
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#define I2C_TRISTATE at91_set_gpio_input(AT91_PIN_PA23, 1); |
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#define I2C_READ at91_get_gpio_value(AT91_PIN_PA23); |
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#define I2C_SDA(bit) do { \ |
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if (bit) { \
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at91_set_gpio_input(AT91_PIN_PA23, 1); \
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} else { \
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at91_set_gpio_output(AT91_PIN_PA23, 1); \
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at91_set_gpio_value(AT91_PIN_PA23, bit); \
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} \
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} while (0) |
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#define I2C_SCL(bit) at91_set_pio_value(AT91_PIO_PORTA, 24, bit) |
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#define I2C_DELAY udelay(2) |
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/* Boot options */ |
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#define CONFIG_SYS_LOAD_ADDR 0x23000000 |
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#define CONFIG_BOOTDELAY 3 |
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#define CONFIG_ZERO_BOOTDELAY_CHECK |
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#define CONFIG_BOOTP_BOOTFILESIZE |
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#define CONFIG_BOOTP_BOOTPATH |
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#define CONFIG_BOOTP_GATEWAY |
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#define CONFIG_BOOTP_HOSTNAME |
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/* Environment settings */ |
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#define CONFIG_ENV_IS_IN_NAND |
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#define CONFIG_ENV_OFFSET (512 << 10) |
||||||
|
#define CONFIG_ENV_SIZE (256 << 10) |
||||||
|
#define CONFIG_ENV_OVERWRITE |
||||||
|
#define CONFIG_BOOTARGS "console=ttyS0,115200 ip=any" |
||||||
|
|
||||||
|
/* Console settings */ |
||||||
|
#define CONFIG_SYS_CBSIZE 256 |
||||||
|
#define CONFIG_SYS_MAXARGS 16 |
||||||
|
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
||||||
|
sizeof(CONFIG_SYS_PROMPT) + 16) |
||||||
|
#define CONFIG_SYS_LONGHELP |
||||||
|
#define CONFIG_SYS_EXTBDINFO |
||||||
|
#define CONFIG_CMDLINE_EDITING |
||||||
|
#define CONFIG_AUTO_COMPLETE |
||||||
|
#define CONFIG_SYS_HUSH_PARSER |
||||||
|
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " |
||||||
|
|
||||||
|
/* U-Boot memory settings */ |
||||||
|
#define CONFIG_SYS_MALLOC_LEN (1 << 20) |
||||||
|
#define CONFIG_STACKSIZE (256 << 10) |
||||||
|
|
||||||
|
/* Command line configuration */ |
||||||
|
#include <config_cmd_default.h> |
||||||
|
#undef CONFIG_CMD_BDI |
||||||
|
#undef CONFIG_CMD_FPGA |
||||||
|
#undef CONFIG_CMD_IMI |
||||||
|
#undef CONFIG_CMD_IMLS |
||||||
|
#undef CONFIG_CMD_LOADS |
||||||
|
#undef CONFIG_CMD_SOURCE |
||||||
|
|
||||||
|
#define CONFIG_CMD_PING |
||||||
|
#define CONFIG_CMD_DHCP |
||||||
|
#define CONFIG_CMD_FAT |
||||||
|
#define CONFIG_CMD_I2C |
||||||
|
#undef CONFIG_CMD_GPIO |
||||||
|
#define CONFIG_CMD_USB |
||||||
|
#define CONFIG_CMD_MII |
||||||
|
#define CONFIG_CMD_NAND |
||||||
|
#define CONFIG_CMD_PCA953X |
||||||
|
#define CONFIG_CMD_PCA953X_INFO |
||||||
|
|
||||||
|
#endif /* __CONFIG_H */ |
||||||
Loading…
Reference in new issue