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powerpc/8xxx: Refactor fsl_ddr_get_spd into common code from board

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Move fsl_ddr_get_spd into common mpc8xxx/ddr/main.c as most boards
pretty much do the same thing.  The only variations are in how many
controllers or DIMMs per controller exist.  To make this work we
standardize on the names of the SPD_EEPROM_ADDRESS defines based on the
use case of the board.

We allow boards to override get_spd to either do board specific fixups
to the SPD data or deal with any unique behavior of how the SPD eeproms
are wired up.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
master
Kumar Gala 14 years ago
parent 5df4b0ad0d
commit c39f44dc6f
31 changed files with 69 additions and 551 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
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  1. 63
      arch/powerpc/cpu/mpc8xxx/ddr/main.c
  2. 27
      board/freescale/corenet_ds/ddr.c
  3. 21
      board/freescale/mpc8536ds/ddr.c
  4. 22
      board/freescale/mpc8540ads/ddr.c
  5. 21
      board/freescale/mpc8541cds/ddr.c
  6. 22
      board/freescale/mpc8544ds/ddr.c
  7. 22
      board/freescale/mpc8548cds/ddr.c
  8. 21
      board/freescale/mpc8555cds/ddr.c
  9. 22
      board/freescale/mpc8560ads/ddr.c
  10. 22
      board/freescale/mpc8568mds/ddr.c
  11. 22
      board/freescale/mpc8569mds/ddr.c
  12. 23
      board/freescale/mpc8572ds/ddr.c
  13. 21
      board/freescale/mpc8610hpcd/ddr.c
  14. 30
      board/freescale/mpc8641hpcn/ddr.c
  15. 18
      board/freescale/p1022ds/ddr.c
  16. 19
      board/freescale/p2020ds/ddr.c
  17. 22
      board/sbc8548/ddr.c
  18. 22
      board/sbc8560/ddr.c
  19. 30
      board/sbc8641d/ddr.c
  20. 22
      board/socrates/ddr.c
  21. 22
      board/stx/stxgp3/ddr.c
  22. 21
      board/stx/stxssa/ddr.c
  23. 25
      board/xes/xpedite517x/ddr.c
  24. 17
      board/xes/xpedite520x/ddr.c
  25. 17
      board/xes/xpedite537x/ddr.c
  26. 15
      board/xes/xpedite550x/ddr.c
  27. 3
      include/configs/MPC8569MDS.h
  28. 2
      include/configs/MPC8610HPCD.h
  29. 2
      include/configs/P1022DS.h
  30. 2
      include/configs/P2020DS.h
  31. 2
      include/configs/xpedite550x.h

63
arch/powerpc/cpu/mpc8xxx/ddr/main.c
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@ -13,6 +13,7 @@
*/ */
#include <common.h> #include <common.h>
#include <i2c.h>
#include <asm/fsl_ddr_sdram.h> #include <asm/fsl_ddr_sdram.h>
#include "ddr.h" #include "ddr.h"
@ -26,9 +27,65 @@ extern void fsl_ddr_set_lawbar(
extern void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, extern void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
unsigned int ctrl_num); unsigned int ctrl_num);
/* Board-specific functions defined in each board's ddr.c */ #if defined(SPD_EEPROM_ADDRESS) || \
extern void fsl_ddr_get_spd(generic_spd_eeprom_t *ctrl_dimms_spd, defined(SPD_EEPROM_ADDRESS1) || defined(SPD_EEPROM_ADDRESS2) || \
unsigned int ctrl_num); defined(SPD_EEPROM_ADDRESS3) || defined(SPD_EEPROM_ADDRESS4)
#if (CONFIG_NUM_DDR_CONTROLLERS == 1) && (CONFIG_DIMM_SLOTS_PER_CTLR == 1)
u8 spd_i2c_addr[CONFIG_NUM_DDR_CONTROLLERS][CONFIG_DIMM_SLOTS_PER_CTLR] = {
[0][0] = SPD_EEPROM_ADDRESS,
};
#endif
#if (CONFIG_NUM_DDR_CONTROLLERS == 2) && (CONFIG_DIMM_SLOTS_PER_CTLR == 1)
u8 spd_i2c_addr[CONFIG_NUM_DDR_CONTROLLERS][CONFIG_DIMM_SLOTS_PER_CTLR] = {
[0][0] = SPD_EEPROM_ADDRESS1, /* controller 1 */
[1][0] = SPD_EEPROM_ADDRESS2, /* controller 2 */
};
#endif
#if (CONFIG_NUM_DDR_CONTROLLERS == 2) && (CONFIG_DIMM_SLOTS_PER_CTLR == 2)
u8 spd_i2c_addr[CONFIG_NUM_DDR_CONTROLLERS][CONFIG_DIMM_SLOTS_PER_CTLR] = {
[0][0] = SPD_EEPROM_ADDRESS1, /* controller 1 */
[0][1] = SPD_EEPROM_ADDRESS2, /* controller 1 */
[1][0] = SPD_EEPROM_ADDRESS3, /* controller 2 */
[1][1] = SPD_EEPROM_ADDRESS4, /* controller 2 */
};
#endif
static void __get_spd(generic_spd_eeprom_t *spd, u8 i2c_address)
{
int ret = i2c_read(i2c_address, 0, 1, (uchar *)spd,
sizeof(generic_spd_eeprom_t));
if (ret) {
printf("DDR: failed to read SPD from address %u\n", i2c_address);
memset(spd, 0, sizeof(generic_spd_eeprom_t));
}
}
__attribute__((weak, alias("__get_spd")))
void get_spd(generic_spd_eeprom_t *spd, u8 i2c_address);
void fsl_ddr_get_spd(generic_spd_eeprom_t *ctrl_dimms_spd,
unsigned int ctrl_num)
{
unsigned int i;
unsigned int i2c_address = 0;
if (ctrl_num >= CONFIG_NUM_DDR_CONTROLLERS) {
printf("%s unexpected ctrl_num = %u\n", __FUNCTION__, ctrl_num);
return;
}
for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
i2c_address = spd_i2c_addr[ctrl_num][i];
get_spd(&(ctrl_dimms_spd[i]), i2c_address);
}
}
#else
void fsl_ddr_get_spd(generic_spd_eeprom_t *ctrl_dimms_spd,
unsigned int ctrl_num)
{
}
#endif /* SPD_EEPROM_ADDRESSx */
/* /*
* ASSUMPTIONS: * ASSUMPTIONS:

27
board/freescale/corenet_ds/ddr.c
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@ -107,33 +107,6 @@ phys_size_t fixed_sdram(void)
return ddr_size; return ddr_size;
} }
static void get_spd(ddr3_spd_eeprom_t *spd, unsigned char i2c_address)
{
int ret;
ret = i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr3_spd_eeprom_t));
if (ret) {
debug("DDR: failed to read SPD from address %u\n", i2c_address);
memset(spd, 0, sizeof(ddr3_spd_eeprom_t));
}
}
void fsl_ddr_get_spd(ddr3_spd_eeprom_t *ctrl_dimms_spd,
unsigned int ctrl_num)
{
unsigned int i;
unsigned int i2c_address = 0;
for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
if (ctrl_num == 0 && i == 0)
i2c_address = SPD_EEPROM_ADDRESS1;
else if (ctrl_num == 1 && i == 0)
i2c_address = SPD_EEPROM_ADDRESS2;
get_spd(&(ctrl_dimms_spd[i]), i2c_address);
}
}
typedef struct { typedef struct {
u32 datarate_mhz_low; u32 datarate_mhz_low;
u32 datarate_mhz_high; u32 datarate_mhz_high;

21
board/freescale/mpc8536ds/ddr.c
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@ -7,31 +7,10 @@
*/ */
#include <common.h> #include <common.h>
#include <i2c.h>
#include <asm/fsl_ddr_sdram.h> #include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h> #include <asm/fsl_ddr_dimm_params.h>
static void get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
{
i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
}
void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
unsigned int ctrl_num)
{
unsigned int i;
if (ctrl_num) {
printf("%s unexpected ctrl_num = %u\n", __FUNCTION__, ctrl_num);
return;
}
for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
get_spd(&(ctrl_dimms_spd[i]), SPD_EEPROM_ADDRESS);
}
}
void fsl_ddr_board_options(memctl_options_t *popts, void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm, dimm_params_t *pdimm,
unsigned int ctrl_num) unsigned int ctrl_num)

22
board/freescale/mpc8540ads/ddr.c
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@ -7,32 +7,10 @@
*/ */
#include <common.h> #include <common.h>
#include <i2c.h>
#include <asm/fsl_ddr_sdram.h> #include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h> #include <asm/fsl_ddr_dimm_params.h>
static void
get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
{
i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t));
}
void
fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
unsigned int ctrl_num)
{
unsigned int i;
unsigned int i2c_address = 0;
for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
if (ctrl_num == 0 && i == 0) {
i2c_address = SPD_EEPROM_ADDRESS;
}
get_spd(&(ctrl_dimms_spd[i]), i2c_address);
}
}
void fsl_ddr_board_options(memctl_options_t *popts, void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm, dimm_params_t *pdimm,
unsigned int ctrl_num) unsigned int ctrl_num)

21
board/freescale/mpc8541cds/ddr.c
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@ -7,31 +7,10 @@
*/ */
#include <common.h> #include <common.h>
#include <i2c.h>
#include <asm/fsl_ddr_sdram.h> #include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h> #include <asm/fsl_ddr_dimm_params.h>
static void
get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
{
i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t));
}
void fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
unsigned int ctrl_num)
{
unsigned int i;
unsigned int i2c_address = 0;
for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
if (ctrl_num == 0 && i == 0) {
i2c_address = SPD_EEPROM_ADDRESS;
}
get_spd(&(ctrl_dimms_spd[i]), i2c_address);
}
}
void fsl_ddr_board_options(memctl_options_t *popts, void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm, dimm_params_t *pdimm,
unsigned int ctrl_num) unsigned int ctrl_num)

22
board/freescale/mpc8544ds/ddr.c
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@ -7,32 +7,10 @@
*/ */
#include <common.h> #include <common.h>
#include <i2c.h>
#include <asm/fsl_ddr_sdram.h> #include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h> #include <asm/fsl_ddr_dimm_params.h>
static void
get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
{
i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
}
void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
unsigned int ctrl_num)
{
unsigned int i;
if (ctrl_num) {
printf("%s unexpected ctrl_num = %u\n", __FUNCTION__, ctrl_num);
return;
}
for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
get_spd(&(ctrl_dimms_spd[i]), SPD_EEPROM_ADDRESS);
}
}
void fsl_ddr_board_options(memctl_options_t *popts, void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm, dimm_params_t *pdimm,
unsigned int ctrl_num) unsigned int ctrl_num)

22
board/freescale/mpc8548cds/ddr.c
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@ -7,32 +7,10 @@
*/ */
#include <common.h> #include <common.h>
#include <i2c.h>
#include <asm/fsl_ddr_sdram.h> #include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h> #include <asm/fsl_ddr_dimm_params.h>
static void
get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
{
i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
}
void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
unsigned int ctrl_num)
{
unsigned int i;
if (ctrl_num) {
printf("%s unexpected ctrl_num = %u\n", __FUNCTION__, ctrl_num);
return;
}
for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
get_spd(&(ctrl_dimms_spd[i]), SPD_EEPROM_ADDRESS);
}
}
void fsl_ddr_board_options(memctl_options_t *popts, void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm, dimm_params_t *pdimm,
unsigned int ctrl_num) unsigned int ctrl_num)

21
board/freescale/mpc8555cds/ddr.c
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@ -7,31 +7,10 @@
*/ */
#include <common.h> #include <common.h>
#include <i2c.h>
#include <asm/fsl_ddr_sdram.h> #include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h> #include <asm/fsl_ddr_dimm_params.h>
static void
get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
{
i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t));
}
void fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
unsigned int ctrl_num)
{
unsigned int i;
unsigned int i2c_address = 0;
for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
if (ctrl_num == 0 && i == 0) {
i2c_address = SPD_EEPROM_ADDRESS;
}
get_spd(&(ctrl_dimms_spd[i]), i2c_address);
}
}
void fsl_ddr_board_options(memctl_options_t *popts, void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm, dimm_params_t *pdimm,
unsigned int ctrl_num) unsigned int ctrl_num)

22
board/freescale/mpc8560ads/ddr.c
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@ -7,32 +7,10 @@
*/ */
#include <common.h> #include <common.h>
#include <i2c.h>
#include <asm/fsl_ddr_sdram.h> #include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h> #include <asm/fsl_ddr_dimm_params.h>
static void
get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
{
i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t));
}
void
fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
unsigned int ctrl_num)
{
unsigned int i;
unsigned int i2c_address = 0;
for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
if (ctrl_num == 0 && i == 0) {
i2c_address = SPD_EEPROM_ADDRESS;
}
get_spd(&(ctrl_dimms_spd[i]), i2c_address);
}
}
void fsl_ddr_board_options(memctl_options_t *popts, void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm, dimm_params_t *pdimm,
unsigned int ctrl_num) unsigned int ctrl_num)

22
board/freescale/mpc8568mds/ddr.c
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@ -7,32 +7,10 @@
*/ */
#include <common.h> #include <common.h>
#include <i2c.h>
#include <asm/fsl_ddr_sdram.h> #include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h> #include <asm/fsl_ddr_dimm_params.h>
static void
get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
{
i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
}
void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
unsigned int ctrl_num)
{
unsigned int i;
if (ctrl_num) {
printf("%s unexpected ctrl_num = %u\n", __FUNCTION__, ctrl_num);
return;
}
for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
get_spd(&(ctrl_dimms_spd[i]), SPD_EEPROM_ADDRESS);
}
}
void fsl_ddr_board_options(memctl_options_t *popts, void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm, dimm_params_t *pdimm,
unsigned int ctrl_num) unsigned int ctrl_num)

22
board/freescale/mpc8569mds/ddr.c
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@ -7,32 +7,10 @@
*/ */
#include <common.h> #include <common.h>
#include <i2c.h>
#include <asm/fsl_ddr_sdram.h> #include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h> #include <asm/fsl_ddr_dimm_params.h>
static void
get_spd(ddr3_spd_eeprom_t *spd, unsigned char i2c_address)
{
i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr3_spd_eeprom_t));
}
void fsl_ddr_get_spd(ddr3_spd_eeprom_t *ctrl_dimms_spd,
unsigned int ctrl_num)
{
unsigned int i;
unsigned int i2c_address = 0;
for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
if (ctrl_num == 0 && i == 0)
i2c_address = SPD_EEPROM_ADDRESS1;
if (ctrl_num == 0 && i == 1)
i2c_address = SPD_EEPROM_ADDRESS2;
get_spd(&(ctrl_dimms_spd[i]), i2c_address);
}
}
void fsl_ddr_board_options(memctl_options_t *popts, void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm, dimm_params_t *pdimm,
unsigned int ctrl_num) unsigned int ctrl_num)

23
board/freescale/mpc8572ds/ddr.c
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@ -7,33 +7,10 @@
*/ */
#include <common.h> #include <common.h>
#include <i2c.h>
#include <asm/fsl_ddr_sdram.h> #include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h> #include <asm/fsl_ddr_dimm_params.h>
static void get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
{
i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
}
void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
unsigned int ctrl_num)
{
unsigned int i;
unsigned int i2c_address = 0;
for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
if (ctrl_num == 0 && i == 0) {
i2c_address = SPD_EEPROM_ADDRESS1;
}
if (ctrl_num == 1 && i == 0) {
i2c_address = SPD_EEPROM_ADDRESS2;
}
get_spd(&(ctrl_dimms_spd[i]), i2c_address);
}
}
typedef struct { typedef struct {
u32 datarate_mhz_low; u32 datarate_mhz_low;
u32 datarate_mhz_high; u32 datarate_mhz_high;

21
board/freescale/mpc8610hpcd/ddr.c
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@ -7,31 +7,10 @@
*/ */
#include <common.h> #include <common.h>
#include <i2c.h>
#include <asm/fsl_ddr_sdram.h> #include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h> #include <asm/fsl_ddr_dimm_params.h>
static void
get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
{
i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
}
void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
unsigned int ctrl_num)
{
unsigned int i;
unsigned int i2c_address = 0;
for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
if (ctrl_num == 0 && i == 0) {
i2c_address = SPD_EEPROM_ADDRESS1;
}
get_spd(&(ctrl_dimms_spd[i]), i2c_address);
}
}
void fsl_ddr_board_options(memctl_options_t *popts, void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm, dimm_params_t *pdimm,
unsigned int ctrl_num) unsigned int ctrl_num)

30
board/freescale/mpc8641hpcn/ddr.c
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@ -7,40 +7,10 @@
*/ */
#include <common.h> #include <common.h>
#include <i2c.h>
#include <asm/fsl_ddr_sdram.h> #include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h> #include <asm/fsl_ddr_dimm_params.h>
static void
get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
{
i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
}
void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
unsigned int ctrl_num)
{
unsigned int i;
unsigned int i2c_address = 0;
for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
if (ctrl_num == 0 && i == 0) {
i2c_address = SPD_EEPROM_ADDRESS1;
}
if (ctrl_num == 0 && i == 1) {
i2c_address = SPD_EEPROM_ADDRESS2;
}
if (ctrl_num == 1 && i == 0) {
i2c_address = SPD_EEPROM_ADDRESS3;
}
if (ctrl_num == 1 && i == 1) {
i2c_address = SPD_EEPROM_ADDRESS4;
}
get_spd(&(ctrl_dimms_spd[i]), i2c_address);
}
}
typedef struct { typedef struct {
u32 datarate_mhz_low; u32 datarate_mhz_low;
u32 datarate_mhz_high; u32 datarate_mhz_high;

18
board/freescale/p1022ds/ddr.c
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@ -10,28 +10,10 @@
*/ */
#include <common.h> #include <common.h>
#include <i2c.h>
#include <asm/fsl_ddr_sdram.h> #include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h> #include <asm/fsl_ddr_dimm_params.h>
void fsl_ddr_get_spd(ddr3_spd_eeprom_t *ctrl_dimms_spd, unsigned int ctrl_num)
{
int ret;
/*
* The P1022 has only one DDR controller, and the board has only one
* DIMM slot.
*/
ret = i2c_read(SPD_EEPROM_ADDRESS1, 0, 1, (u8 *)ctrl_dimms_spd,
sizeof(ddr3_spd_eeprom_t));
if (ret) {
debug("DDR: failed to read SPD from address %u\n",
SPD_EEPROM_ADDRESS1);
memset(ctrl_dimms_spd, 0, sizeof(ddr3_spd_eeprom_t));
}
}
typedef struct { typedef struct {
u32 datarate_mhz_low; u32 datarate_mhz_low;
u32 datarate_mhz_high; u32 datarate_mhz_high;

19
board/freescale/p2020ds/ddr.c
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@ -7,29 +7,10 @@
*/ */
#include <common.h> #include <common.h>
#include <i2c.h>
#include <asm/fsl_ddr_sdram.h> #include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h> #include <asm/fsl_ddr_dimm_params.h>
static void get_spd(generic_spd_eeprom_t *spd, unsigned char i2c_address)
{
i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr3_spd_eeprom_t));
}
void fsl_ddr_get_spd(generic_spd_eeprom_t *ctrl_dimms_spd,
unsigned int ctrl_num)
{
unsigned int i;
unsigned int i2c_address = 0;
for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
if (ctrl_num == 0 && i == 0)
i2c_address = SPD_EEPROM_ADDRESS1;
get_spd(&(ctrl_dimms_spd[i]), i2c_address);
}
}
typedef struct { typedef struct {
u32 datarate_mhz_low; u32 datarate_mhz_low;
u32 datarate_mhz_high; u32 datarate_mhz_high;

22
board/sbc8548/ddr.c
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@ -7,32 +7,10 @@
*/ */
#include <common.h> #include <common.h>
#include <i2c.h>
#include <asm/fsl_ddr_sdram.h> #include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h> #include <asm/fsl_ddr_dimm_params.h>
static void
get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
{
i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
}
void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
unsigned int ctrl_num)
{
unsigned int i;
if (ctrl_num) {
printf("%s unexpected ctrl_num = %u\n", __FUNCTION__, ctrl_num);
return;
}
for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
get_spd(&(ctrl_dimms_spd[i]), SPD_EEPROM_ADDRESS);
}
}
void fsl_ddr_board_options(memctl_options_t *popts, void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm, dimm_params_t *pdimm,
unsigned int ctrl_num) unsigned int ctrl_num)

22
board/sbc8560/ddr.c
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@ -7,32 +7,10 @@
*/ */
#include <common.h> #include <common.h>
#include <i2c.h>
#include <asm/fsl_ddr_sdram.h> #include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h> #include <asm/fsl_ddr_dimm_params.h>
static void
get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
{
i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t));
}
void
fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
unsigned int ctrl_num)
{
unsigned int i;
unsigned int i2c_address = 0;
for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
if (ctrl_num == 0 && i == 0) {
i2c_address = SPD_EEPROM_ADDRESS;
}
get_spd(&(ctrl_dimms_spd[i]), i2c_address);
}
}
void fsl_ddr_board_options(memctl_options_t *popts, void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm, dimm_params_t *pdimm,
unsigned int ctrl_num) unsigned int ctrl_num)

30
board/sbc8641d/ddr.c
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@ -7,40 +7,10 @@
*/ */
#include <common.h> #include <common.h>
#include <i2c.h>
#include <asm/fsl_ddr_sdram.h> #include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h> #include <asm/fsl_ddr_dimm_params.h>
static void
get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
{
i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
}
void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
unsigned int ctrl_num)
{
unsigned int i;
unsigned int i2c_address = 0;
for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
if (ctrl_num == 0 && i == 0) {
i2c_address = SPD_EEPROM_ADDRESS1;
}
if (ctrl_num == 0 && i == 1) {
i2c_address = SPD_EEPROM_ADDRESS2;
}
if (ctrl_num == 1 && i == 0) {
i2c_address = SPD_EEPROM_ADDRESS3;
}
if (ctrl_num == 1 && i == 1) {
i2c_address = SPD_EEPROM_ADDRESS4;
}
get_spd(&(ctrl_dimms_spd[i]), i2c_address);
}
}
void fsl_ddr_board_options(memctl_options_t *popts, void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm, dimm_params_t *pdimm,
unsigned int ctrl_num) unsigned int ctrl_num)

22
board/socrates/ddr.c
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@ -7,32 +7,10 @@
*/ */
#include <common.h> #include <common.h>
#include <i2c.h>
#include <asm/fsl_ddr_sdram.h> #include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h> #include <asm/fsl_ddr_dimm_params.h>
static void
get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
{
i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
}
void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
unsigned int ctrl_num)
{
unsigned int i;
if (ctrl_num) {
printf("%s unexpected ctrl_num = %u\n", __FUNCTION__, ctrl_num);
return;
}
for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
get_spd(&(ctrl_dimms_spd[i]), SPD_EEPROM_ADDRESS);
}
}
void fsl_ddr_board_options(memctl_options_t *popts, void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm, dimm_params_t *pdimm,
unsigned int ctrl_num) unsigned int ctrl_num)

22
board/stx/stxgp3/ddr.c
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@ -7,32 +7,10 @@
*/ */
#include <common.h> #include <common.h>
#include <i2c.h>
#include <asm/fsl_ddr_sdram.h> #include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h> #include <asm/fsl_ddr_dimm_params.h>
static void
get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
{
i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t));
}
void
fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
unsigned int ctrl_num)
{
unsigned int i;
unsigned int i2c_address = 0;
for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
if (ctrl_num == 0 && i == 0) {
i2c_address = SPD_EEPROM_ADDRESS;
}
get_spd(&(ctrl_dimms_spd[i]), i2c_address);
}
}
void fsl_ddr_board_options(memctl_options_t *popts, void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm, dimm_params_t *pdimm,
unsigned int ctrl_num) unsigned int ctrl_num)

21
board/stx/stxssa/ddr.c
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@ -12,27 +12,6 @@
#include <asm/fsl_ddr_sdram.h> #include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h> #include <asm/fsl_ddr_dimm_params.h>
static void
get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
{
i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t));
}
void
fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
unsigned int ctrl_num)
{
unsigned int i;
unsigned int i2c_address = 0;
for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
if (ctrl_num == 0 && i == 0) {
i2c_address = SPD_EEPROM_ADDRESS;
}
get_spd(&(ctrl_dimms_spd[i]), i2c_address);
}
}
void fsl_ddr_board_options(memctl_options_t *popts, void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm, dimm_params_t *pdimm,
unsigned int ctrl_num) unsigned int ctrl_num)

25
board/xes/xpedite517x/ddr.c
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@ -26,35 +26,12 @@
#include <asm/fsl_ddr_sdram.h> #include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h> #include <asm/fsl_ddr_dimm_params.h>
static void get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address) void get_spd(ddr2_spd_eeprom_t *spd, u8 i2c_address)
{ {
i2c_read(i2c_address, SPD_EEPROM_OFFSET, 2, (uchar *)spd, i2c_read(i2c_address, SPD_EEPROM_OFFSET, 2, (uchar *)spd,
sizeof(ddr2_spd_eeprom_t)); sizeof(ddr2_spd_eeprom_t));
} }
void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
unsigned int ctrl_num)
{
unsigned int i;
unsigned int i2c_address = 0;
for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
if (ctrl_num == 0) {
i2c_address = SPD_EEPROM_ADDRESS1;
#ifdef SPD_EEPROM_ADDRESS2
} else if (ctrl_num == 1) {
i2c_address = SPD_EEPROM_ADDRESS2;
#endif
} else {
/* An inalid ctrl number was give, use default SPD */
printf("ERROR: invalid DDR ctrl: %d\n", ctrl_num);
i2c_address = SPD_EEPROM_ADDRESS1;
}
get_spd(&(ctrl_dimms_spd[i]), i2c_address);
}
}
/* /*
* There are four board-specific SDRAM timing parameters which must be * There are four board-specific SDRAM timing parameters which must be
* calculated based on the particular PCB artwork. These are: * calculated based on the particular PCB artwork. These are:

17
board/xes/xpedite520x/ddr.c
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@ -12,8 +12,7 @@
#include <asm/fsl_ddr_sdram.h> #include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h> #include <asm/fsl_ddr_dimm_params.h>
static void void get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
{ {
i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t)); i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
@ -27,20 +26,6 @@ get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
} }
} }
void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
unsigned int ctrl_num)
{
unsigned int i;
if (ctrl_num) {
printf("%s: invalid ctrl_num = %d\n", __func__, ctrl_num);
return;
}
for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++)
get_spd(&(ctrl_dimms_spd[i]), SPD_EEPROM_ADDRESS);
}
void fsl_ddr_board_options(memctl_options_t *popts, void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm, dimm_params_t *pdimm,
unsigned int ctrl_num) unsigned int ctrl_num)

17
board/xes/xpedite537x/ddr.c
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@ -27,27 +27,12 @@
#include <asm/fsl_ddr_sdram.h> #include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h> #include <asm/fsl_ddr_dimm_params.h>
static void get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address) void get_spd(ddr2_spd_eeprom_t *spd, u8 i2c_address)
{ {
i2c_read(i2c_address, SPD_EEPROM_OFFSET, 2, (uchar *)spd, i2c_read(i2c_address, SPD_EEPROM_OFFSET, 2, (uchar *)spd,
sizeof(ddr2_spd_eeprom_t)); sizeof(ddr2_spd_eeprom_t));
} }
void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
unsigned int ctrl_num)
{
unsigned int i;
unsigned int i2c_address = 0;
for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
if (ctrl_num == 0)
i2c_address = SPD_EEPROM_ADDRESS1;
if (ctrl_num == 1)
i2c_address = SPD_EEPROM_ADDRESS2;
get_spd(&(ctrl_dimms_spd[i]), i2c_address);
}
}
/* /*
* There are four board-specific SDRAM timing parameters which must be * There are four board-specific SDRAM timing parameters which must be
* calculated based on the particular PCB artwork. These are: * calculated based on the particular PCB artwork. These are:

15
board/xes/xpedite550x/ddr.c
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@ -27,25 +27,12 @@
#include <asm/fsl_ddr_sdram.h> #include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h> #include <asm/fsl_ddr_dimm_params.h>
static void get_spd(ddr3_spd_eeprom_t *spd, unsigned char i2c_address) void get_spd(ddr3_spd_eeprom_t *spd, u8 i2c_address)
{ {
i2c_read(i2c_address, SPD_EEPROM_OFFSET, 2, (uchar *)spd, i2c_read(i2c_address, SPD_EEPROM_OFFSET, 2, (uchar *)spd,
sizeof(ddr3_spd_eeprom_t)); sizeof(ddr3_spd_eeprom_t));
} }
void fsl_ddr_get_spd(ddr3_spd_eeprom_t *ctrl_dimms_spd,
unsigned int ctrl_num)
{
unsigned int i;
unsigned int i2c_address = 0;
for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
if (ctrl_num == 0 && i == 0)
i2c_address = SPD_EEPROM_ADDRESS1;
get_spd(&(ctrl_dimms_spd[i]), i2c_address);
}
}
/* /*
* There are traditionally three board-specific SDRAM timing parameters * There are traditionally three board-specific SDRAM timing parameters
* which must be calculated based on the particular PCB artwork. These are: * which must be calculated based on the particular PCB artwork. These are:

3
include/configs/MPC8569MDS.h
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@ -139,8 +139,7 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
/* I2C addresses of SPD EEPROMs */ /* I2C addresses of SPD EEPROMs */
#define SPD_EEPROM_ADDRESS1 0x51 /* CTLR 0 DIMM 0 */ #define SPD_EEPROM_ADDRESS 0x51 /* CTLR 0 DIMM 0 */
#define SPD_EEPROM_ADDRESS2 0x52 /* CTLR 1 DIMM 0 */
/* These are used when DDR doesn't use SPD. */ /* These are used when DDR doesn't use SPD. */
#define CONFIG_SYS_SDRAM_SIZE 1024 /* DDR is 1024MB */ #define CONFIG_SYS_SDRAM_SIZE 1024 /* DDR is 1024MB */

2
include/configs/MPC8610HPCD.h
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@ -108,7 +108,7 @@
#define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
#define SPD_EEPROM_ADDRESS1 0x51 /* CTLR 0 DIMM 0 */ #define SPD_EEPROM_ADDRESS 0x51 /* CTLR 0 DIMM 0 */
/* These are used when DDR doesn't use SPD. */ /* These are used when DDR doesn't use SPD. */
#define CONFIG_SYS_SDRAM_SIZE 256 /* DDR is 256MB */ #define CONFIG_SYS_SDRAM_SIZE 256 /* DDR is 256MB */

2
include/configs/P1022DS.h
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@ -87,7 +87,7 @@
/* I2C addresses of SPD EEPROMs */ /* I2C addresses of SPD EEPROMs */
#define CONFIG_SYS_SPD_BUS_NUM 1 #define CONFIG_SYS_SPD_BUS_NUM 1
#define SPD_EEPROM_ADDRESS1 0x51 /* CTLR 0 DIMM 0 */ #define SPD_EEPROM_ADDRESS 0x51 /* CTLR 0 DIMM 0 */
/* /*
* Memory map * Memory map

2
include/configs/P2020DS.h
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@ -130,7 +130,7 @@
/* I2C addresses of SPD EEPROMs */ /* I2C addresses of SPD EEPROMs */
#define CONFIG_DDR_SPD #define CONFIG_DDR_SPD
#define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD EEPROM located on I2C bus 0 */ #define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD EEPROM located on I2C bus 0 */
#define SPD_EEPROM_ADDRESS1 0x51 /* CTLR 0 DIMM 0 */ #define SPD_EEPROM_ADDRESS 0x51 /* CTLR 0 DIMM 0 */
/* These are used when DDR doesn't use SPD. */ /* These are used when DDR doesn't use SPD. */
#define CONFIG_SYS_SDRAM_SIZE 1024 /* DDR is 1GB */ #define CONFIG_SYS_SDRAM_SIZE 1024 /* DDR is 1GB */

2
include/configs/xpedite550x.h
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@ -67,7 +67,7 @@
#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */
#define CONFIG_DDR_SPD #define CONFIG_DDR_SPD
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#define SPD_EEPROM_ADDRESS1 0x54 #define SPD_EEPROM_ADDRESS 0x54
#define SPD_EEPROM_OFFSET 0x200 /* OFFSET of SPD in EEPROM */ #define SPD_EEPROM_OFFSET 0x200 /* OFFSET of SPD in EEPROM */
#define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_DIMM_SLOTS_PER_CTLR 1

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