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tegra: clock: Adjust PLL access to avoid a warning

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A harmless but confusing warning is displayed when looking up the
DisplayPort PLL. Correct this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
master
Simon Glass 10 years ago committed by Tom Warren
parent 746dc76b99
commit cd3c67692b
1 changed files with 5 additions and 2 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
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  1. 7
      arch/arm/mach-tegra/clock.c

7
arch/arm/mach-tegra/clock.c
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@ -84,7 +84,7 @@ static struct clk_pll *get_pll(enum clock_id clkid)
assert(clock_id_is_pll(clkid)); assert(clock_id_is_pll(clkid));
if (clkid >= (enum clock_id)TEGRA_CLK_PLLS) { if (clkid >= (enum clock_id)TEGRA_CLK_PLLS) {
debug("%s: Invalid PLL\n", __func__); debug("%s: Invalid PLL %d\n", __func__, clkid);
return NULL; return NULL;
} }
return &clkrst->crc_pll[clkid]; return &clkrst->crc_pll[clkid];
@ -120,9 +120,12 @@ int clock_ll_read_pll(enum clock_id clkid, u32 *divm, u32 *divn,
unsigned long clock_start_pll(enum clock_id clkid, u32 divm, u32 divn, unsigned long clock_start_pll(enum clock_id clkid, u32 divm, u32 divn,
u32 divp, u32 cpcon, u32 lfcon) u32 divp, u32 cpcon, u32 lfcon)
{ {
struct clk_pll *pll = get_pll(clkid); struct clk_pll *pll = NULL;
u32 misc_data, data; u32 misc_data, data;
if (clkid < (enum clock_id)TEGRA_CLK_PLLS)
pll = get_pll(clkid);
/* /*
* We cheat by treating all PLL (except PLLU) in the same fashion. * We cheat by treating all PLL (except PLLU) in the same fashion.
* This works only because: * This works only because:

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