ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 2

This is kind of microseries-within-series indent cleanup.
This patch just tweaks the indentation so it is visible
what is supposed to go where.

It is likely that this patch has checkpatch warnings, but
for the sake of not breaking the code, these are ignored.

No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
master
Marek Vasut 10 years ago
parent bce24efa1d
commit d2ea49508a
  1. 14
      drivers/ddr/altera/sequencer.c

@ -2243,8 +2243,7 @@ static uint32_t rw_mgr_mem_calibrate_vfifo(uint32_t read_group,
write_group, d);
}
for (p = 0; p <= IO_DQDQS_OUT_PHASE_MAX && grp_calibrated == 0;
p++) {
for (p = 0; p <= IO_DQDQS_OUT_PHASE_MAX && grp_calibrated == 0; p++) {
/* set a particular dqdqs phase */
scc_mgr_set_dqdqs_output_phase_all_ranks(read_group, p);
@ -2257,8 +2256,7 @@ static uint32_t rw_mgr_mem_calibrate_vfifo(uint32_t read_group,
* using current DQDQS phase.
*/
rw_mgr_mem_calibrate_read_load_patterns(0, 1);
if (!(gbl->phy_debug_mode_flags &
PHY_DEBUG_DISABLE_GUARANTEED_READ)) {
if (!(gbl->phy_debug_mode_flags & PHY_DEBUG_DISABLE_GUARANTEED_READ)) {
if (!rw_mgr_mem_calibrate_read_test_patterns_all_ranks
(read_group, 1, &bit_chk)) {
debug_cond(DLEVEL == 1, "%s:%d Guaranteed read test failed:",
@ -2269,7 +2267,7 @@ static uint32_t rw_mgr_mem_calibrate_vfifo(uint32_t read_group,
}
}
/* case:56390 */
/* case:56390 */
grp_calibrated = 1;
if (rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase_sweep_dq_in_delay
(write_group, read_group, test_bgn)) {
@ -2293,10 +2291,10 @@ static uint32_t rw_mgr_mem_calibrate_vfifo(uint32_t read_group,
*/
if (!rw_mgr_mem_calibrate_vfifo_center
(rank_bgn, write_group,
read_group, test_bgn, 1, 0)) {
read_group, test_bgn,
1, 0)) {
grp_calibrated = 0;
failed_substage =
CAL_SUBSTAGE_VFIFO_CENTER;
failed_substage = CAL_SUBSTAGE_VFIFO_CENTER;
}
}
}

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