omap5: Migrate CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC to Kconfig

While in theory this value could be used in places outside of "omap5"
(such as OMAP4), we only make use of it today in OMAP5, so place the
Kconfig entry there.  Given that Kconfig lets us provide a default, we
drop CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC entirely.  The contents of
doc/README.omap-reset-time make a good help entry, so adjust them
slightly and delete the file.  Move the comment about range to where we
use the value now, and have Kconfig enforce the upper bound.

Signed-off-by: Tom Rini <trini@konsulko.com>
master
Tom Rini 8 years ago
parent 89024ddc9e
commit d87f82967f
  1. 5
      README
  2. 7
      arch/arm/include/asm/arch-omap5/clock.h
  3. 17
      arch/arm/mach-omap2/omap5/Kconfig
  4. 13
      arch/arm/mach-omap2/omap5/hwinit.c
  5. 1
      configs/cm_t54_defconfig
  6. 1
      configs/omap5_uevm_defconfig
  7. 20
      doc/README.omap-reset-time
  8. 3
      include/configs/cm_t54.h
  9. 3
      include/configs/omap5_uevm.h
  10. 2
      scripts/config_whitelist.txt

@ -3708,11 +3708,6 @@ Configuration Settings:
If defined, don't allow the -f switch to env set override variable
access flags.
- CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC (OMAP only)
This is set by OMAP boards for the max time that reset should
be asserted. See doc/README.omap-reset-time for details on how
the value can be calculated on a given board.
- CONFIG_USE_STDINT
If stdint.h is available with your toolchain you can define this
option to enable it. You can provide option 'USE_STDINT=1' when

@ -370,13 +370,6 @@
#define DPLL_NO_LOCK 0
#define DPLL_LOCK 1
/*
* MAX value for PRM_RSTTIME[9:0]RSTTIME1 stored is 0x3ff.
* 0x3ff is in the no of FUNC_32K_CLK cycles. Converting cycles
* into microsec and passing the value.
*/
#define CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC 31219
#if defined(CONFIG_DRA7XX)
#define V_OSCK 20000000 /* Clock output from T2 */
#else

@ -63,6 +63,23 @@ config TI_SECURE_EMIF_PROTECTED_REGION_SIZE
using hardware memory firewalls. This value must be smaller than the
TI_SECURE_EMIF_TOTAL_REGION_SIZE value.
config OMAP_PLATFORM_RESET_TIME_MAX_USEC
int "Something"
range 0 31219
default 31219
help
Most OMAPs' provide a way to specify the time for which the reset
should be held low while the voltages and Oscillator outputs
stabilize.
This time is mostly board and PMIC dependent. Hence the boards are
expected to specify a pre-computed time using the above option.
This value can be computed using a summation of the below 3
parameters
1: Time taken by the Osciallator to stop and restart
2: PMIC OTP time
3: Voltage ramp time, which can be derived using the PMIC slew rate
and value of voltage ramp needed.
if TARGET_DRA7XX_EVM || TARGET_AM57XX_EVM
menu "Voltage Domain OPP selections"

@ -414,12 +414,13 @@ void setup_warmreset_time(void)
{
u32 rst_time, rst_val;
#ifndef CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC
rst_time = CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC;
#else
rst_time = CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC;
#endif
rst_time = usec_to_32k(rst_time) << RSTTIME1_SHIFT;
/*
* MAX value for PRM_RSTTIME[9:0]RSTTIME1 stored is 0x3ff.
* 0x3ff is in the no of FUNC_32K_CLK cycles. Converting cycles
* into microsec and passing the value.
*/
rst_time = usec_to_32k(CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC)
<< RSTTIME1_SHIFT;
if (rst_time > RSTTIME1_MASK)
rst_time = RSTTIME1_MASK;

@ -2,6 +2,7 @@ CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP54XX=y
CONFIG_TARGET_CM_T54=y
CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC=16296
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=3

@ -2,6 +2,7 @@ CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP54XX=y
CONFIG_TARGET_OMAP5_UEVM=y
CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC=16296
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_ARMV7_LPAE=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y

@ -1,20 +0,0 @@
README on how reset time on OMAPs should be calculated
CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC:
Most OMAPs' provide a way to specify the time for
which the reset should be held low while the voltages
and Oscillator outputs stabilize.
This time is mostly board and PMIC dependent. Hence the
boards are expected to specify a pre-computed time
using the above option, (the details on how to compute
the value are given below) without which a default time
as specified by CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC
is used.
The value for CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC
can be computed using a summation of the below 3 parameters
-1- Time taken by the Osciallator to stop and restart
-2- PMIC OTP time
-3- Voltage ramp time, which can be derived using the
PMIC slew rate and value of voltage ramp needed.

@ -86,9 +86,6 @@
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_USB_ETHER_MCS7830
/* Max time to hold reset on this board, see doc/README.omap-reset-time */
#define CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC 16296
/*
* Miscellaneous configurable options
*/

@ -68,9 +68,6 @@
#define CONSOLEDEV "ttyO2"
/* Max time to hold reset on this board, see doc/README.omap-reset-time */
#define CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC 16296
#define CONFIG_SCSI
#define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI

@ -617,7 +617,6 @@ CONFIG_DEEP_SLEEP
CONFIG_DEFAULT
CONFIG_DEFAULT_CONSOLE
CONFIG_DEFAULT_IMMR
CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC
CONFIG_DEFAULT_SPI_BUS
CONFIG_DEFAULT_SPI_CS
CONFIG_DEFAULT_SPI_MODE
@ -1999,7 +1998,6 @@ CONFIG_OMAP_EHCI_PHY1_RESET_GPIO
CONFIG_OMAP_EHCI_PHY2_RESET_GPIO
CONFIG_OMAP_EHCI_PHY3_RESET_GPIO
CONFIG_OMAP_GPIO
CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC
CONFIG_OMAP_USB2PHY2_HOST
CONFIG_OMAP_USB3PHY1_HOST
CONFIG_OMAP_USB_PHY

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