@ -241,14 +241,19 @@ static int ls_pcie_addr_valid(struct ls_pcie *pcie, pci_dev_t bdf)
return 0 ;
return 0 ;
}
}
void * ls_pcie_conf_address ( struct ls_pcie * pcie , pci_dev_t bdf ,
int ls_pcie_conf_address ( struct udevice * bus , pci_dev_t bdf ,
int offset )
uint offset , void * * paddress )
{
{
struct udevice * bus = pcie - > bus ;
struct ls_pcie * pcie = dev_get_priv ( bus ) ;
u32 busdev ;
u32 busdev ;
if ( PCI_BUS ( bdf ) = = bus - > seq )
if ( ls_pcie_addr_valid ( pcie , bdf ) )
return pcie - > dbi + offset ;
return - EINVAL ;
if ( PCI_BUS ( bdf ) = = bus - > seq ) {
* paddress = pcie - > dbi + offset ;
return 0 ;
}
busdev = PCIE_ATU_BUS ( PCI_BUS ( bdf ) ) |
busdev = PCIE_ATU_BUS ( PCI_BUS ( bdf ) ) |
PCIE_ATU_DEV ( PCI_DEV ( bdf ) ) |
PCIE_ATU_DEV ( PCI_DEV ( bdf ) ) |
@ -256,67 +261,28 @@ void *ls_pcie_conf_address(struct ls_pcie *pcie, pci_dev_t bdf,
if ( PCI_BUS ( bdf ) = = bus - > seq + 1 ) {
if ( PCI_BUS ( bdf ) = = bus - > seq + 1 ) {
ls_pcie_cfg0_set_busdev ( pcie , busdev ) ;
ls_pcie_cfg0_set_busdev ( pcie , busdev ) ;
return pcie - > cfg0 + offset ;
* paddress = pcie - > cfg0 + offset ;
} else {
} else {
ls_pcie_cfg1_set_busdev ( pcie , busdev ) ;
ls_pcie_cfg1_set_busdev ( pcie , busdev ) ;
return pcie - > cfg1 + offset ;
* paddress = pcie - > cfg1 + offset ;
}
}
return 0 ;
}
}
static int ls_pcie_read_config ( struct udevice * bus , pci_dev_t bdf ,
static int ls_pcie_read_config ( struct udevice * bus , pci_dev_t bdf ,
uint offset , ulong * valuep ,
uint offset , ulong * valuep ,
enum pci_size_t size )
enum pci_size_t size )
{
{
struct ls_pcie * pcie = dev_get_priv ( bus ) ;
return pci_generic_mmap_read_config ( bus , ls_pcie_conf_address ,
void * address ;
bdf , offset , valuep , size ) ;
if ( ls_pcie_addr_valid ( pcie , bdf ) ) {
* valuep = pci_get_ff ( size ) ;
return 0 ;
}
address = ls_pcie_conf_address ( pcie , bdf , offset ) ;
switch ( size ) {
case PCI_SIZE_8 :
* valuep = readb ( address ) ;
return 0 ;
case PCI_SIZE_16 :
* valuep = readw ( address ) ;
return 0 ;
case PCI_SIZE_32 :
* valuep = readl ( address ) ;
return 0 ;
default :
return - EINVAL ;
}
}
}
static int ls_pcie_write_config ( struct udevice * bus , pci_dev_t bdf ,
static int ls_pcie_write_config ( struct udevice * bus , pci_dev_t bdf ,
uint offset , ulong value ,
uint offset , ulong value ,
enum pci_size_t size )
enum pci_size_t size )
{
{
struct ls_pcie * pcie = dev_get_priv ( bus ) ;
return pci_generic_mmap_write_config ( bus , ls_pcie_conf_address ,
void * address ;
bdf , offset , value , size ) ;
if ( ls_pcie_addr_valid ( pcie , bdf ) )
return 0 ;
address = ls_pcie_conf_address ( pcie , bdf , offset ) ;
switch ( size ) {
case PCI_SIZE_8 :
writeb ( value , address ) ;
return 0 ;
case PCI_SIZE_16 :
writew ( value , address ) ;
return 0 ;
case PCI_SIZE_32 :
writel ( value , address ) ;
return 0 ;
default :
return - EINVAL ;
}
}
}
/* Clear multi-function bit */
/* Clear multi-function bit */