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Configuration changes for ADS5121 Rev 3

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ADS5121 Rev 3 board is now the default config

config targets are now

ads5121_config
    Rev 3 board with
	PCI
	M41T62 on board RTC
	512MB DRAM

ads5121_rev2_config
    Rev 2 board with
	No PCI
	256MB DRAM

Signed-off-by: Martha Marx <mmarx@silicontkx.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: John Rigby <jrigby@freescale.com>
master
Martha Marx 17 years ago committed by John Rigby
parent 16bee7b0dc
commit f31c49db2a
5 changed files with 67 additions and 16 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
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  1. 7
      Makefile
  2. 9
      board/ads5121/README
  3. 19
      board/ads5121/ads5121.c
  4. 8
      cpu/mpc512x/cpu.c
  5. 38
      include/configs/ads5121.h

7
Makefile
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@ -750,12 +750,11 @@ motionpro_config: unconfig
## MPC512x Systems ## MPC512x Systems
######################################################################### #########################################################################
ads5121_config \ ads5121_config \
ads5121_PCI_config \ ads5121_rev2_config \
: unconfig : unconfig
@mkdir -p $(obj)include @mkdir -p $(obj)include
@if [ "$(findstring _PCI_,$@)" ] ; then \ @if [ "$(findstring rev2,$@)" ] ; then \
echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \ echo "#define CONFIG_ADS5121_REV2 1" > $(obj)include/config.h; \
$(XECHO) "... with PCI enabled" ; \
fi fi
@$(MKCONFIG) -a ads5121 ppc mpc512x ads5121 @$(MKCONFIG) -a ads5121 ppc mpc512x ads5121

9
board/ads5121/README
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@ -0,0 +1,9 @@
To configure for the current (Rev 3.x) ADS5121
make ads5121_config
This will automatically include PCI, the Real Time CLock, add backup flash
ability and set the correct frequency and memory configuration.
To configure for the older Rev 2 ADS5121 type (this will not have PCI)
make ads5121_rev2_config

19
board/ads5121/ads5121.c
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@ -26,7 +26,9 @@
#include <asm/bitops.h> #include <asm/bitops.h>
#include <command.h> #include <command.h>
#include <fdt_support.h> #include <fdt_support.h>
#ifdef CONFIG_MISC_INIT_R
#include <i2c.h>
#endif
/* Clocks in use */ /* Clocks in use */
#define SCCR1_CLOCKS_EN (CLOCK_SCCR1_CFG_EN | \ #define SCCR1_CLOCKS_EN (CLOCK_SCCR1_CFG_EN | \
CLOCK_SCCR1_LPC_EN | \ CLOCK_SCCR1_LPC_EN | \
@ -75,8 +77,21 @@ int board_early_init_f (void)
* Without this the flash identification routine fails, as it needs to issue * Without this the flash identification routine fails, as it needs to issue
* write commands in order to establish the device ID. * write commands in order to establish the device ID.
*/ */
*((volatile u8 *)(CFG_CPLD_BASE + 0x08)) = 0xC1;
#ifdef CONFIG_ADS5121_REV2
*((volatile u8 *)(CFG_CPLD_BASE + 0x08)) = 0xC1;
#else
if (*((u8 *)(CFG_CPLD_BASE + 0x08)) & 0x04) {
*((volatile u8 *)(CFG_CPLD_BASE + 0x08)) = 0xC1;
} else {
/* running from Backup flash */
*((volatile u8 *)(CFG_CPLD_BASE + 0x08)) = 0x32;
}
#endif
/*
* Configure Flash Speed
*/
*((volatile u32 *)(CFG_IMMR + LPC_OFFSET + CS0_CONFIG)) = CFG_CS0_CFG;
/* /*
* Enable clocks * Enable clocks
*/ */

8
cpu/mpc512x/cpu.c
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@ -133,8 +133,9 @@ void watchdog_reset (void)
#ifdef CONFIG_OF_LIBFDT #ifdef CONFIG_OF_LIBFDT
void ft_cpu_setup(void *blob, bd_t *bd) void ft_cpu_setup(void *blob, bd_t *bd)
{ {
char * cpu_path = "/cpus/" OF_CPU; char *cpu_path = "/cpus/" OF_CPU;
char * eth_path = "/" OF_SOC "/ethernet@2800"; char *eth_path = "/" OF_SOC "/ethernet@2800";
char *eth_path_old = "/" OF_SOC_OLD "/ethernet@2800";
do_fixup_by_path_u32(blob, cpu_path, "timebase-frequency", OF_TBCLK, 1); do_fixup_by_path_u32(blob, cpu_path, "timebase-frequency", OF_TBCLK, 1);
do_fixup_by_path_u32(blob, cpu_path, "bus-frequency", bd->bi_busfreq, 1); do_fixup_by_path_u32(blob, cpu_path, "bus-frequency", bd->bi_busfreq, 1);
@ -144,5 +145,8 @@ void ft_cpu_setup(void *blob, bd_t *bd)
/* this is so old kernels with old device trees will boot */ /* this is so old kernels with old device trees will boot */
do_fixup_by_path_u32(blob, "/" OF_SOC_OLD, "bus-frequency", bd->bi_ipsfreq, 0); do_fixup_by_path_u32(blob, "/" OF_SOC_OLD, "bus-frequency", bd->bi_ipsfreq, 0);
do_fixup_by_path(blob, eth_path_old, "local-mac-address",
bd->bi_enetaddr, 6, 0);
do_fixup_by_path(blob, eth_path_old, "address", bd->bi_enetaddr, 6, 0);
} }
#endif #endif

38
include/configs/ads5121.h
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@ -58,7 +58,12 @@
/* CONFIG_PCI is defined at config time */ /* CONFIG_PCI is defined at config time */
#ifdef CONFIG_ADS5121_REV2
#define CFG_MPC512X_CLKIN 66000000 /* in Hz */ #define CFG_MPC512X_CLKIN 66000000 /* in Hz */
#else
#define CFG_MPC512X_CLKIN 33333333 /* in Hz */
#define CONFIG_PCI
#endif
#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */ #define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */
#define CONFIG_MISC_INIT_R #define CONFIG_MISC_INIT_R
@ -72,7 +77,11 @@
/* /*
* DDR Setup - manually set all parameters as there's no SPD etc. * DDR Setup - manually set all parameters as there's no SPD etc.
*/ */
#ifdef CONFIG_ADS5121_REV2
#define CFG_DDR_SIZE 256 /* MB */ #define CFG_DDR_SIZE 256 /* MB */
#else
#define CFG_DDR_SIZE 512 /* MB */
#endif
#define CFG_DDR_BASE 0x00000000 /* DDR is system memory*/ #define CFG_DDR_BASE 0x00000000 /* DDR is system memory*/
#define CFG_SDRAM_BASE CFG_DDR_BASE #define CFG_SDRAM_BASE CFG_DDR_BASE
@ -120,14 +129,20 @@
* [09:05] DRAM tRP: * [09:05] DRAM tRP:
* [04:00] DRAM tRPA * [04:00] DRAM tRPA
*/ */
#ifdef CONFIG_ADS5121_REV2
#define CFG_MDDRC_SYS_CFG 0xF8604A00 #define CFG_MDDRC_SYS_CFG 0xF8604A00
#define CFG_MDDRC_SYS_CFG_RUN 0xE8604A00 #define CFG_MDDRC_SYS_CFG_RUN 0xE8604A00
#define CFG_MDDRC_TIME_CFG1 0x54EC1168
#define CFG_MDDRC_TIME_CFG2 0x35210864
#else
#define CFG_MDDRC_SYS_CFG 0xFA804A00
#define CFG_MDDRC_SYS_CFG_RUN 0xEA804A00
#define CFG_MDDRC_TIME_CFG1 0x68EC1168
#define CFG_MDDRC_TIME_CFG2 0x34310864
#endif
#define CFG_MDDRC_SYS_CFG_EN 0xF0000000 #define CFG_MDDRC_SYS_CFG_EN 0xF0000000
#define CFG_MDDRC_TIME_CFG0 0x00003D2E #define CFG_MDDRC_TIME_CFG0 0x00003D2E
#define CFG_MDDRC_TIME_CFG0_RUN 0x06183D2E #define CFG_MDDRC_TIME_CFG0_RUN 0x06183D2E
#define CFG_MDDRC_TIME_CFG1 0x54EC1168
#define CFG_MDDRC_TIME_CFG2 0x35210864
#define CFG_MICRON_NOP 0x01380000 #define CFG_MICRON_NOP 0x01380000
#define CFG_MICRON_PCHG_ALL 0x01100400 #define CFG_MICRON_PCHG_ALL 0x01100400
@ -166,12 +181,17 @@
/* /*
* NOR FLASH on the Local Bus * NOR FLASH on the Local Bus
*/ */
#undef CONFIG_BKUP_FLASH
#define CFG_FLASH_CFI /* use the Common Flash Interface */ #define CFG_FLASH_CFI /* use the Common Flash Interface */
#define CFG_FLASH_CFI_DRIVER /* use the CFI driver */ #define CFG_FLASH_CFI_DRIVER /* use the CFI driver */
#ifdef CONFIG_BKUP_FLASH
#define CFG_FLASH_BASE 0xFF800000 /* start of FLASH */
#define CFG_FLASH_SIZE 0x00800000 /* max flash size in bytes */
#else
#define CFG_FLASH_BASE 0xFC000000 /* start of FLASH */ #define CFG_FLASH_BASE 0xFC000000 /* start of FLASH */
#define CFG_FLASH_SIZE 0x04000000 /* max flash size in bytes */ #define CFG_FLASH_SIZE 0x04000000 /* max flash size in bytes */
#endif
#define CFG_FLASH_USE_BUFFER_WRITE #define CFG_FLASH_USE_BUFFER_WRITE
#define CFG_MAX_FLASH_BANKS 1 /* number of banks */ #define CFG_MAX_FLASH_BANKS 1 /* number of banks */
#define CFG_FLASH_BANKS_LIST {CFG_FLASH_BASE} #define CFG_FLASH_BANKS_LIST {CFG_FLASH_BASE}
#define CFG_MAX_FLASH_SECT 256 /* max sectors per device */ #define CFG_MAX_FLASH_SECT 256 /* max sectors per device */
@ -287,14 +307,13 @@
#define CONFIG_NET_MULTI #define CONFIG_NET_MULTI
#define CONFIG_PHY_ADDR 0x1 #define CONFIG_PHY_ADDR 0x1
#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_FEC_AN_TIMEOUT 1
#if 0
/* /*
* Configure on-board RTC * Configure on-board RTC
*/ */
#define CONFIG_RTC_DS1374 /* use ds1374 rtc via i2c */ #define CONFIG_RTC_M41T62 /* use M41T62 rtc via i2 */
#define CFG_I2C_RTC_ADDR 0x68 /* at address 0x68 */ #define CFG_I2C_RTC_ADDR 0x68 /* at address 0x68 */
#endif
/* /*
* Environment * Environment
@ -303,7 +322,11 @@
/* This has to be a multiple of the Flash sector size */ /* This has to be a multiple of the Flash sector size */
#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN) #define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
#define CFG_ENV_SIZE 0x2000 #define CFG_ENV_SIZE 0x2000
#ifdef CONFIG_BKUP_FLASH
#define CFG_ENV_SECT_SIZE 0x20000 /* one sector (256K) for env */
#else
#define CFG_ENV_SECT_SIZE 0x40000 /* one sector (256K) for env */ #define CFG_ENV_SECT_SIZE 0x40000 /* one sector (256K) for env */
#endif
/* Address and size of Redundant Environment Sector */ /* Address and size of Redundant Environment Sector */
#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE) #define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
@ -322,6 +345,7 @@
#define CONFIG_CMD_PING #define CONFIG_CMD_PING
#define CONFIG_CMD_REGINFO #define CONFIG_CMD_REGINFO
#define CONFIG_CMD_EEPROM #define CONFIG_CMD_EEPROM
#define CONFIG_CMD_DATE
#if defined(CONFIG_PCI) #if defined(CONFIG_PCI)
#define CONFIG_CMD_PCI #define CONFIG_CMD_PCI

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