6f5155a95c
Make R5200 specific low level initialization board conditional.
19 years ago
b75ef85f42
Update CPU target identification strings for Coldfire family.
19 years ago
0c056f0e27
Fix serial console support for MCF5271.
19 years ago
8fe9bf61ef
Merged MPC8349ADS and MPC8349EMDS ports into MPC8349EMDS port:
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- Removed MPC8349ADS port
- Added PCI support to MPC8349ADS
- reworked memory map to allow mapping of all regions with BATs
Patch by Kumar Gala 20 Apr 2006
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
20 years ago
8419c01304
MPC5200: enable snooping of DMA transactions on XLB even if no PCI
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is configured; othrwise DMA accesses aren't cache coherent which
causes for example USB to fail.
20 years ago
cf48eb9abd
Some code cleanup
20 years ago
db28ddb4da
Fix CONFIG_SKIP_LOWLEVEL_INIT dependency in cpu/arm920t/start.S
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Patch by Peter Menzebach, 13 Oct 2005 [DNX#2006040142000473]
20 years ago
d87080b721
GCC-4.x fixes: clean up global data pointer initialization for all boards.
20 years ago
62534beb2f
Updates to common PPC4xx onboard (DDR)SDRAM init code (405 and 440)
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405 SDRAM: - The SDRAM parameters can now be defined in the board
config file and the 405 SDRAM controller values will
be calculated upon bootup (see PPChameleonEVB).
When those settings are not defined in the board
config file, the register setup will be as it is now,
so this implementation should not break any current
design using this code.
Thanks to Andrea Marson from DAVE for this patch.
440 DDR: - Added function sdram_tr1_set to auto calculate the
TR1 value for the DDR.
- Added ECC support (see p3p440).
Patch by Stefan Roese, 17 Mar 2006
20 years ago
b66a938342
Set SDelay register in the DDR controller for the MPC5200B chip.
20 years ago
40b0bafbb2
Added config options CFG_MONAHANS_RUN_MODE_OSC_RATIO and
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CFG_MONAHANS_TURBO_RUN_MODE_RATIO for configuring the Monahans core
frequency.
20 years ago
ba70d6a417
delta board: DA9030 initialization and i2c support. Some minor changes to
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make the pxa i2c driver work with the monahans cpu.
20 years ago
7b4fd36b03
Add support for MPC859/866 Rev. A.0
20 years ago
dc9e499c62
Support for DDR with 32-data path. Addotional notes on injecting
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multiple-bit errors.
20 years ago
4c8d1ecce2
Add support for ECC DDR initialization on MPC83xx.
20 years ago
61f25155ac
Add DMA support for MPC83xx.
20 years ago
6d8ae5abb5
Add sync in do_reset() routine for MPC83xx after RPR register
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was written to. It is need on some targets when BAT translation
is enabled.
20 years ago
cd94ba397e
Add Dcbz(), Dcbi() and Dcbf() routines for MPC83xx.
20 years ago
a7c66ad2e5
Correct shift offsets in icache_status and dcache_status for MPC83xx.
20 years ago
ff7fefe679
Apply SoC concept to arm926ejs CPUs, i.e. move the SoC specific timer and
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cpu_reset code from cpu/$(CPU) into the new cpu/$(CPU)/$(SOC) directories
Patch by Andreas Engel, 13 Mar 2006
20 years ago
f3fecfe6d7
Fix problem with updated PCI code in cpu/ppc4xx/405gp_pci.c
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Patch by Stefan Roese, 13 Mar 2006
20 years ago
9a7b408c11
cpu/ppc4xx/start.S : exceptions are enabled after relocation
...
Patch by Cedric Vincent, 6 June 2005
20 years ago
9551530615
au1x00_eth.c: check malloc return value and abort if it failed
...
Patch by Andrew Dyer, 26 Jul 2005
20 years ago
b38dbd4622
Fix bug in [id]cache_status commands for MPC85xx processors;
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should look at LSB of L1CSRn registers to determine if L1 cache is
enabled, not the MSB.
Patch by Murray Jensen, 19 Jul 2005
20 years ago
23466d6a33
Fix PCIDF calculation in cpu/mpc8260/speed.c for MPC8280EC
...
Patch by KokHow Teh, 16 Jun 2005
20 years ago
8e7b703a62
Coding Style cleanup
20 years ago
6cb142fa3b
Add missing Blackfin files.
20 years ago
d2ed2f661b
More GCC 4.x woes
20 years ago
d52fb7e3d1
Some code cleanup for GCC 4.x
20 years ago
0be248fa9a
Cleanup (get rid of debug code that sneaked in)
20 years ago
43638c674a
Cleanup of NAND support of delta board using the Monahans Data Flash
...
Controller.
20 years ago
bf7cac033b
Lots of new stuff:
...
* Debug message can be turned on and off.
* Waiting for events now times out.
* Implemented RESET command.
* Added appropriate nand_bbt_descriptor and nand_oobinfo.
Remaining Problems:
* Read Status still behaves weird an returns invalid stuff sometimes.
* ECC Placement does not respect our scheme in nand_oobinfo.
20 years ago
e8cd00835e
All subsystem clocks not immediately need are turned at reset.
20 years ago
00c35bd214
Added GPIO initialization of DF signal. Still not working.
20 years ago
86ea5f93d7
Initial port to MCC200 board (work in progress)
...
Minimally modified patch by Bluetechnix, Vienna
20 years ago
2688e2f972
Enable address translation on MPC83xx
...
Patch by Kumar Gala, 10 Feb 2006
20 years ago
e0269579a5
This is the first commit for the u-boot zylonite port. The following has be
...
done so far:
* created zylonite board dir (based on lubbock)
* extended some - but not all pxa sources and headers for Intel
Monahans support (CONFIG_CPU_MONAHANS)
* created Makefile zylonite target + MAKEALL entry
* added some debug nonsense, remove later, grep for mk@tbd
Status: compiles (eldk-4.0), and can be started with BDI, but runs forever
and doesn't halt at breakpoints. Hmmm...
20 years ago
eacbd31775
Add support for Freescale M5271 processor
20 years ago
c99f384dce
Decopuled setting of OR/BR and LBLAWBAR/LBLAWAR on MPC83xx
...
Patch by Kumar Gala, 25 Jan 2006
20 years ago
2076d0a15f
PMC405 and CPCI405: Moved configuration of pci resources into config file.
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PMC405 and CPCI2DP: Added firmware download and booting via pci.
Patch by Matthias Fuchs, 20 Dec 2005
20 years ago
62ec6418d4
Add helper function for generic flat device tree fixups for mpc83xx
...
Patch by Kumar Gala 11 Jan 2006
20 years ago
ec00c33578
Only disable the MPC83xx watchdog if its enabled out of reset.
...
If its disabled out of reset SW can later enable it if so desired
Patch by Kumar Gala, 11 Jan 2006
20 years ago
a15b44dbfa
Allow config of GPIO direction & data registers at boot on 83xx
...
Patch by Kumar Gala, 11 Jan 2006
20 years ago
ce574ff506
Enable time handling on 83xx
...
Patch by Kumar Gala, 11 Jan 2006
20 years ago
9260a56151
Make System IO Config Registers board configurable on MPC83xx
...
Patch by Kumar Gala, 11 Jan 2006
20 years ago
a9e642e2f8
MPC5200: Set PCI retry counter to 0 = infinite retry;
...
The default of 255 is too short for slow devices.
Patch by Martin Nykodym, 12 Dec 2005
20 years ago
7481266e4e
20 years ago
a889bd27ef
Fix DPRAM offset/size for MPC8541/8555.
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Simplify TQM85xx Makefile handling.
20 years ago
f013dacf0a
Code cleanup, especially MIPS for GCC 4.x
20 years ago
c75eba3b41
Fix U-Boot compilation for MIPS boards using ELDK 4.0
20 years ago
Marian Balakowicz
Kumar Gala
Wolfgang Denk
Wolfgang Denk
Stefan Roese
Rafal Jaworowski
Markus Klotzbuecher
Wolfgang Denk
Markus Klotzbücher
Markus Klotzbücher
Wolfgang Denk
Zachary P. Landau