Since commit f916757300 (imx: Create distinct pre-processed mkimage
config files), *.cfgtmp files are no longer generated. There is no need
to remove them on the 'clean' target anymore.
Rename the .gitignore glob to *.cfgout.
Cc: Trent Piepho <tpiepho@impinj.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
When generating timestamps in signatures, use imagetool_get_source_date()
so we can be overridden by SOURCE_DATE_EPOCH to generate reproducible
images.
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromum.org>
So we can use imagetool_get_source_date() from callers who do not have
the image tool params struct, just pass in the command name for the error
message.
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromum.org>
In ARM 64-bits, memory size can be supported is more than 4GB,
hence increasing save array is needed to cope with testing larger memory.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Commit e19b0fb485 (kbuild: generate u-boot.cfg as a byproduct of
include/autoconf.mk) removed the use of the cpp_cfg macro in Makefile,
but forgot to remove its definition.
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Newer kernels have moved from ttyO0 to ttyS0, and when booting
it drops a notice:
WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0'
This ensures that you still see kernel messages. Please
update your kernel commandline.
This patch updates the console to use ttyS0 and eliminate the
chatter.
Signed-off-by: Adam Ford <aford173@gmail.com>
Typically init_scsi() does not output anything. So initr_scsi() should
provide a \n or we may see borked output like
SCSI: Net: No ethernet found.
as observed with sandbox_defconfig.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The omap_gpio driver has a TODO that says when every board is converted
to DM and DT, the omap_gpio_bind can stop using calloc and switch
to auto-alloc.
This patch converts this driver to auto-calloc when DT is enabled.
Signed-off-by: Adam Ford <aford173@gmail.com>
The hashed-strings signature property includes two uint32_t values.
The first is unneeded as there should never be a start offset into the
strings region. The second, the size, is needed because the added
signature node appends to this region.
See tools/image-host.c, where a static 0 value is used for the offset.
Signed-off-by: Teddy Reed <teddy.reed@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds a new config value FIT_SIGNATURE_MAX_SIZE, which controls the
max size of a FIT header's totalsize field. The field is checked before
signature checks are applied to protect from reading past the intended
FIT regions.
This field is not part of the vboot signature so it should be sanity
checked. If the field is corrupted then the structure or string region
reads may have unintended behavior, such as reading from device memory.
A default value of 256MB is set and intended to support most max storage
sizes.
Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Teddy Reed <teddy.reed@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add support for loading U-Boot on the Broadcom 7445 SoC. This port
assumes Broadcom's BOLT bootloader is acting as the second stage
bootloader, and U-Boot is acting as the third stage bootloader, loaded
as an ELF program by BOLT.
Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Cc: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Verification of hashes needs to take place before any image post
processing, thus matching full FIT image processing.
This allows mechanisms such as encryption be applied to images
prior to fit generation at the spl level.
Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
Remove empty #ifdef/#ifndef..#endif blocks where the configuration they
guarded has been completely removed.
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Move the FPGA loading from IS_ENABLED(CONFIG_SPL_OS_BOOT) &&
IS_ENABLED(CONFIG_SPL_GZIP) conditional. The FPGA loading can
be used without OS loading and GZIP support in SPL. This issue
was most likely induced by some merge conflict, so fix it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Handle the case where the full fitImage support is enabled. In this
case, the whole fitImage must be loaded up front as some parts of the
fitImage code require memory-mapped access to the entire fitImage.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Handle the case where the full fitImage support is enabled. In this
case, the whole fitImage must be loaded up front as some parts of the
fitImage code require memory-mapped access to the entire fitImage.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Rather than verifying configuration signature of the configuration node
containing the kernel image types, verify all configuration nodes, even
those that do not contain kernel images. This is useful when the nodes
contain ie. standalone OSes or U-Boot.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add code to reset all reset signals as in Ethernet DT node. A reset
property is an optional feature, so only print out a warning and do not
fail if a reset property is not present.
If a reset property is discovered, then use it to deassert, thus
bringing the IP out of reset.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Add code to reset all reset signals as in serial DT node. A reset
property is an optional feature, so do not fail if a reset property is
not present.
If a reset property is discovered, then use it to deassert, thus
bringing the IP out of reset.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add code to reset all reset signals as in mmc DT node. A reset property
is an optional feature, so only print out a warning and do not fail if a
reset property is not present.
If a reset property is discovered, then use it to deassert, thus
bringing the IP out of reset.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Change to use CONFIG_IS_ENABLED(DM_RESET), so this can work in SPL
build (CONFIG_SPL_DM_RESET) and U-boot build (CONFIG_DM_RESET).
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET, so can use
CONFIG_IS_ENABLED(DM_RESET) checking in reset.h later.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add myself as the Maintainer for Actions Semi OWL family and its
relevant board, drivers.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
This commit adds Actions Semi OWL family UART support. This driver
relies on baudrate configured by primary bootloaders.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit adds Actions Semi OWL family base clock and S900 SoC
specific clock support. For S900 peripheral clock support, only UART
clock has been added for now.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit adds uCRobotics Bubblegum-96 board support. This board is
one of the 96Boards Consumer Edition platform based on Actions Semi
S900 SoC.
Features:
- Actions Semi S900 SoC (4xCortex A53, Power VR G6230 GPU)
- 2GiB RAM
- 8GiB eMMC, uSD slot
- WiFi, Bluetooth and GPS module
- 2x Host, 1x Device USB port
- HDMI
- 20-pin low speed and 40-pin high speed expanders, 6 LED, 3 buttons
U-Boot will be loaded by ATF at EL2 execution level. Relevant driver
support will be added in further commits.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
This commit adds Actions Semi OWL SoC family support with S900 as the
first target SoC.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
It is useful to write the position and size of each entry back to the
device tree so that U-Boot can access this at runtime. Add a feature to
support this, along with associated tests.
Signed-off-by: Simon Glass <sjg@chromium.org>
Once binman has packed the image, the position and size of each entry is
known. It is then possible for binman to update the device tree with these
positions. Since placeholder values have been added, this does not affect
the size of the device tree and therefore the packing does not need to be
performed again.
Add a new SetCalculatedProperties method to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some entry types modify the device tree, e.g. to remove microcode or add a
property. So far this just modifies their local copy and does not affect
a 'shared' device tree.
Rather than doing this modification in the ObtainContents() method, and a
new ProcessFdt() method which is specifically designed to modify this
shared device tree.
Move the existing device-tree code over to use this method, reducing
ObtainContents() to the goal of just obtaining the contents without any
processing, even for device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present some warnings are printed to indicate failures which are a
known part of running the tests. Suppress these.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add more tests to increase dtoc code coverage to 100%.
Correct a whitespace error in some test .dts files at the same time.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a -T option to run a code-coverage test on dtoc. At present this is
about 96%. Future work will increase it to 100%.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present a property with a single phandle looks like an integer value
to dtoc. Correct this by adjusting it in the phandle-processing code.
Add a test for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the algortihm is not correct since it will return the root node
if the requested node is not found and there are no slashes in the
requested node name. Fix this and add a test.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the Fdt class does not keep track of property offsets if they
change due to removal of properties. Update the code to handle this, and
add a test.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present only some of the fdt functionality is tested. Add more tests to
cover the rest of it. Also turn on test coverage, which is now 100% with
a small exclusion for a Python 3 feature.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the Fdt class has its own copy of the device tree. This is
confusing an unnecessary now that pylibfdt has its own. Drop it and
provide access functions to the buffer.
This allows us to move the rest of the implementation to use pylibfdt
methods instead of directly calling libfdt stubs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Baruch Siach
Alex Kiernan
Tien Fong Chee
Siva Durga Prasad Paladugu
Adam Ford
Heinrich Schuchardt
Teddy Reed
Thomas Fitzsimmons
Ben Whitten
Marek Vasut
Tom Rini
Ley Foon Tan
Manivannan Sadhasivam
Simon Glass