By default all DSPs are turned off, for another case option
to turn off them is added in this commit.
Also add command to turn off itself.
Acked-by: Murali Karicheri <m-maricheri2@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
The SoC related common functions in board.c should be placed to
a common keystone.c arch file.
Acked-by: Murali Karicheri <m-maricheri2@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
This driver is needed in case if keystone driver is used.
Currently only keystone_net driver uses it. So to avoid
redundant code compilation make the keystone_nav dependent
on keystone net driver. It also leads to compilation errors
for boards that does't use it.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
It's convinient to hold ddr3 function definitions in separate file
such as ddr3.h. So move this from hardware.h to ddr3.h.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Use common keystone2 Power Sleep controller base address instead of
directly deciding which keystone2 SoC is used in psc module.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
These functions have been merged into the common GPMC init code
with this commit a0a37183 (ARM: omap: merge GPMC initialization code
for all platform). The file is not compiled any more. So remove it
as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Pekon Gupta <pekon@ti.com>
Cc: Tom Rini <trini@ti.com>
Acked-by: Pekon Gupta <pekon@ti.com>
Commit a0a37183 (ARM: omap: merge GPMC initialization code for all
platform) broke NAND on OMAP3 based platforms. I noticed this while
testing the latest 2014.07-rc version on the TAO3530 board. NAND
detection did not work with this error message:
NAND: nand: error: Unable to find NAND settings in GPMC Configuration - quitting
As OMAP3 configs don't set CONFIG_NAND but CONFIG_NAND_CMD. the GPMC
was not initialized for NAND at all. This patch now fixes this issue.
Tested on TAO3530 board.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Pekon Gupta <pekon@ti.com>
Cc: Tom Rini <trini@ti.com>
Acked-by: Pekon Gupta <pekon@ti.com>
As noted by clang, we have been shifting certain values out of 32bit
range when setting some DDR registers. Upon further inspection these
had been touching reserved fields (and having no impact). These came in
from historical bring-up code and can be discarded. Similarly, we had
been declaring some fields as 0 when they will be initialized that way.
Tested on Beaglebone White.
Reported-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Cc: Ash Charles <ash@gumstix.com>
Signed-off-by: Tom Rini <trini@ti.com>
Tested-By: Ash Charles <ashcharles@gmail.com>
The generic board infrastructure assumes that gd is set by
arch code.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
Renesas R8A7794 is CPU with Cortex-A15. This supports the basic register
definition and GPIO and framework of PFC.
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
The linker scripts of sh2/sh3/sh4 are almost the same.
The difference among them is essentially only one line.
They can be consolidated into a single file, arch/sh/cpu/u-boot.lds
by re-writing the diffrent line as follows:
KEEP(*/start.o (.text))
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Without this patch is DRAM size one line below DRAM:
which is not nice
Origin:
I2C: ready
DRAM: Memory: ECC disabled
1 GiB
MMC: zynq_sdhci: 0
Fixed by this patch:
I2C: ready
DRAM: ECC disabled 1 GiB
MMC: zynq_sdhci: 0
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Drivers are supposed to be able to close down cleanly. To set a good example,
make sandbox shut down its driver model drivers and remove them before exit.
It may be desirable to do the same more generally once driver model is more
widely-used. This could be done during bootm, before U-Boot jumps to the OS.
It seems far too early to make this change.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present stdio device functions do not get any clue as to which stdio
device is being acted on. Some implementations go to great lengths to work
around this, such as defining a whole separate set of functions for each
possible device.
For driver model we need to associate a stdio_dev with a device. It doesn't
seem possible to continue with this work-around approach.
Instead, add a stdio_dev pointer to each of the stdio member functions.
Note: The serial drivers have the same problem, but it is not strictly
necessary to fix that to get driver model running. Also, if we convert
serial over to driver model the problem will go away.
Code size increases by 244 bytes for Thumb2 and 428 for PowerPC.
22: stdio: Pass device pointer to stdio methods
arm: (for 2/2 boards) all +244.0 bss -4.0 text +248.0
powerpc: (for 1/1 boards) all +428.0 text +428.0
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
There is no point in setting a structure's memory to NULL when it has
already been zeroed with memset().
Also, there is no need to create a stub function for stdio to call - if the
function is NULL it will not be called.
This is a clean-up, with no change in functionality.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
Set up and zero global data before board_init_f() is called so that we can
remove the need for CONFIG_SYS_GENERIC_GLOBAL_DATA.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present sandbox defines CONFIG_SYS_GENERIC_GLOBAL_DATA, meaning that
the global_data pointer is set up in board_init_f().
If we set up and zero the global data before calling board_init_f() then we
don't need to define CONFIG_SYS_GENERIC_GLOBAL_DATA.
Make this change to simplify the init process.
Signed-off-by: Simon Glass <sjg@chromium.org>
When resume from deep sleep, uboot needs to enable L2 and CPC
cache, or they would be keeping unusable in kernel because
kernel didn't enble or initialized them.
This patch didn't change the existing L2 cache enabling code,
just put them in a function.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
T4240 has 4 serdes, each serdes has 4k memory space, two PLLs.
We use PLL1CR0 to check the serdes reference clock.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Previously the driver was only tested on Power SoCs. Different barrier
instructions are needed for ARM SoCs.
Signed-off-by: York Sun <yorksun@freescale.com>
ls1021 is arm-core and supports qe too.
Move immap_qe.h into common directory for both arm and powerpc.
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
On some SoC(e.g. T2080/T4240) the 3rd DMA is not functional if SRIO2 is
chosen. we add fdt_fixup_dma3() to disable the 3rd DMA if SRIO2 is chosen.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Commit ddc94378d changed the definition of __kernel_size_t
from unsigned int to unsigned long.
It is true that it fixed warnings on some crosstools
but it increased warnings on the others.
The problem is that we cannot see consistency in terms of
the typedef of __kernel_size_t on M68K architecture.
However, I'd like to suggest to have __kernel_size_t to be
unsigned int again.
Rationale:
[1] Linux Kernel defines __kernel_size_t on M68K as unsigned int.
Let's stick to the Linux's way.
[2] We want to build boards with popular pre-built toolchains,
not the one locally-built by indivisuals.
I think m68-linux-gcc which can be downloaded from www.kernel.org
is the candidate for our _recommended_ toolchains.
With this patch, all the m68k boards can be built without any warnings.
Give it a try with the following crosstools:
https://www.kernel.org/pub/tools/crosstool/files/bin/x86_64/4.6.3/
x86_64-gcc-4.6.3-nolibc_m68k-linux.tar.xz
or
https://www.kernel.org/pub/tools/crosstool/files/bin/x86_64/4.9.0/
x86_64-gcc-4.9.0-nolibc_m68k-linux.tar.xz
(The latter is newer.)
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Jason Jin <Jason.jin@freescale.com>
There is only one line diff between LEON2 and LEON3 linker scripts:
- arch/sparc/cpu/leon2/start.o (.text)
+ arch/sparc/cpu/leon3/start.o (.text)
They can be written in the same way:
*/start.o (.text)
So, board/gaisler/grsim_leon2/u-boot.lds
and arch/sparc/cpu/leon3/u-boot.lds
can be merged into arch/sparc/cpu/u-boot.lds.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Daniel Hellstrom <daniel@gaisler.com>
The linker scripts of LEON3
- board/gaisler/grsim/u-boot.lds
- board/gaisler/gr_cpci_ax2000/u-boot.lds
- board/gaisler/gr_ep2s60/u-boot.lds
- board/gaisler/gr_xc3s_1500/u-boot.lds
are the same (except cosmetic differences such as indentation).
This commit merges them into arch/sparc/cpu/leon3/u-boot.lds.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Daniel Hellstrom <daniel@gaisler.com>
This patch enables CONFIG_CMD_GPIO for the Allwinner (sunxi) platform as well
as providing the common gpio API (gpio_request/free, direction in/out, get/set
etc).
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Ma Haijun <mahaijuns@gmail.com>
Signed-off-by: Oliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Cc: Henrik Nordström <henrik@henriknordstrom.net>
Cc: Tom Cubie <Mr.hipboi@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Do the same as the Linux kernel does, this fixes the SoC hanging on reset
about 50% of the time.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Add support for the i2c controller found on all Allwinner sunxi SoCs,
this is the same controller as found on the Marvell orion5x and kirkwood
SoC families, with a slightly different register layout, so this patch uses
the existing mvtwsi code.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Heiko Schocher <hs@denx.de>
[ ijc -- updated u-boot-spl-fel.lds ]
Note this has only been tested on Allwinner sunxi devices (support for which
gets introduced by a later patch).
The kirkwood changes have been compile tested using the wireless_space board
config, the orion5x changes have been compile tested using the edminiv2 board
config.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Heiko Schocher <hs@denx.de>
The pad settings for DISP0_DATA02 and DISP0_DAT10 were not
set in the same way as DISP0_DAT00-23, causing much flicker
in parallel RGB displays on Dual-Lite and Solo processors.
These settings now match the i.MX6 Dual and Quad core versions.
Note that this fixes a regression in commit b47abc3 and that
this is the second time we've had a regression on these two
pads (See commit e654ddf).
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Newer AM437x silicon requires us to explicitly power up
the USB2 PHY. By implementing usb_phy_power() we can
achieve that.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Commit 3d622b78 (mx6: soc: Introduce set_ldo_voltage()) introduces
set_ldo_voltage() function that can be used to set the voltages
of any of the three LDO regulators controlled by the PMU_REG_CORE register.
Prior to this commit there was a single set_vddsoc() which only configured the
VDDSOC regulator.
Update the comments to align with the new set_ldo_voltage() implementation.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
DIV_SELECT is used as Fout = Fin * div_select / 2.0, so we should do
the shift after the multiply to avoid rounding errors
Signed-off-by: Andre Renaud <andre@bluewatersys.com>
Mark rc as __maybe_unused since it is infact unused on systems with neither
EMAC nor GMAC.
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Tom Rini <trini@ti.com>
Since ARRAY_SIZE macro is defined in include/common.h,
re-defining it in arch-specific files is redundant.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Sonic Zhang <sonic.zhang@analog.com>
Add invalidate_dcache_range() and flush_dcache_range() for the blackfin
architecture. Such functions already exist on this arch with different
names, so just forward the call.
This fixes the build of bf609-ezkit board as it uses
drivers/net/designware.c which requires the above functions.
Cc: Sonic Zhang <sonic.adi@gmail.com>, Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Vasili Galka <vvv444@gmail.com>
The csarX and cscrX registers in the fbcs_t struct are 16-bit for
CONFIG_M5235 and 32-bit wide otherwise. The code in cpu_init.c
accessed them always as 32-bit, effectively creating a wrong memory
access on M5235. Fixed that by choosing out_be16/out_be32 depending
on whether CONFIG_M5235 is defined or not.
Cc: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Vasili Galka <vvv444@gmail.com>
in_be16() shall be passed a pointer to register and not its value. This
is clearly a typo resulting in a wrong memory access, so fix it.
Cc: Alison Wang <b18965@freescale.com>, Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Vasili Galka <vvv444@gmail.com>
* Boot failures have been discovered due to a combination of routing issues and
non optimal ddr3 timings in the EMIF
* Since ddr3 timings are different after significant board layout changes
different timings are required for alpha, beta and production boards.
Signed-off-by: Franklin S. Cooper Jr <fcooper@ti.com>
Hao Zhang
Khoronzhuk, Ivan
Stefan Roese
Tom Rini
Dirk Eibach
Nobuhiro Iwamatsu
Masahiro Yamada
Michal Simek
Simon Glass
Tang Yuantian
Shaveta Leekha
Shaohui Xie
York Sun
Sandeep Singh
Zhao Qiang
Shengzhou Liu
Ian Campbell
Hans de Goede
Eric Nelson
Felipe Balbi
Fabio Estevam
Andre Renaud
Alexey Ignatov
Vasili Galka
Cooper Jr., Franklin