Enable support for new PMIC driver at GONI reference target.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
This commit adds support for MAX8998 PMIC driver.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
I2C or SPI PMIC devices can be accessed.
Separate files: pmic_i2c.c and pmic_spi.c are responsible
for handling transmission over I2C or SPI bus.
New flags:
CONFIG_PMIC - enable PMIC general device.
CONFIG_PMIC_I2C/SPI - specify the interface to be used.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
Currently there are two config options for building a U-boot binary for MX31PDK:
make mx31pdk_config
or,
make mx31pdk_nand_config
mx31pdk_config was developed first when no NAND SPL support was available for
MX31 and it requires that the U-boot binary is loaded into RAM via JTAG and it
forces SKIP_LOWLEVEL_INIT.
mx31pdk_nand_config was added later and it allows booting from NAND Flash.
Leave just one config option called mx31pdk so that it produces a binary that can boot from NAND Flash.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
setup_weimcs() and some macros are added to support the setup
for i.MX31 WEIM chip selects. As a compromise between verbosity
and readability an ASCII-art'ish bit comment is used instead of
bitfields.
All i.MX31 boards have been patched to use this approach using a
helper program to verify the changes.
Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
Acked-by: Stefano Babic <sbabic@denx.de>
This commit updates the mach-types based on the latest in Linus's head
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
This function is also defined in omap-common/spl_mmc.de so the implementation
in devkit8000.c was protected by a ifdef.
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
This adds the required GPIO and pinmux configuration to make eMMC / SD work
on Seaboard.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Warren <twarren@nvidia.com>
This adds support for changing pinmux functions of pin groups. This is done
by defining a PMUX_FUNC_... enum which can be used to select the function for
each group using pinmux_set_func(). It is also possible to enable
pullup/pulldown, and the existing tristate functionality is retained.
Also provided is a means of configuring a list of pingroups by providing a
configuration table to pinmux_config_table().
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Warren <twarren@nvidia.com>
The pin groupings are better named PINGRP, since on Tegra2 they refer to
multiple pins.
Sorry about this, but better to get it right now when there is only a small
amount of code affected.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Warren <twarren@nvidia.com>
This adds most of the clock functions required by board and driver code:
-query and adjust peripheral clocks
-query and adjust PLLs
-reset and enable control
These functions are plumbed in as required.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Warren <twarren@nvidia.com>
This removes clock_init() and pinmux_init() which are names better suited
to those respective modules. By moving board_init_f() to the bottom of the
file we can remove the need for so many functions in the board.h header file.
The only clock/pinmux/gpio init we need to do prior to relocation is
for the UART.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Warren <twarren@nvidia.com>
Rename CLOCK_PLL_ID to CLOCK_ID which takes account of the fact that the
code now deals with both PLL clocks and source clocks.
This also tidied up the assert() to match the one sent upstream, and fixes
an error in the PWM id.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Warren <twarren@nvidia.com>
In some cases, saving data in RAM as a file with FAT format is required.
This patch allows the file to be written in FAT formatted partition.
The usage is similar with reading a file.
First, fat_register_device function is called before file_fat_write function
in order to set target partition.
Then, file_fat_write function is invoked with desired file name,
start ram address for writing data, and file size.
Signed-off-by: Donggeun Kim <dg77.kim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
This adds support for a new environment variable called 'fdtcontroladdr'. If
defined, the hex address is used as the address of the control fdt for U-Boot.
Note: I have not changed CONFIG_PRAM section as I already have an
outstanding patch on that.
Signed-off-by: Simon Glass <sjg@chromium.org>
This locates the device tree either embedded within U-Boot or attached to the
end as a separate binary.
When CONFIG_OF_CONTROL is defined, U-Boot requires a valid fdt. A check is
provided for this early in initialisation.
Signed-off-by: Simon Glass <sjg@chromium.org>
This library provides useful functions to drivers which want to use
the fdt to control their operation. Functions are provided to:
- look up and enumerate a device type (for example assigning i2c bus 0,
i2c bus 1, etc.)
- decode basic types from the fdt, like addresses and integers
While this library is not strictly necessary, it helps to minimise the
changes to a driver, in order to make it work under fdt control. Less
code is required, and so the barrier to switch drivers over is lower.
Additional functions to read arrays and GPIOs could be made available
here also.
Signed-off-by: Simon Glass <sjg@chromium.org>
This adds support for an FDT to be build as a separate binary file called
u-boot.dtb. This can be concatenated with the U-Boot binary to provide a
device tree located at run-time by U-Boot. The Makefile is modified to
provide this file in u-boot-dtb.bin.
Signed-off-by: Simon Glass <sjg@chromium.org>
This new option allows U-Boot to embed a binary device tree into its image
to allow run-time control of peripherals. This device tree is for U-Boot's
own use and is not necessarily the same one as is passed to the kernel.
The device tree compiler output should be placed in the $(obj)
rooted tree. Since $(OBJCOPY) insists on adding the path to the
generated symbol names, to ensure consistency it should be
invoked from the directory where the .dtb file is located and
given the input file name without the path.
This commit contains my entry for the ugliest Makefile / shell interaction
competition.
Signed-off-by: Simon Glass <sjg@chromium.org>
This adds a device tree pointer to the global data. It can be set by
board code. A later commit will add support for making a device
tree binary blob available to U-Boot for run-time configuration.
Signed-off-by: Simon Glass <sjg@chromium.org>
We want to show block markers on completion of get and put, so
move this common code into separate functions.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is a better name for this protocol. Also remove the typedef to keep
checkpatch happy, and move zeroing of NetBootFileXferSize a little
earlier since TFTPPUT will need to change this.
Signed-off-by: Simon Glass <sjg@chromium.org>
ICMP packets can tell you when there is no server at the other end. It
is useful for tftp to figure this out, so that a quick error can be
displayed, rather than pointlessly retrying.
This adds an ICMP packet handler to the net interface.
Signed-off-by: Simon Glass <sjg@chromium.org>
NetReceive() is a very long function with a lot of indent. Before adding
code to the ICMP bit, split it out.
Signed-off-by: Simon Glass <sjg@chromium.org>
It seems we put numbers and addresses into environment variables a lot.
We should have some functions to do this.
Signed-off-by: Simon Glass <sjg@chromium.org>
It seems to be good practice to return the number of received bytes in the
eth_device's recv() callback, here: tse_eth_rx().
Signed-off-by: Joachim Foerster <joachim.foerster@missinglinkelectronics.com>
Note: This is kind of guess work. The current code is preserved for
all RGMII related modes. It is different for flags=0 (GMII) and flags=5
(SGMII). The last case, SGMII, is successfully tested on
Altera's Terasic DE4.
Signed-off-by: Joachim Foerster <joachim.foerster@missinglinkelectronics.com>
Currently part_efi.c allocates buffers for the gpt_header, the
legacy_mbr, and the pte (partition table entry) that may be
incorrectly aligned for DMA operations.
This patch uses ALLOC_CACHE_ALIGN_BUFFER for the stack allocated
buffers and memalign to replace the malloc of the pte.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Currently the mmc_change_freq and mmc_startup functions allocates
buffers on the stack that are passed down to the MMC device driver.
These buffers could be unaligned to the L1 dcache line size. This
causes problems when using DMA and with caches enabled.
This patch correctly cache alignes the buffers used for reading the
ext_csd data from an MMC device.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Currently, if a device read request is done that does not begin or end
on a sector boundary a stack allocated bounce buffer is used to perform
the read, and then just the part of the sector that is needed is copied
into the users buffer. This stack allocation can mean that the bounce
buffer will not be aligned to the dcache line size. This is a problem
when caches are enabled because unaligned cache invalidates are not
safe.
This patch uses ALLOC_CACHE_ALIGN_BUFFER to create a stack allocated
cache line size aligned bounce buffer.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Dave Liu <r63238@freescale.com>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Change-Id: I32e1594d90ef039137bb219b0f7ced55768744ff
Acked-by: Mike Frysinger <vapier@gentoo.org>
Currently the sd_change_freq function allocates two buffers on the
stack that it passes down to the MMC device driver. These buffers
could be unaligned to the L1 dcache line size. This causes problems
when using DMA and with caches enabled.
This patch correctly cache alignes the buffers used for reading the
scr register and switch status values from an MMC device.
Change-Id: Ifa8414f572ef907681bd2d5ff3950285a215357d
Signed-off-by: Anton Staaf <robotboy@chromium.org>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Anton Staaf <robotboy@chromium.org>
Cc: Tom Warren <twarren.nvidia@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Change-Id: I5c4bcfc0bfe59158ff249fe3be6640eec6d3cc76
Acked-by: Mike Frysinger <vapier@gentoo.org>
This macro is used to allocate cache line size aligned stack
buffers for use with DMA hardware.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Aneesh V <aneesh@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Wolfgang Denk <wd@denx.de>
This reverts commit a2da616311.
THis was applied by accident - a more recent version of this change
was already present, see commit
9400f8f 2011-10-05 22:03:11 +0200 km_arm: enable POST for these boards
Signed-off-by: Wolfgang Denk <wd@denx.de>
Stefano Babic
Łukasz Majewski
Fabio Estevam
Helmut Raiger
Marek Vasut
Simon Schwarz
Heiko Schocher
Tom Warren
Simon Glass
Donggeun Kim
Joachim Foerster
Anton staaf
Wolfgang Denk