For some board designs, it might be useful to switch the DC-DC
clock source to something else rather the default 24 MHz, e.g.
for EMI reasons.
For this, override the mxs_power_setup_dcdc_clocksource function
in your board support files.
Example:
void mxs_power_setup_dcdc_clocksource(void)
{
mxs_power_switch_dcdc_clocksource(POWER_MISC_FREQSEL_20MHZ);
}
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Use the macro SETUP_IOMUX_PAD(...) rather than imx_iomux_v3_setup_multiple_pads(...) in order to setup
the pin configuration for ECSPI1.
ARRAY_SIZE(pads) provides the wrong size for imx_iomux_v3_setup_multiple_pads(pads, ARRAY_SIZE(pads)) in
case of MX6QDL. In the particular case, the content of GPR12 is overwritten and the IPG/AHB/ATB/ATP clocks
are deactivated. Therefore, the connection to the system via JTAG is not possible anymore. Furthermore,
kernel version 3.0.35 hangs during bootprocess in the function etm_init().
Signed-off-by: Michael Schanz <michael.schanz@congatec.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
If fecmxc_initialize_multi() fails, it frees but does not unregister
the mdio bus, causing subsequent uses of the "mii" command to crash.
Fix this by adding mdio_unregister() calls where needed.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Reviewed-by: Eric Nelson <eric@nelint.com>
If the host clock frequency is higher than 100 MHz, the MDIO hold
time needs to be increased from its current setting of one cycle in
order to meet the specified minium of 10 ns. Writing an appropriate
value to the HOLDTIME field of the MII_SPEED register achieves this.
Comment copied from Linux kernel.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Reviewed-by: Eric Nelson <eric@nelint.com>
This patch writes the default values for TXTL and RXTL to UARTx_UFCR.
Without this patch some older kernel versions crash as UARTx_UFCR was
not always correctly initialized.
Signed-off-by: Maximilian Schwerin <maximilian.schwerin@tigris.de>
The low four bits of the SYSCTL register are reserved on the USDHC
controller on i.MX6 and i.MX7 processors, but are used for clocking
operations on earlier models.
Guard against their usage by hiding the bit mask macros on those
processors.
These bits are used to prevent glitches when changing clocks on
i.MX35 et al. Use the RSTA bit instead for i.MX6 and i.MX7.
>From the i.MX6DQ RM:
To prevent possible glitch on the card clock, clear the
FRC_SDCLK_ON bit when changing clock divisor value(SDCLKFS
or DVS in System Control Register) or setting RSTA bit.
Signed-off-by: Eric Nelson <eric@nelint.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Hector Palacios <hector.palacios@digi.com>
Switch Novena to distro bootcmd, so it can be used with debian easily.
Signed-off-by: Vagrant Cascadian <vagrant@aikidev.net>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Sean Cross <xobs@kosagi.com>
Cc: Stefano Babic <sbabic@denx.de>
Tested-by: Vagrant Cascadian <vagrant@aikidev.net>
Should use parenthese to wrap the macro definition, otherwise
we will encounter error like the following:
"
if (base_addr != LCDIF1_BASE_ADDR) {
puts("Wrong LCD interface!\n");
return -EINVAL;
}
"
Without this patch, we will always encounter "Wrong LCD interface".
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
This commit "677f970bc62a661690b3431543d5a5d5e682ba70" introduce a new
macro "CONFIG_FSL_CLK" that get_clocks() should not be limited by ESDHC.
But that patch missed to enable it for i.MX7. THis patch enables
CONFIG_FSL_CLK to let get_clocks work.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Adrian Alonso <aalonso@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Since commit 59370f3fcd ("net: phy: delay only if reset handler is
registered") Ethernet is no longer functional.
This commit does not have an issue in itself, but it revelead a problem
with the Ethernet initialization.
Fix this by calling enable_fec_anatop_clock() earlier and also
by adding a 10ms reset delay as recommended in the AR8031 datasheet.
Suggested-by: Jörg Krause <joerg.krause@embedded.rocks>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Simple patch to enable support for extfs filesystem in SPL,
this is useful to those who want to avoid vfat like plague.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
The following patch changed the PFUZE100 swbst register bit definitions
and broke PMIC configuration on multiple boards, at least on the novena
and gw_ventana. This patch fixes it.
commit 8fa46350a4
Author: Peng Fan <Peng.Fan@freescale.com>
Date: Fri Aug 7 16:43:45 2015 +0800
power: regulator: add pfuze100 support
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Peng Fan <Peng.Fan@freescale.com>
Cc: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Vagrant Cascadian <vagrant@aikidev.net>
Reviewed-by: Przemyslaw Marczak <p.marczak@samsung.com>
Tested-by: Vagrant Cascadian <vagrant@aikidev.net>
Reviewed-by: Peng Fan <Peng.Fan@freescale.com>
Acked-by: Tim Harvey <tharvey@gateworks.com>
At the moment, the desired brownout is at 1.0V. However,
this setting cannot be realized by hardware since we have
only 3 bits to represent the voltage difference from the
target value.
Target value is 1500 mV, brownout target is 1000 mV,
voltage steps are 25 mV.
Register content calculation:
(1500 [mV] - 1000 [mV]) / 25 [mV] = 20 (decimal) = 0x14
Register takes only 3 bits, that is 0x4.
But 0x4 * 25 [mV] = 100 [mV], that means that actual
brownout level is 1500 [mV] - 100 [mV] = 1.4 V.
Minimum possible BO level is
1500 [mV] - 0x7 * 25 [mV] = 1315 [mV].
So lets use this value as desired BO value (which is
also the same as FSL bootlets use).
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
On mx6sx, the CCM register bits for GPMI are different as other
mx6 platforms. Modify the GPMI clock function to support mx6sx.
Signed-off-by: Ye.Li <B37916@freescale.com>
Simplify if/else code, since if channel equals to MEM_BG_SYNC or
MEM_FG_SYNC, we have value 5 for 'dc_chan'.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Add board_usb_phy_mode function for detecting whether a port is
being used as host or client using a GPIO. On Colibri Vybrid we
provide GPIO 102 for this very same purpose.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
We should also take MX6D option in consideration when defining
imx_iomux_v3_setup_pad().
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Congatec has several MX6 boards based on quad, dual, dual-lite and solo.
Add SPL support so that all the variants can be supported
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Congatec boards boot from SPI NOR, so it makes more sense to use
SPI NOR to store the environment variables.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Using 50 MiB malloc pool in SPL is nonsense. Since the caches are not
enabled in SPL, it takes 2 seconds to init the pool and has no obvious
benefit. Reduce the size to 1 MiB.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Add a README with a brief guide to porting serial drivers over to use
driver model.
Add a timeline also. All serial drivers should be converted by the end
of January 2016.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a test that verifies that USB keyboards work correctly on sandbox.
This verifies some additional parts of the USB stack.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a simple USB keyboard driver for sandbox. It provides a function to
'load' it with input data, which it will then stream through to the normal
U-Boot input subsystem. When the input data is exhausted, the keyboard stops
providing data.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add tests that this command produces the right output, even when a rescan
results in a device disappearing from the bus.
Signed-off-by: Simon Glass <sjg@chromium.org>
Each scan of the USB bus may return different results. Existing driver-model
devices are reused when found, but if a device no longer exists it will stay
around, de-activated, but bound.
Detect these devices and remove them after the scan completes.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function should not be used with driver model. While there are users
of USB Ethernet that use driver model for USB but not Ethernet, we have
to keep it around. Add a comment to that effect.
Signed-off-by: Simon Glass <sjg@chromium.org>
Each USB device has an emulator. Currently this can only be found by
supplying the 'pipe' value, which contains the device number. Add a way
to find it directly from the emulated device.
Signed-off-by: Simon Glass <sjg@chromium.org>
We would like the serial number to come from the device tree node name of
the emulated device. This avoids them all having the same name. Adjust the
code to support this.
Signed-off-by: Simon Glass <sjg@chromium.org>
When running sandbox tests, silence the console to avoid unwanted output.
Also, record the console in case tests want to check it.
The -v option can be used to enable stdout during tests.
Signed-off-by: Simon Glass <sjg@chromium.org>
Allow console recording so that tests can use it. Also allow the console
output to be suppressed, to reduce test output 'noise'.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is useful to be able to record console output and provide console input
via a buffer. This provides sandbox with the ability to run a command and
check its output. If the console is set to silent then no visible output
is generated.
This also provides a means to fix the problem where tests produce unwanted
output, such as errors or warnings. This can be confusing. We can instead
set the console to silent and record this output. It can be checked later
in the test if required.
It is possible that this may prove useful for non-test situations. For
example the console output may be suppressed for normal operations, but
recorded and stored for access by the OS. That feature is not implemented
at present.
Signed-off-by: Simon Glass <sjg@chromium.org>
This will be used to support console recording. It provides for a circular
buffer which can be written at the head and read from the tail. It supports
avoiding data copying by providing raw access to the data.
Signed-off-by: Simon Glass <sjg@chromium.org>
Michael Heimpold
Michael Schanz
Måns Rullgård
Maximilian Schwerin
Eric Nelson
Peng Fan
Vagrant Cascadian
Jeroen Hofstee
Fabio Estevam
Otavio Salvador
Marek Vasut
Ye.Li
Sanchayan Maity
Simon Glass