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5730538c5f
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stm32f0: stm32f1: buzzer: initial implementation
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2017-10-31 11:57:28 +01:00 |
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0fb4d67cce
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stm32f0: stm32f1: gpio: rcc: set up timers for PWM
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2017-10-31 11:56:01 +01:00 |
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43e3476a6d
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stm32f1: rtc: use external crystal
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2017-10-31 11:55:09 +01:00 |
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676c9bdbb0
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alarm: stm32f0: stm32f1: initial implementation
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2017-10-23 11:23:57 +02:00 |
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d66c6da847
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gpio: stm32f1: remove old code
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2017-10-23 10:01:25 +02:00 |
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3937042b19
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gpio: stm32f0: stm32f1: set up reset pin
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2017-10-23 10:00:44 +02:00 |
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63525ac93b
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stm32f1: spi: divide clock rate by 2 instead of 64
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2017-10-12 16:53:12 +02:00 |
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a53484051a
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stm32f1: spi: use SPI mode 0 instead of SPI mode 3
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2017-10-10 18:20:32 +02:00 |
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82d765bee3
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make: set up test framework
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2017-09-19 14:15:26 +02:00 |
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2f632d140a
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usart: generalise code for both stm32f0 and stm32f1
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2017-08-01 17:00:35 +02:00 |
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81b475c334
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usart: remove old usart code
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2017-08-01 16:55:42 +02:00 |
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7c44691059
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usart: do not handle Ctrl+C
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2017-08-01 16:19:37 +02:00 |
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ebd770b957
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stm32f1: initial support
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2017-08-01 14:37:27 +02:00 |
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