stm32f0: spi: divide clock rate by 2 instead of 64

source/platform/stm32f0/spi.c

@@ -18,7 +18,7 @@ static struct spi_ops stm32f0_spi_ops = {
 static void stm32f0_spi_init(void)
 {
 	spi_set_master_mode(SPI1);
-	spi_set_baudrate_prescaler(SPI1, SPI_CR1_BR_FPCLK_DIV_64);
+	spi_set_baudrate_prescaler(SPI1, SPI_CR1_BR_FPCLK_DIV_2);
 	spi_set_clock_polarity_0(SPI1);
 	spi_set_clock_phase_0(SPI1);
 	spi_set_full_duplex_mode(SPI1);

source/platform/stm32f1/spi.c

@@ -19,9 +19,9 @@ static void stm32f1_spi_init(void)
 {
 	spi_reset(SPI1);
 	spi_init_master(SPI1,
-		SPI_CR1_BAUDRATE_FPCLK_DIV_64,
-		SPI_CR1_CPOL_CLK_TO_1_WHEN_IDLE,
-		SPI_CR1_CPHA_CLK_TRANSITION_2,
+		SPI_CR1_BAUDRATE_FPCLK_DIV_2,
+		SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE,
+		SPI_CR1_CPHA_CLK_TRANSITION_1,
 		SPI_CR1_DFF_8BIT,
 		SPI_CR1_MSBFIRST);
 	spi_enable_software_slave_management(SPI1);