upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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392 lines
8.6 KiB
392 lines
8.6 KiB
22 years ago
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/* The dpalloc function used and implemented in this file was derieved
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* from PPCBoot/U-Boot file "cpu/mpc8260/commproc.c".
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*/
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/* Author: Arun Dharankar <ADharankar@ATTBI.Com>
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* This example is meant to only demonstrate how the IDMA could be used.
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*/
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/*
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* This file is based on "arch/ppc/8260_io/commproc.c" - here is it's
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* copyright notice:
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*
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* General Purpose functions for the global management of the
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* 8260 Communication Processor Module.
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* Copyright (c) 1999 Dan Malek (dmalek@jlc.net)
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* Copyright (c) 2000 MontaVista Software, Inc (source@mvista.com)
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* 2.3.99 Updates
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*
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* In addition to the individual control of the communication
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* channels, there are a few functions that globally affect the
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* communication processor.
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*
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* Buffer descriptors must be allocated from the dual ported memory
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* space. The allocator for that is here. When the communication
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* process is reset, we reclaim the memory available. There is
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* currently no deallocator for this memory.
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*/
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#include <common.h>
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#include <syscall.h>
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#define STANDALONE
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#ifndef STANDALONE /* Linked into/Part of PPCBoot */
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#include <command.h>
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#include <watchdog.h>
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#else /* Standalone app of PPCBoot */
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#include <syscall.h>
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#define printf mon_printf
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#define tstc mon_tstc
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#define getc mon_getc
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#define putc mon_putc
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#define udelay mon_udelay
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#define malloc mon_malloc
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#define WATCHDOG_RESET() { \
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*(ushort *)(CFG_IMMR + 0x1000E) = 0x556c; \
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*(ushort *)(CFG_IMMR + 0x1000E) = 0xaa39; \
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}
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#endif /* STANDALONE */
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static int debug = 1;
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#define DEBUG(fmt, args...) { \
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if(debug != 0) { \
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printf("[%s %d %s]: ",__FILE__,__LINE__,__FUNCTION__); \
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printf(fmt, ##args); \
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} \
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}
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#define CPM_CR_IDMA1_SBLOCK (0x14)
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#define CPM_CR_IDMA2_SBLOCK (0x15)
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#define CPM_CR_IDMA3_SBLOCK (0x16)
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#define CPM_CR_IDMA4_SBLOCK (0x17)
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#define CPM_CR_IDMA1_PAGE (0x07)
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#define CPM_CR_IDMA2_PAGE (0x08)
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#define CPM_CR_IDMA3_PAGE (0x09)
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#define CPM_CR_IDMA4_PAGE (0x0a)
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#define PROFF_IDMA1_BASE ((uint)0x87fe)
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#define PROFF_IDMA2_BASE ((uint)0x88fe)
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#define PROFF_IDMA3_BASE ((uint)0x89fe)
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#define PROFF_IDMA4_BASE ((uint)0x8afe)
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#define CPM_CR_INIT_TRX ((ushort)0x0000)
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#define CPM_CR_FLG ((ushort)0x0001)
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#define mk_cr_cmd(PG, SBC, MCN, OP) \
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((PG << 26) | (SBC << 21) | (MCN << 6) | OP)
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#pragma pack(1)
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typedef struct ibdbits {
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unsigned b_valid:1;
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unsigned b_resv1:1;
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unsigned b_wrap:1;
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unsigned b_interrupt:1;
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unsigned b_last:1;
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unsigned b_resv2:1;
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unsigned b_cm:1;
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unsigned b_resv3:2;
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unsigned b_sdn:1;
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unsigned b_ddn:1;
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unsigned b_dgbl:1;
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unsigned b_dbo:2;
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unsigned b_resv4:1;
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unsigned b_ddtb:1;
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unsigned b_resv5:2;
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unsigned b_sgbl:1;
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unsigned b_sbo:2;
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unsigned b_resv6:1;
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unsigned b_sdtb:1;
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unsigned b_resv7:9;
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} ibdbits_t;
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#pragma pack(1)
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typedef union ibdbitsu {
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ibdbits_t b;
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uint i;
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} ibdbitsu_t;
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#pragma pack(1)
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typedef struct idma_buf_desc {
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ibdbitsu_t ibd_bits; /* Status and Control */
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uint ibd_datlen; /* Data length in buffer */
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uint ibd_sbuf; /* Source buffer addr in host mem */
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uint ibd_dbuf; /* Destination buffer addr in host mem */
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} ibd_t;
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#pragma pack(1)
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typedef struct dcmbits {
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unsigned b_fb:1;
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unsigned b_lp:1;
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unsigned b_resv1:3;
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unsigned b_tc2:1;
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unsigned b_resv2:1;
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unsigned b_wrap:3;
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unsigned b_sinc:1;
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unsigned b_dinc:1;
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unsigned b_erm:1;
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unsigned b_dt:1;
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unsigned b_sd:2;
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} dcmbits_t;
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#pragma pack(1)
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typedef union dcmbitsu {
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dcmbits_t b;
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ushort i;
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} dcmbitsu_t;
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#pragma pack(1)
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typedef struct pram_idma {
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ushort pi_ibase;
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dcmbitsu_t pi_dcmbits;
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ushort pi_ibdptr;
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ushort pi_dprbuf;
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ushort pi_bufinv; /* internal to CPM */
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ushort pi_ssmax;
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ushort pi_dprinptr; /* internal to CPM */
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ushort pi_sts;
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ushort pi_dproutptr; /* internal to CPM */
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ushort pi_seob;
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ushort pi_deob;
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ushort pi_dts;
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ushort pi_retadd;
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ushort pi_resv1; /* internal to CPM */
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uint pi_bdcnt;
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uint pi_sptr;
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uint pi_dptr;
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uint pi_istate;
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} pram_idma_t;
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volatile immap_t *immap = (immap_t *) CFG_IMMR;
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volatile ibd_t *bdf;
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volatile pram_idma_t *piptr;
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volatile int dmadone;
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volatile int *dmadonep = &dmadone;
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void dmadone_handler (void *);
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int idma_init (void);
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void idma_start (int, int, int, uint, uint, int);
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uint dpalloc (uint, uint);
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uint dpinit_done = 0;
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#ifdef STANDALONE
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int ctrlc (void)
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{
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if (mon_tstc()) {
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switch (mon_getc ()) {
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case 0x03: /* ^C - Control C */
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return 1;
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default:
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break;
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}
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}
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return 0;
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}
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void * memset(void * s,int c,size_t count)
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{
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char *xs = (char *) s;
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while (count--)
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*xs++ = c;
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return s;
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}
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int memcmp(const void * cs,const void * ct,size_t count)
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{
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const unsigned char *su1, *su2;
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int res = 0;
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for( su1 = cs, su2 = ct; 0 < count; ++su1, ++su2, count--)
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if ((res = *su1 - *su2) != 0)
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break;
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return res;
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}
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#endif /* STANDALONE */
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#ifdef STANDALONE
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int mem_to_mem_idma2intr (bd_t * bd, int argc, char *argv[])
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#else
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int do_idma (bd_t * bd, int argc, char *argv[])
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#endif /* STANDALONE */
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{
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int i;
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dpinit_done = 0;
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idma_init ();
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DEBUG ("Installing dma handler\n");
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mon_install_hdlr (7, dmadone_handler, (void *) bdf);
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memset ((void *) 0x100000, 'a', 512);
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memset ((void *) 0x200000, 'b', 512);
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for (i = 0; i < 32; i++) {
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printf ("Startin IDMA, iteration=%d\n", i);
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idma_start (1, 1, 512, 0x100000, 0x200000, 3);
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}
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DEBUG ("Uninstalling dma handler\n");
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mon_free_hdlr (7);
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return 0;
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}
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void
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idma_start (int sinc, int dinc, int sz, uint sbuf, uint dbuf, int ttype)
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{
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/* ttype is for M-M, M-P, P-M or P-P: not used for now */
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piptr->pi_istate = 0; /* manual says: clear it before every START_IDMA */
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piptr->pi_dcmbits.b.b_resv1 = 0;
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if (sinc == 1)
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piptr->pi_dcmbits.b.b_sinc = 1;
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else
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piptr->pi_dcmbits.b.b_sinc = 0;
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if (dinc == 1)
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piptr->pi_dcmbits.b.b_dinc = 1;
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else
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piptr->pi_dcmbits.b.b_dinc = 0;
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piptr->pi_dcmbits.b.b_erm = 0;
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piptr->pi_dcmbits.b.b_sd = 0x00; /* M-M */
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bdf->ibd_sbuf = sbuf;
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bdf->ibd_dbuf = dbuf;
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bdf->ibd_bits.b.b_cm = 0;
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bdf->ibd_bits.b.b_interrupt = 1;
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bdf->ibd_bits.b.b_wrap = 1;
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bdf->ibd_bits.b.b_last = 1;
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bdf->ibd_bits.b.b_sdn = 0;
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bdf->ibd_bits.b.b_ddn = 0;
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bdf->ibd_bits.b.b_dgbl = 0;
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bdf->ibd_bits.b.b_ddtb = 0;
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bdf->ibd_bits.b.b_sgbl = 0;
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bdf->ibd_bits.b.b_sdtb = 0;
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bdf->ibd_bits.b.b_dbo = 1;
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bdf->ibd_bits.b.b_sbo = 1;
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bdf->ibd_bits.b.b_valid = 1;
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bdf->ibd_datlen = 512;
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*dmadonep = 0;
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immap->im_sdma.sdma_idmr2 = (uchar) 0xf;
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immap->im_cpm.cp_cpcr = mk_cr_cmd (CPM_CR_IDMA2_PAGE,
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CPM_CR_IDMA2_SBLOCK, 0x0,
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0x9) | 0x00010000;
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while (*dmadonep != 1) {
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if (ctrlc ()) {
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DEBUG ("\nInterrupted waiting for DMA interrupt.\n");
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goto done;
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}
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printf ("Waiting for DMA interrupt (dmadone=%d b_valid = %d)...\n",
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dmadone, bdf->ibd_bits.b.b_valid);
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udelay (1000000);
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}
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printf ("DMA complete notification received!\n");
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done:
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DEBUG ("memcmp(0x%08x, 0x%08x, 512) = %d\n",
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sbuf, dbuf, memcmp ((void *) sbuf, (void *) dbuf, 512));
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return;
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}
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#define MAX_INT_BUFSZ 64
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#define DCM_WRAP 0 /* MUST be consistant with MAX_INT_BUFSZ */
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int idma_init (void)
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{
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uint memaddr;
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immap->im_cpm.cp_rccr &= ~0x00F3FFFF;
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immap->im_cpm.cp_rccr |= 0x00A00A00;
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memaddr = dpalloc (sizeof (pram_idma_t), 64);
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*(volatile ushort *) &immap->im_dprambase[PROFF_IDMA2_BASE] = memaddr;
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piptr = (volatile pram_idma_t *) ((uint) (immap) + memaddr);
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piptr->pi_resv1 = 0; /* manual says: clear it */
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piptr->pi_dcmbits.b.b_fb = 0;
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piptr->pi_dcmbits.b.b_lp = 1;
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piptr->pi_dcmbits.b.b_erm = 0;
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piptr->pi_dcmbits.b.b_dt = 0;
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memaddr = (uint) dpalloc (sizeof (ibd_t), 64);
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piptr->pi_ibase = piptr->pi_ibdptr = (volatile short) memaddr;
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bdf = (volatile ibd_t *) ((uint) (immap) + memaddr);
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bdf->ibd_bits.b.b_valid = 0;
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memaddr = (uint) dpalloc (64, 64);
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piptr->pi_dprbuf = (volatile ushort) memaddr;
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piptr->pi_dcmbits.b.b_wrap = 4;
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piptr->pi_ssmax = 32;
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piptr->pi_sts = piptr->pi_ssmax;
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piptr->pi_dts = piptr->pi_ssmax;
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return 1;
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}
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void dmadone_handler (void *arg)
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{
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immap->im_sdma.sdma_idmr2 = (uchar) 0x0;
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*dmadonep = 1;
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return;
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}
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static uint dpbase = 0;
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uint dpalloc (uint size, uint align)
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{
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DECLARE_GLOBAL_DATA_PTR;
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volatile immap_t *immr = (immap_t *) CFG_IMMR;
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uint retloc;
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uint align_mask, off;
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uint savebase;
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/* Pointer to initial global data area */
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if (dpinit_done == 0) {
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dpbase = gd->dp_alloc_base;
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dpinit_done = 1;
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}
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align_mask = align - 1;
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savebase = dpbase;
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if ((off = (dpbase & align_mask)) != 0)
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dpbase += (align - off);
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if ((off = size & align_mask) != 0)
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size += align - off;
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if ((dpbase + size) >= gd->dp_alloc_top) {
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dpbase = savebase;
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printf ("dpalloc: ran out of dual port ram!");
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return 0;
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}
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retloc = dpbase;
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dpbase += size;
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memset ((void *) &immr->im_dprambase[retloc], 0, size);
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return (retloc);
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}
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