upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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220 lines
7.1 KiB
220 lines
7.1 KiB
16 years ago
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/*
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* Flex CAN Memory Map
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*
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* Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
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* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __FLEXCAN_H__
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#define __FLEXCAN_H__
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/* FlexCan Message Buffer */
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typedef struct can_msgbuf_ctrl {
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#ifdef CONFIG_M5282
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u8 tmstamp; /* 0x00 Timestamp */
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u8 ctrl; /* 0x01 Control */
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u16 idh; /* 0x02 ID High */
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u16 idl; /* 0x04 ID High */
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u8 data[8]; /* 0x06 8 Byte Data Field */
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u16 res; /* 0x0E */
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#else
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u16 ctrl; /* 0x00 Control/Status */
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u16 tmstamp; /* 0x02 Timestamp */
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u32 id; /* 0x04 Identifier */
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u8 data[8]; /* 0x08 8 Byte Data Field */
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#endif
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} can_msg_t;
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#ifdef CONFIG_M5282
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/* MSGBUF CTRL */
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#define CAN_MSGBUF_CTRL_CODE(x) (((x) & 0x0F) << 4)
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#define CAN_MSGBUF_CTRL_CODE_MASK (0x0F)
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#define CAN_MSGBUF_CTRL_LEN(x) ((x) & 0x0F)
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#define CAN_MSGBUF_CTRL_LEN_MASK (0xF0)
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/* MSGBUF ID */
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#define CAN_MSGBUF_IDH_STD(x) (((x) & 0x07FF) << 5)
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#define CAN_MSGBUF_IDH_STD_MASK (0xE003FFFF)
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#define CAN_MSGBUF_IDH_SRR (0x0010)
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#define CAN_MSGBUF_IDH_IDE (0x0080)
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#define CAN_MSGBUF_IDH_EXTH(x) ((x) & 0x07)
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#define CAN_MSGBUF_IDH_EXTH_MASK (0xFFF8)
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#define CAN_MSGBUF_IDL_EXTL(x) (((x) & 0x7FFF) << 1)
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#define CAN_MSGBUF_IDL_EXTL_MASK (0xFFFE)
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#define CAN_MSGBUF_IDL_RTR (0x0001)
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#else
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/* MSGBUF CTRL */
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#define CAN_MSGBUF_CTRL_CODE(x) (((x) & 0x000F) << 8)
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#define CAN_MSGBUF_CTRL_CODE_MASK (0xF0FF)
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#define CAN_MSGBUF_CTRL_SRR (0x0040)
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#define CAN_MSGBUF_CTRL_IDE (0x0020)
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#define CAN_MSGBUF_CTRL_RTR (0x0010)
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#define CAN_MSGBUF_CTRL_LEN(x) ((x) & 0x000F)
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#define CAN_MSGBUF_CTRL_LEN_MASK (0xFFF0)
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/* MSGBUF ID */
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#define CAN_MSGBUF_ID_STD(x) (((x) & 0x000007FF) << 18)
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#define CAN_MSGBUF_ID_STD_MASK (0xE003FFFF)
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#define CAN_MSGBUF_ID_EXT(x) ((x) & 0x0003FFFF)
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#define CAN_MSGBUF_ID_EXT_MASK (0xFFFC0000)
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#endif
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/* FlexCan module */
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typedef struct can_ctrl {
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u32 mcr; /* 0x00 Module Configuration */
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u32 ctrl; /* 0x04 Control */
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u32 timer; /* 0x08 Free Running Timer */
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u32 res1; /* 0x0C */
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u32 rxgmsk; /* 0x10 Rx Global Mask */
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u32 rx14msk; /* 0x14 RxBuffer 14 Mask */
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u32 rx15msk; /* 0x18 RxBuffer 15 Mask */
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#ifdef CONFIG_M5282
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u32 res2; /* 0x1C */
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u16 errstat; /* 0x20 Error and status */
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u16 imsk; /* 0x22 Interrupt Mask */
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u16 iflag; /* 0x24 Interrupt Flag */
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u16 errcnt; /* 0x26 Error Counter */
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u32 res3[3]; /* 0x28 - 0x33 */
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#else
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u16 res2; /* 0x1C */
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u16 errcnt; /* 0x1E Error Counter */
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u16 res3; /* 0x20 */
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u16 errstat; /* 0x22 Error and status */
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u32 res4; /* 0x24 */
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u32 imsk; /* 0x28 Interrupt Mask */
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u32 res5; /* 0x2C */
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u16 iflag; /* 0x30 Interrupt Flag */
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#endif
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u32 res6[19]; /* 0x34 - 0x7F */
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void *msgbuf; /* 0x80 Message Buffer 0-15 */
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} can_t;
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/* MCR */
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#define CAN_MCR_MDIS (0x80000000)
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#define CAN_MCR_FRZ (0x40000000)
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#define CAN_MCR_HALT (0x10000000)
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#define CAN_MCR_NORDY (0x08000000)
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#define CAN_MCF_WAKEMSK (0x04000000) /* 5282 */
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#define CAN_MCR_SOFTRST (0x02000000)
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#define CAN_MCR_FRZACK (0x01000000)
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#define CAN_MCR_SUPV (0x00800000)
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#define CAN_MCR_SELFWAKE (0x00400000) /* 5282 */
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#define CAN_MCR_APS (0x00200000) /* 5282 */
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#define CAN_MCR_LPMACK (0x00100000)
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#define CAN_MCF_BCC (0x00010000)
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#define CAN_MCR_MAXMB(x) ((x) & 0x0F)
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#define CAN_MCR_MAXMB_MASK (0xFFFFFFF0)
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/* CTRL */
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#define CAN_CTRL_PRESDIV(x) (((x) & 0xFF) << 24)
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#define CAN_CTRL_PRESDIV_MASK (0x00FFFFFF)
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#define CAN_CTRL_RJW(x) (((x) & 0x03) << 22)
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#define CAN_CTRL_RJW_MASK (0xFF3FFFFF)
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#define CAN_CTRL_PSEG1(x) (((x) & 0x07) << 19)
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#define CAN_CTRL_PSEG1_MASK (0xFFC7FFFF)
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#define CAN_CTRL_PSEG2(x) (((x) & 0x07) << 16)
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#define CAN_CTRL_PSEG2_MASK (0xFFF8FFFF)
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#define CAN_CTRL_BOFFMSK (0x00008000)
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#define CAN_CTRL_ERRMSK (0x00004000)
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#define CAN_CTRL_CLKSRC (0x00002000)
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#define CAN_CTRL_LPB (0x00001000)
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#define CAN_CTRL_RXMODE (0x00000400) /* 5282 */
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#define CAN_CTRL_TXMODE(x) (((x) & 0x03) << 8) /* 5282 */
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#define CAN_CTRL_TXMODE_MASK (0xFFFFFCFF) /* 5282 */
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#define CAN_CTRL_TXMODE_CAN0 (0x00000000) /* 5282 */
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#define CAN_CTRL_TXMODE_CAN1 (0x00000100) /* 5282 */
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#define CAN_CTRL_TXMODE_OPEN (0x00000200) /* 5282 */
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#define CAN_CTRL_SMP (0x00000080)
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#define CAN_CTRL_BOFFREC (0x00000040)
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#define CAN_CTRL_TSYNC (0x00000020)
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#define CAN_CTRL_LBUF (0x00000010)
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#define CAN_CTRL_LOM (0x00000008)
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#define CAN_CTRL_PROPSEG(x) ((x) & 0x07)
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#define CAN_CTRL_PROPSEG_MASK (0xFFFFFFF8)
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/* TIMER */
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/* Note: PRESDIV, RJW, PSG1, and PSG2 are part of timer in 5282 */
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#define CAN_TIMER(x) ((x) & 0xFFFF)
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#define CAN_TIMER_MASK (0xFFFF0000)
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/* RXGMASK */
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#ifdef CONFIG_M5282
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#define CAN_RXGMSK_MI_STD(x) (((x) & 0x000007FF) << 21)
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#define CAN_RXGMSK_MI_STD_MASK (0x001FFFFF)
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#define CAN_RXGMSK_MI_EXT(x) (((x) & 0x0003FFFF) << 1)
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#define CAN_RXGMSK_MI_EXT_MASK (0xFFF80001)
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#else
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#define CAN_RXGMSK_MI_STD(x) (((x) & 0x000007FF) << 18)
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#define CAN_RXGMSK_MI_STD_MASK (0xE003FFFF)
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#define CAN_RXGMSK_MI_EXT(x) ((x) & 0x0003FFFF)
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#define CAN_RXGMSK_MI_EXT_MASK (0xFFFC0000)
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#endif
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/* ERRCNT */
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#define CAN_ERRCNT_RXECTR(x) (((x) & 0xFF) << 8)
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#define CAN_ERRCNT_RXECTR_MASK (0x00FF)
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#define CAN_ERRCNT_TXECTR(x) ((x) & 0xFF)
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#define CAN_ERRCNT_TXECTR_MASK (0xFF00)
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/* ERRSTAT */
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#define CAN_ERRSTAT_BITERR1 (0x8000)
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#define CAN_ERRSTAT_BITERR0 (0x4000)
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#define CAN_ERRSTAT_ACKERR (0x2000)
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#define CAN_ERRSTAT_CRCERR (0x1000)
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#define CAN_ERRSTAT_FRMERR (0x0800)
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#define CAN_ERRSTAT_STFERR (0x0400)
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#define CAN_ERRSTAT_TXWRN (0x0200)
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#define CAN_ERRSTAT_RXWRN (0x0100)
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#define CAN_ERRSTAT_IDLE (0x0080)
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#define CAN_ERRSTAT_TXRX (0x0040)
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#define CAN_ERRSTAT_FLT_MASK (0xFFCF)
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#define CAN_ERRSTAT_FLT_BUSOFF (0x0020)
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#define CAN_ERRSTAT_FLT_PASSIVE (0x0010)
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#define CAN_ERRSTAT_FLT_ACTIVE (0x0000)
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#ifdef CONFIG_M5282
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#define CAN_ERRSTAT_BOFFINT (0x0004)
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#define CAN_ERRSTAT_ERRINT (0x0002)
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#else
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#define CAN_ERRSTAT_ERRINT (0x0004)
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#define CAN_ERRSTAT_BOFFINT (0x0002)
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#define CAN_ERRSTAT_WAKEINT (0x0001)
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#endif
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/* IMASK */
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#ifdef CONFIG_M5253
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#define CAN_IMASK_BUFnM(x) (1 << (x & 0xFFFFFFFF))
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#define CAN_IMASK_BUFnM_MASKBIT(x) ~CAN_IMASK_BUFnM(x)
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#else
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#define CAN_IMASK_BUFnM(x) (1 << (x & 0xFFFF))
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#define CAN_IMASK_BUFnM_MASKBIT(x) ~CAN_IMASK_BUFnM(x)
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#endif
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/* IFLAG */
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#ifdef CONFIG_M5253
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#define CAN_IFLAG_BUFnM(x) (1 << (x & 0xFFFFFFFF))
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#define CAN_IFLAG_BUFnM_MASKBIT(x) ~CAN_IFLAG_BUFnM(x)
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#else
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#define CAN_IFLAG_BUFnM(x) (1 << (x & 0xFFFF))
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#define CAN_IFLAG_BUFnM_MASKBIT(x) ~CAN_IFLAG_BUFnM(x)
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#endif
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#endif /* __FLEXCAN_H__ */
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