upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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48 lines
1.3 KiB
48 lines
1.3 KiB
22 years ago
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/*
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* Cache operations for the cache instruction.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* (C) Copyright 1996, 1997 by Ralf Baechle
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*/
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#ifndef __ASM_MIPS_CACHEOPS_H
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#define __ASM_MIPS_CACHEOPS_H
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/*
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* Cache Operations
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*/
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#define Index_Invalidate_I 0x00
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#define Index_Writeback_Inv_D 0x01
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#define Index_Invalidate_SI 0x02
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#define Index_Writeback_Inv_SD 0x03
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#define Index_Load_Tag_I 0x04
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#define Index_Load_Tag_D 0x05
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#define Index_Load_Tag_SI 0x06
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#define Index_Load_Tag_SD 0x07
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#define Index_Store_Tag_I 0x08
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#define Index_Store_Tag_D 0x09
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#define Index_Store_Tag_SI 0x0A
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#define Index_Store_Tag_SD 0x0B
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#define Create_Dirty_Excl_D 0x0d
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#define Create_Dirty_Excl_SD 0x0f
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#define Hit_Invalidate_I 0x10
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#define Hit_Invalidate_D 0x11
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#define Hit_Invalidate_SI 0x12
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#define Hit_Invalidate_SD 0x13
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#define Fill 0x14
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#define Hit_Writeback_Inv_D 0x15
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/* 0x16 is unused */
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#define Hit_Writeback_Inv_SD 0x17
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#define Hit_Writeback_I 0x18
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#define Hit_Writeback_D 0x19
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/* 0x1a is unused */
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#define Hit_Writeback_SD 0x1b
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/* 0x1c is unused */
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/* 0x1e is unused */
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#define Hit_Set_Virtual_SI 0x1e
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#define Hit_Set_Virtual_SD 0x1f
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#endif /* __ASM_MIPS_CACHEOPS_H */
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