upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support
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u-boot/include/configs/ti_armv7_common.h

218 lines
7.3 KiB

/* SPDX-License-Identifier: GPL-2.0+ */
/*
* ti_armv7_common.h
*
* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
*
* The various ARMv7 SoCs from TI all share a number of IP blocks when
* implementing a given feature. Rather than define these in every
* board or even SoC common file, we define a common file to be re-used
* in all cases. While technically true that some of these details are
* configurable at the board design, they are common throughout SoC
* reference platforms as well as custom designs and become de facto
* standards.
*/
#ifndef __CONFIG_TI_ARMV7_COMMON_H__
#define __CONFIG_TI_ARMV7_COMMON_H__
/* Support both device trees and ATAGs. */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
/*
* Our DDR memory always starts at 0x80000000 and U-Boot shall have
* relocated itself to higher in memory by the time this value is used.
* However, set this to a 32MB offset to allow for easier Linux kernel
* booting as the default is often used as the kernel load address.
*/
#define CONFIG_SYS_LOAD_ADDR 0x82000000
/*
* We setup defaults based on constraints from the Linux kernel, which should
* also be safe elsewhere. We have the default load at 32MB into DDR (for
* the kernel), FDT above 128MB (the maximum location for the end of the
* kernel), and the ramdisk 512KB above that (allowing for hopefully never
* seen large trees). We say all of this must be within the first 256MB
* as that will normally be within the kernel lowmem and thus visible via
* bootm_size and we only run on platforms with 256MB or more of memory.
*/
#define DEFAULT_LINUX_BOOT_ENV \
"loadaddr=0x82000000\0" \
"kernel_addr_r=0x82000000\0" \
"fdtaddr=0x88000000\0" \
"fdt_addr_r=0x88000000\0" \
"rdaddr=0x88080000\0" \
"ramdisk_addr_r=0x88080000\0" \
"scriptaddr=0x80000000\0" \
"pxefile_addr_r=0x80100000\0" \
"bootm_size=0x10000000\0" \
"boot_fdt=try\0"
#define DEFAULT_FIT_TI_ARGS \
"boot_fit=0\0" \
"fit_loadaddr=0x87000000\0" \
"fit_bootfile=fitImage\0" \
"update_to_fit=setenv loadaddr ${fit_loadaddr}; setenv bootfile ${fit_bootfile}\0" \
"loadfit=run args_mmc; bootm ${loadaddr}#${fdtfile};\0" \
/*
* DDR information. If the CONFIG_NR_DRAM_BANKS is not defined,
* we say (for simplicity) that we have 1 bank, always, even when
* we have more. We always start at 0x80000000, and we place the
* initial stack pointer in our SRAM. Otherwise, we can define
* CONFIG_NR_DRAM_BANKS before including this file.
*/
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#ifndef CONFIG_SYS_INIT_SP_ADDR
#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
GENERATED_GBL_DATA_SIZE)
#endif
/* Timer information. */
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
/*
* Disable DM_* for SPL build and can be re-enabled after adding
* DM support in SPL
*/
#ifdef CONFIG_SPL_BUILD
#undef CONFIG_DM_I2C
#endif
/* I2C IP block */
#define CONFIG_I2C
#ifndef CONFIG_DM_I2C
#define CONFIG_SYS_I2C
#else
/*
* Enable CONFIG_DM_I2C_COMPAT temporarily until all the i2c client
* devices are adopted to DM
*/
#define CONFIG_DM_I2C_COMPAT
#endif
/*
* The following are general good-enough settings for U-Boot. We set a
* large malloc pool as we generally have a lot of DDR, and we opt for
* function over binary size in the main portion of U-Boot as this is
* generally easily constrained later if needed. We enable the config
* options that give us information in the environment about what board
* we are on so we do not need to rely on the command prompt. We set a
* console baudrate of 115200 and use the default baud rate table.
*/
#define CONFIG_SYS_MALLOC_LEN SZ_32M
#define CONFIG_ENV_OVERWRITE /* Overwrite ethaddr / serial# */
/* As stated above, the following choices are optional. */
/* We set the max number of command args high to avoid HUSH bugs. */
#define CONFIG_SYS_MAXARGS 64
/* Console I/O Buffer Size */
#define CONFIG_SYS_CBSIZE 1024
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/*
* When we have SPI, NOR or NAND flash we expect to be making use of
* mtdparts, both for ease of use in U-Boot and for passing information
* on to the Linux kernel.
*/
/*
* Our platforms make use of SPL to initalize the hardware (primarily
* memory) enough for full U-Boot to be loaded. We make use of the general
* SPL framework found under common/spl/. Given our generally common memory
* map, we set a number of related defaults and sizes here.
*/
#if !defined(CONFIG_NOR_BOOT) && \
!(defined(CONFIG_QSPI_BOOT) && defined(CONFIG_AM43XX))
/*
* We also support Falcon Mode so that the Linux kernel can be booted
* directly from SPL. This is not currently available on HS devices.
*/
/*
* Place the image at the start of the ROM defined image space (per
* CONFIG_SPL_TEXT_BASE and we limit our size to the ROM-defined
TI: Rework SRAM definitions and maximums On all TI platforms the ROM defines a "downloaded image" area at or near the start of SRAM which is followed by a reserved area. As it is at best bad form and at worst possibly harmful in corner cases to write in this reserved area, we stop doing that by adding in the define NON_SECURE_SRAM_IMG_END to say where the end of the downloaded image area is and make SRAM_SCRATCH_SPACE_ADDR be one kilobyte before this. At current we define the end of scratch space at 0x228 bytes past the start of scratch space this this gives us a lot of room to grow. As these scratch uses are non-optional today, all targets are modified to respect this boundary. Tested on OMAP4 Pandaboard, OMAP3 Beagle xM Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Nagendra T S <nagendra@mistralsolutions.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Felipe Balbi <balbi@ti.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Paul Kocialkowski <contact@paulk.fr> Cc: Enric Balletbo i Serra <eballetbo@gmail.com> Cc: Adam Ford <aford173@gmail.com> Cc: Steve Sakoman <sakoman@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Thomas Weber <weber@corscience.de> Cc: Hannes Schmelzer <oe5hpm@oevsv.at> Cc: Thomas Chou <thomas@wytron.com.tw> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Simon Glass <sjg@chromium.org> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Sam Protsenko <semen.protsenko@linaro.org> Cc: Heiko Schocher <hs@denx.de> Cc: Samuel Egli <samuel.egli@siemens.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Cc: Ben Whitten <ben.whitten@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: "B, Ravi" <ravibabu@ti.com> Cc: "Matwey V. Kornilov" <matwey.kornilov@gmail.com> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Ash Charles <ashcharles@gmail.com> Cc: "Kipisz, Steven" <s-kipisz2@ti.com> Cc: Daniel Allred <d-allred@ti.com> Signed-off-by: Tom Rini <trini@konsulko.com> Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Ladislav Michl <ladis@linux-mips.org>
8 years ago
* downloaded image area minus 1KiB for scratch space. We initalize DRAM as
* soon as we can so that we can place stack, malloc and BSS there. We load
* U-Boot itself into memory at 0x80800000 for legacy reasons (to not conflict
* with older SPLs). We have our BSS be placed 2MiB after this, to allow for
* the default Linux kernel address of 0x80008000 to work with most sized
* kernels, in the Falcon Mode case. We have the SPL malloc pool at the end
* of the BSS area. We suggest that the stack be placed at 32MiB after the
* start of DRAM to allow room for all of the above (handled in Kconfig).
*/
#ifndef CONFIG_SPL_BSS_START_ADDR
#define CONFIG_SPL_BSS_START_ADDR 0x80a00000
#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
#endif
#ifndef CONFIG_SYS_SPL_MALLOC_START
#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
CONFIG_SPL_BSS_MAX_SIZE)
#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_8M
#endif
TI: Rework SRAM definitions and maximums On all TI platforms the ROM defines a "downloaded image" area at or near the start of SRAM which is followed by a reserved area. As it is at best bad form and at worst possibly harmful in corner cases to write in this reserved area, we stop doing that by adding in the define NON_SECURE_SRAM_IMG_END to say where the end of the downloaded image area is and make SRAM_SCRATCH_SPACE_ADDR be one kilobyte before this. At current we define the end of scratch space at 0x228 bytes past the start of scratch space this this gives us a lot of room to grow. As these scratch uses are non-optional today, all targets are modified to respect this boundary. Tested on OMAP4 Pandaboard, OMAP3 Beagle xM Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Nagendra T S <nagendra@mistralsolutions.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Felipe Balbi <balbi@ti.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Paul Kocialkowski <contact@paulk.fr> Cc: Enric Balletbo i Serra <eballetbo@gmail.com> Cc: Adam Ford <aford173@gmail.com> Cc: Steve Sakoman <sakoman@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Thomas Weber <weber@corscience.de> Cc: Hannes Schmelzer <oe5hpm@oevsv.at> Cc: Thomas Chou <thomas@wytron.com.tw> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Simon Glass <sjg@chromium.org> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Sam Protsenko <semen.protsenko@linaro.org> Cc: Heiko Schocher <hs@denx.de> Cc: Samuel Egli <samuel.egli@siemens.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Cc: Ben Whitten <ben.whitten@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: "B, Ravi" <ravibabu@ti.com> Cc: "Matwey V. Kornilov" <matwey.kornilov@gmail.com> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Ash Charles <ashcharles@gmail.com> Cc: "Kipisz, Steven" <s-kipisz2@ti.com> Cc: Daniel Allred <d-allred@ti.com> Signed-off-by: Tom Rini <trini@konsulko.com> Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Ladislav Michl <ladis@linux-mips.org>
8 years ago
#ifndef CONFIG_SPL_MAX_SIZE
#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
CONFIG_SPL_TEXT_BASE)
#endif
/* FAT sd card locations. */
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#ifdef CONFIG_SPL_OS_BOOT
/* FAT */
#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
/* RAW SD card / eMMC */
#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1700 /* address 0x2E0000 */
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x1500 /* address 0x2A0000 */
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x200 /* 256KiB */
#endif
/* General parts of the framework, required. */
#ifdef CONFIG_NAND
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
#endif
#endif /* !CONFIG_NOR_BOOT */
/* Generic Environment Variables */
#ifdef CONFIG_CMD_NET
#define NETARGS \
"static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}" \
"::off\0" \
"nfsopts=nolock\0" \
"rootpath=/export/rootfs\0" \
"netloadimage=tftp ${loadaddr} ${bootfile}\0" \
"netloadfdt=tftp ${fdtaddr} ${fdtfile}\0" \
"netargs=setenv bootargs console=${console} " \
"${optargs} " \
"root=/dev/nfs " \
"nfsroot=${serverip}:${rootpath},${nfsopts} rw " \
"ip=dhcp\0" \
"netboot=echo Booting from network ...; " \
"setenv autoload no; " \
"dhcp; " \
"run netloadimage; " \
"run netloadfdt; " \
"run netargs; " \
"bootz ${loadaddr} - ${fdtaddr}\0"
#else
#define NETARGS ""
#endif
#endif /* __CONFIG_TI_ARMV7_COMMON_H__ */