arm: dts: socfpga: stratix10: update dtsi and dts

Update dtsi and dts files for resets, phy node and other properties.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>

arch/arm/dts/socfpga_stratix10.dtsi

@@ -80,6 +80,7 @@
 		device_type = "soc";
 		interrupt-parent = <&intc>;
 		ranges = <0 0 0 0xffffffff>;
+		u-boot,dm-pre-reloc;
 
 		clkmgr@ffd1000 {
 			compatible = "altr,clk-mgr";
@@ -92,7 +93,7 @@
 			interrupts = <0 90 4>;
 			interrupt-names = "macirq";
 			mac-address = [00 00 00 00 00 00];
-			resets = <&rst EMAC0_RESET>;
+			resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>;
 			reset-names = "stmmaceth";
 			status = "disabled";
 		};
@@ -103,7 +104,7 @@
 			interrupts = <0 91 4>;
 			interrupt-names = "macirq";
 			mac-address = [00 00 00 00 00 00];
-			resets = <&rst EMAC1_RESET>;
+			resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>;
 			reset-names = "stmmaceth";
 			status = "disabled";
 		};
@@ -114,7 +115,7 @@
 			interrupts = <0 92 4>;
 			interrupt-names = "macirq";
 			mac-address = [00 00 00 00 00 00];
-			resets = <&rst EMAC2_RESET>;
+			resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>;
 			reset-names = "stmmaceth";
 			status = "disabled";
 		};
@@ -136,6 +137,7 @@
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <0 110 4>;
+				bank-name = "porta";
 			};
 		};
 
@@ -156,6 +158,7 @@
 				interrupt-controller;
 				#interrupt-cells = <2>;
 				interrupts = <0 111 4>;
+				bank-name = "portb";
 			};
 		};
 
@@ -166,6 +169,7 @@
 			reg = <0xffc02800 0x100>;
 			interrupts = <0 103 4>;
 			resets = <&rst I2C0_RESET>;
+			reset-names = "i2c";
 			status = "disabled";
 		};
 
@@ -176,6 +180,7 @@
 			reg = <0xffc02900 0x100>;
 			interrupts = <0 104 4>;
 			resets = <&rst I2C1_RESET>;
+			reset-names = "i2c";
 			status = "disabled";
 		};
 
@@ -186,6 +191,7 @@
 			reg = <0xffc02a00 0x100>;
 			interrupts = <0 105 4>;
 			resets = <&rst I2C2_RESET>;
+			reset-names = "i2c";
 			status = "disabled";
 		};
 
@@ -196,6 +202,7 @@
 			reg = <0xffc02b00 0x100>;
 			interrupts = <0 106 4>;
 			resets = <&rst I2C3_RESET>;
+			reset-names = "i2c";
 			status = "disabled";
 		};
 
@@ -206,6 +213,7 @@
 			reg = <0xffc02c00 0x100>;
 			interrupts = <0 107 4>;
 			resets = <&rst I2C4_RESET>;
+			reset-names = "i2c";
 			status = "disabled";
 		};
 
@@ -216,8 +224,8 @@
 			reg = <0xff808000 0x1000>;
 			interrupts = <0 96 4>;
 			fifo-depth = <0x400>;
-			resets = <&rst SDMMC_RESET>;
-			reset-names = "reset";
+			resets = <&rst SDMMC_RESET>, <&rst SDMMC_OCP_RESET>;
+			u-boot,dm-pre-reloc;
 			status = "disabled";
 		};
 
@@ -231,6 +239,7 @@
 			compatible = "altr,rst-mgr";
 			reg = <0xffd11000 0x1000>;
 			altr,modrst-offset = <0x20>;
+			u-boot,dm-pre-reloc;
 		};
 
 		spi0: spi@ffda4000 {
@@ -304,6 +313,8 @@
 			reg-shift = <2>;
 			reg-io-width = <4>;
 			resets = <&rst UART0_RESET>;
+			clock-frequency = <100000000>;
+			u-boot,dm-pre-reloc;
 			status = "disabled";
 		};
 
@@ -350,6 +361,7 @@
 			reg = <0xffd00200 0x100>;
 			interrupts = <0 117 4>;
 			resets = <&rst WATCHDOG0_RESET>;
+			u-boot,dm-pre-reloc;
 			status = "disabled";
 		};
 

arch/arm/dts/socfpga_stratix10_socdk.dts

@@ -78,8 +78,11 @@
 &mmc {
 	status = "okay";
 	cap-sd-highspeed;
+	cap-mmc-highspeed;
 	broken-cd;
 	bus-width = <4>;
+	drvsel = <3>;
+	smplsel = <0>;
 };
 
 &uart0 {