powerpc: Update configs to properly set FSL_ELBC

Some parts that have an Enhanced Local Bus Controller weren't
setting CONFIG_FSL_ELBC.  Fix this so we can use this define
properly going forward (currently it's only used if PHYS_64BIT is
set, which meant not all platforms needed to have it set correctly).

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
master
Becky Bruce 15 years ago committed by Kumar Gala
parent 525f6c3add
commit 0914f48328
  1. 1
      include/configs/MPC8313ERDB.h
  2. 1
      include/configs/MPC8315ERDB.h
  3. 1
      include/configs/MPC837XEMDS.h
  4. 1
      include/configs/MPC837XERDB.h
  5. 1
      include/configs/SIMPC8313.h
  6. 1
      include/configs/XPEDITE5370.h

@ -36,6 +36,7 @@
#define CONFIG_MPC8313ERDB 1
#define CONFIG_PCI
#define CONFIG_FSL_ELBC 1
#define CONFIG_MISC_INIT_R

@ -197,6 +197,7 @@
#define CONFIG_SYS_LCRR_DBYP LCRR_DBYP
#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_2
#define CONFIG_SYS_LBC_LBCR 0x00040000
#define CONFIG_FSL_ELBC 1
/*
* FLASH on the Local Bus

@ -223,6 +223,7 @@
#define CONFIG_SYS_LCRR_DBYP LCRR_DBYP
#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_8
#define CONFIG_SYS_LBC_LBCR 0x00000000
#define CONFIG_FSL_ELBC 1
/*
* FLASH on the Local Bus

@ -246,6 +246,7 @@
#define CONFIG_SYS_LCRR_DBYP LCRR_DBYP
#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_8
#define CONFIG_SYS_LBC_LBCR 0x00000000
#define CONFIG_FSL_ELBC 1
/*
* FLASH on the Local Bus

@ -37,6 +37,7 @@
#define CONFIG_MPC8313 1
#define CONFIG_PCI
#define CONFIG_FSL_ELBC 1
#define CONFIG_MISC_INIT_R

@ -47,6 +47,7 @@
#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */
#define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
#define CONFIG_FSL_ELBC 1
/*
* Multicore config

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