of: clean up OF_CONTROL ifdef conditionals

We have flipped CONFIG_SPL_DISABLE_OF_CONTROL.  We have cleansing
devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear
away the ugly logic in include/fdtdec.h:

 #ifdef CONFIG_OF_CONTROL
 # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL)
 #  define OF_CONTROL 0
 # else
 #  define OF_CONTROL 1
 # endif
 #else
 # define OF_CONTROL 0
 #endif

Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute.  It refers to
CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for
SPL.

Also, we no longer have to cancel CONFIG_OF_CONTROL in
include/config_uncmd_spl.h and scripts/Makefile.spl.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
master
Masahiro Yamada 9 years ago committed by Tom Rini
parent dffb86e468
commit 0f9258228e
  1. 2
      arch/arm/mach-exynos/include/mach/dwmmc.h
  2. 2
      arch/arm/mach-exynos/include/mach/mipi_dsim.h
  3. 2
      arch/arm/mach-exynos/include/mach/mmc.h
  4. 2
      arch/arm/mach-exynos/pinmux.c
  5. 4
      arch/arm/mach-tegra/clock.c
  6. 4
      arch/arm/mach-tegra/tegra114/clock.c
  7. 4
      arch/arm/mach-tegra/tegra124/clock.c
  8. 4
      arch/arm/mach-tegra/tegra20/clock.c
  9. 4
      arch/arm/mach-tegra/tegra30/clock.c
  10. 2
      board/xilinx/microblaze-generic/microblaze-generic.c
  11. 2
      board/xilinx/zynq/board.c
  12. 4
      common/cli.c
  13. 3
      common/spl/spl.c
  14. 2
      drivers/core/Makefile
  15. 4
      drivers/core/device.c
  16. 2
      drivers/core/lists.c
  17. 6
      drivers/core/root.c
  18. 2
      drivers/gpio/mxc_gpio.c
  19. 2
      drivers/gpio/vybrid_gpio.c
  20. 4
      drivers/i2c/s3c24x0_i2c.c
  21. 2
      drivers/input/Makefile
  22. 2
      drivers/input/tegra-kbc.c
  23. 2
      drivers/mmc/exynos_dw_mmc.c
  24. 2
      drivers/mmc/s5p_sdhci.c
  25. 2
      drivers/mmc/tegra_mmc.c
  26. 2
      drivers/mmc/zynq_sdhci.c
  27. 6
      drivers/mtd/spi/sf_probe.c
  28. 2
      drivers/net/xilinx_emaclite.c
  29. 2
      drivers/net/zynq_gem.c
  30. 2
      drivers/power/exynos-tmu.c
  31. 4
      drivers/power/pmic/pmic_max77686.c
  32. 2
      drivers/serial/ns16550.c
  33. 4
      drivers/serial/serial-uclass.c
  34. 2
      drivers/serial/serial_omap.c
  35. 2
      drivers/serial/serial_pl01x.c
  36. 4
      drivers/serial/serial_tegra.c
  37. 2
      drivers/serial/serial_uniphier.c
  38. 2
      drivers/serial/serial_zynq.c
  39. 2
      drivers/sound/max98095.c
  40. 2
      drivers/sound/wm8994.c
  41. 2
      drivers/tpm/tpm_tis_i2c.c
  42. 2
      drivers/video/exynos_dp_lowlevel.c
  43. 8
      drivers/video/exynos_fb.c
  44. 4
      drivers/video/exynos_fimd.c
  45. 4
      drivers/video/exynos_mipi_dsi.c
  46. 2
      drivers/video/tegra.c
  47. 2
      include/cli.h
  48. 3
      include/config_uncmd_spl.h
  49. 3
      include/configs/microblaze-generic.h
  50. 2
      include/configs/socfpga_common.h
  51. 4
      include/dm/device.h
  52. 10
      include/fdtdec.h
  53. 11
      lib/Makefile
  54. 2
      lib/fdtdec.c
  55. 3
      scripts/Makefile.uncmd_spl

@ -27,7 +27,5 @@
#define DWMCI_DIVRATIO_BIT 24 #define DWMCI_DIVRATIO_BIT 24
#define DWMCI_DIVRATIO_MASK 0x7 #define DWMCI_DIVRATIO_MASK 0x7
#ifdef CONFIG_OF_CONTROL
int exynos_dwmmc_init(const void *blob); int exynos_dwmmc_init(const void *blob);
#endif
int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel); int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel);

@ -374,7 +374,5 @@ void exynos_init_dsim_platform_data(vidinfo_t *vid);
/* panel driver init based on mipi dsi interface */ /* panel driver init based on mipi dsi interface */
void s6e8ax0_init(void); void s6e8ax0_init(void);
#ifdef CONFIG_OF_CONTROL
extern int mipi_power(void); extern int mipi_power(void);
#endif
#endif /* _DSIM_H */ #endif /* _DSIM_H */

@ -65,8 +65,6 @@ static inline int s5p_mmc_init(int index, int bus_width)
return s5p_sdhci_init(base, index, bus_width); return s5p_sdhci_init(base, index, bus_width);
} }
#ifdef CONFIG_OF_CONTROL
int exynos_mmc_init(const void *blob); int exynos_mmc_init(const void *blob);
#endif
#endif #endif

@ -874,7 +874,7 @@ int exynos_pinmux_config(int peripheral, int flags)
return -1; return -1;
} }
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
static int exynos4_pinmux_decode_periph_id(const void *blob, int node) static int exynos4_pinmux_decode_periph_id(const void *blob, int node)
{ {
int err; int err;

@ -573,7 +573,7 @@ void clock_ll_start_uart(enum periph_id periph_id)
reset_set_enable(periph_id, 0); reset_set_enable(periph_id, 0);
} }
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
int clock_decode_periph_id(const void *blob, int node) int clock_decode_periph_id(const void *blob, int node)
{ {
enum periph_id id; enum periph_id id;
@ -588,7 +588,7 @@ int clock_decode_periph_id(const void *blob, int node)
assert(clock_periph_id_isvalid(id)); assert(clock_periph_id_isvalid(id));
return id; return id;
} }
#endif /* CONFIG_OF_CONTROL */ #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
int clock_verify(void) int clock_verify(void)
{ {

@ -582,7 +582,7 @@ void reset_set_enable(enum periph_id periph_id, int enable)
writel(reg, reset); writel(reg, reset);
} }
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
/* /*
* Convert a device tree clock ID to our peripheral ID. They are mostly * Convert a device tree clock ID to our peripheral ID. They are mostly
* the same but we are very cautious so we check that a valid clock ID is * the same but we are very cautious so we check that a valid clock ID is
@ -618,7 +618,7 @@ enum periph_id clk_id_to_periph_id(int clk_id)
return clk_id; return clk_id;
} }
} }
#endif /* CONFIG_OF_CONTROL */ #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
void clock_early_init(void) void clock_early_init(void)
{ {

@ -732,7 +732,7 @@ void reset_set_enable(enum periph_id periph_id, int enable)
writel(reg, reset); writel(reg, reset);
} }
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
/* /*
* Convert a device tree clock ID to our peripheral ID. They are mostly * Convert a device tree clock ID to our peripheral ID. They are mostly
* the same but we are very cautious so we check that a valid clock ID is * the same but we are very cautious so we check that a valid clock ID is
@ -798,7 +798,7 @@ enum periph_id clk_id_to_periph_id(int clk_id)
return clk_id; return clk_id;
} }
} }
#endif /* CONFIG_OF_CONTROL */ #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
void clock_early_init(void) void clock_early_init(void)
{ {

@ -507,7 +507,7 @@ void reset_set_enable(enum periph_id periph_id, int enable)
writel(reg, reset); writel(reg, reset);
} }
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
/* /*
* Convert a device tree clock ID to our peripheral ID. They are mostly * Convert a device tree clock ID to our peripheral ID. They are mostly
* the same but we are very cautious so we check that a valid clock ID is * the same but we are very cautious so we check that a valid clock ID is
@ -542,7 +542,7 @@ enum periph_id clk_id_to_periph_id(int clk_id)
return clk_id; return clk_id;
} }
} }
#endif /* CONFIG_OF_CONTROL */ #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
void clock_early_init(void) void clock_early_init(void)
{ {

@ -562,7 +562,7 @@ void reset_set_enable(enum periph_id periph_id, int enable)
writel(reg, reset); writel(reg, reset);
} }
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
/* /*
* Convert a device tree clock ID to our peripheral ID. They are mostly * Convert a device tree clock ID to our peripheral ID. They are mostly
* the same but we are very cautious so we check that a valid clock ID is * the same but we are very cautious so we check that a valid clock ID is
@ -600,7 +600,7 @@ enum periph_id clk_id_to_periph_id(int clk_id)
return clk_id; return clk_id;
} }
} }
#endif /* CONFIG_OF_CONTROL */ #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
void clock_early_init(void) void clock_early_init(void)
{ {

@ -24,7 +24,7 @@ DECLARE_GLOBAL_DATA_PTR;
static int reset_pin = -1; static int reset_pin = -1;
#endif #endif
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
ulong ram_base; ulong ram_base;
void dram_init_banksize(void) void dram_init_banksize(void)

@ -154,7 +154,7 @@ int board_mmc_init(bd_t *bd)
int dram_init(void) int dram_init(void)
{ {
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
int node; int node;
fdt_addr_t addr; fdt_addr_t addr;
fdt_size_t size; fdt_size_t size;

@ -135,7 +135,7 @@ int do_run(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
} }
#endif #endif
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
bool cli_process_fdt(const char **cmdp) bool cli_process_fdt(const char **cmdp)
{ {
/* Allow the fdt to override the boot command */ /* Allow the fdt to override the boot command */
@ -196,7 +196,7 @@ err:
*/ */
hang(); hang();
} }
#endif /* CONFIG_OF_CONTROL */ #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
void cli_loop(void) void cli_loop(void)
{ {

@ -157,8 +157,7 @@ int spl_init(void)
gd->malloc_limit = CONFIG_SYS_MALLOC_F_LEN; gd->malloc_limit = CONFIG_SYS_MALLOC_F_LEN;
gd->malloc_ptr = 0; gd->malloc_ptr = 0;
#endif #endif
if (IS_ENABLED(CONFIG_OF_CONTROL) && if (CONFIG_IS_ENABLED(OF_CONTROL)) {
IS_ENABLED(CONFIG_SPL_OF_CONTROL)) {
ret = fdtdec_setup(); ret = fdtdec_setup();
if (ret) { if (ret) {
debug("fdtdec_setup() returned error %d\n", ret); debug("fdtdec_setup() returned error %d\n", ret);

@ -7,7 +7,7 @@
obj-y += device.o lists.o root.o uclass.o util.o obj-y += device.o lists.o root.o uclass.o util.o
obj-$(CONFIG_DEVRES) += devres.o obj-$(CONFIG_DEVRES) += devres.o
ifndef CONFIG_SPL_BUILD ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_OF_CONTROL) += simple-bus.o obj-$(CONFIG_$(SPL_)OF_CONTROL) += simple-bus.o
endif endif
obj-$(CONFIG_$(SPL_)DM_DEVICE_REMOVE) += device-remove.o obj-$(CONFIG_$(SPL_)DM_DEVICE_REMOVE) += device-remove.o
obj-$(CONFIG_DM) += dump.o obj-$(CONFIG_DM) += dump.o

@ -59,7 +59,7 @@ int device_bind(struct udevice *parent, const struct driver *drv,
dev->seq = -1; dev->seq = -1;
dev->req_seq = -1; dev->req_seq = -1;
if (IS_ENABLED(CONFIG_OF_CONTROL) && IS_ENABLED(CONFIG_DM_SEQ_ALIAS)) { if (CONFIG_IS_ENABLED(OF_CONTROL) && IS_ENABLED(CONFIG_DM_SEQ_ALIAS)) {
/* /*
* Some devices, such as a SPI bus, I2C bus and serial ports * Some devices, such as a SPI bus, I2C bus and serial ports
* are numbered using aliases. * are numbered using aliases.
@ -561,7 +561,7 @@ const char *dev_get_uclass_name(struct udevice *dev)
fdt_addr_t dev_get_addr(struct udevice *dev) fdt_addr_t dev_get_addr(struct udevice *dev)
{ {
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
fdt_addr_t addr; fdt_addr_t addr;
addr = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg"); addr = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg");

@ -99,7 +99,7 @@ int device_bind_driver_to_node(struct udevice *parent, const char *drv_name,
return 0; return 0;
} }
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
/** /**
* driver_check_compatible() - Check if a driver is compatible with this node * driver_check_compatible() - Check if a driver is compatible with this node
* *

@ -114,7 +114,7 @@ int dm_init(void)
ret = device_bind_by_name(NULL, false, &root_info, &DM_ROOT_NON_CONST); ret = device_bind_by_name(NULL, false, &root_info, &DM_ROOT_NON_CONST);
if (ret) if (ret)
return ret; return ret;
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
DM_ROOT_NON_CONST->of_offset = 0; DM_ROOT_NON_CONST->of_offset = 0;
#endif #endif
ret = device_probe(DM_ROOT_NON_CONST); ret = device_probe(DM_ROOT_NON_CONST);
@ -145,7 +145,7 @@ int dm_scan_platdata(bool pre_reloc_only)
return ret; return ret;
} }
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
int dm_scan_fdt_node(struct udevice *parent, const void *blob, int offset, int dm_scan_fdt_node(struct udevice *parent, const void *blob, int offset,
bool pre_reloc_only) bool pre_reloc_only)
{ {
@ -198,7 +198,7 @@ int dm_init_and_scan(bool pre_reloc_only)
return ret; return ret;
} }
if (OF_CONTROL) { if (CONFIG_IS_ENABLED(OF_CONTROL)) {
ret = dm_scan_fdt(gd->fdt_blob, pre_reloc_only); ret = dm_scan_fdt(gd->fdt_blob, pre_reloc_only);
if (ret) { if (ret) {
debug("dm_scan_fdt() failed: %d\n", ret); debug("dm_scan_fdt() failed: %d\n", ret);

@ -336,7 +336,7 @@ U_BOOT_DRIVER(gpio_mxc) = {
.bind = mxc_gpio_bind, .bind = mxc_gpio_bind,
}; };
#ifndef CONFIG_OF_CONTROL #if !CONFIG_IS_ENABLED(OF_CONTROL)
static const struct mxc_gpio_plat mxc_plat[] = { static const struct mxc_gpio_plat mxc_plat[] = {
{ 0, (struct gpio_regs *)GPIO1_BASE_ADDR }, { 0, (struct gpio_regs *)GPIO1_BASE_ADDR },
{ 1, (struct gpio_regs *)GPIO2_BASE_ADDR }, { 1, (struct gpio_regs *)GPIO2_BASE_ADDR },

@ -135,7 +135,7 @@ static int vybrid_gpio_bind(struct udevice *dev)
return 0; return 0;
} }
#ifndef CONFIG_OF_CONTROL #if !CONFIG_IS_ENABLED(OF_CONTROL)
static const struct vybrid_gpio_platdata vybrid_gpio[] = { static const struct vybrid_gpio_platdata vybrid_gpio[] = {
{0, GPIO0_BASE_ADDR, "GPIO0 "}, {0, GPIO0_BASE_ADDR, "GPIO0 "},
{1, GPIO1_BASE_ADDR, "GPIO1 "}, {1, GPIO1_BASE_ADDR, "GPIO1 "},

@ -1002,7 +1002,7 @@ static int s3c24x0_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
} }
} }
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
static void process_nodes(const void *blob, int node_list[], int count, static void process_nodes(const void *blob, int node_list[], int count,
int is_highspeed) int is_highspeed)
{ {
@ -1101,7 +1101,7 @@ int i2c_reset_port_fdt(const void *blob, int node)
return 0; return 0;
} }
#endif /* CONFIG_OF_CONTROL */ #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
#ifdef CONFIG_EXYNOS5 #ifdef CONFIG_EXYNOS5
static void exynos_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr) static void exynos_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)

@ -14,4 +14,4 @@ obj-y += keyboard.o pc_keyb.o
obj-$(CONFIG_PS2MULT) += ps2mult.o ps2ser.o obj-$(CONFIG_PS2MULT) += ps2mult.o ps2ser.o
endif endif
obj-y += input.o obj-y += input.o
obj-$(CONFIG_OF_CONTROL) += key_matrix.o obj-$(CONFIG_$(SPL_)OF_CONTROL) += key_matrix.o

@ -295,7 +295,7 @@ static int init_tegra_keyboard(struct stdio_dev *dev)
if (config.created) if (config.created)
return 0; return 0;
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
int node; int node;
node = fdtdec_next_compatible(gd->fdt_blob, 0, node = fdtdec_next_compatible(gd->fdt_blob, 0,

@ -158,7 +158,7 @@ int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel)
return exynos_dwmci_core_init(host, index); return exynos_dwmci_core_init(host, index);
} }
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
static struct dwmci_host dwmci_host[DWMMC_MAX_CH_NUM]; static struct dwmci_host dwmci_host[DWMMC_MAX_CH_NUM];
static int do_dwmci_init(struct dwmci_host *host) static int do_dwmci_init(struct dwmci_host *host)

@ -96,7 +96,7 @@ int s5p_sdhci_init(u32 regbase, int index, int bus_width)
return s5p_sdhci_core_init(host); return s5p_sdhci_core_init(host);
} }
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
struct sdhci_host sdhci_host[SDHCI_MAX_HOSTS]; struct sdhci_host sdhci_host[SDHCI_MAX_HOSTS];
static int do_sdhci_init(struct sdhci_host *host) static int do_sdhci_init(struct sdhci_host *host)

@ -21,7 +21,7 @@ DECLARE_GLOBAL_DATA_PTR;
struct mmc_host mmc_host[CONFIG_SYS_MMC_MAX_DEVICE]; struct mmc_host mmc_host[CONFIG_SYS_MMC_MAX_DEVICE];
#ifndef CONFIG_OF_CONTROL #if !CONFIG_IS_ENABLED(OF_CONTROL)
#error "Please enable device tree support to use this driver" #error "Please enable device tree support to use this driver"
#endif #endif

@ -33,7 +33,7 @@ int zynq_sdhci_init(phys_addr_t regbase)
return 0; return 0;
} }
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
int zynq_sdhci_of_init(const void *blob) int zynq_sdhci_of_init(const void *blob)
{ {
int offset = 0; int offset = 0;

@ -266,7 +266,7 @@ static int spi_flash_validate_params(struct spi_slave *spi, u8 *idcode,
return 0; return 0;
} }
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash) int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
{ {
fdt_addr_t addr; fdt_addr_t addr;
@ -292,7 +292,7 @@ int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
return 0; return 0;
} }
#endif /* CONFIG_OF_CONTROL */ #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
/** /**
* spi_flash_probe_slave() - Probe for a SPI flash device on a bus * spi_flash_probe_slave() - Probe for a SPI flash device on a bus
@ -347,7 +347,7 @@ int spi_flash_probe_slave(struct spi_slave *spi, struct spi_flash *flash)
} }
} }
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
if (spi_flash_decode_fdt(gd->fdt_blob, flash)) { if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
debug("SF: FDT decode error\n"); debug("SF: FDT decode error\n");
ret = -EINVAL; ret = -EINVAL;

@ -361,7 +361,7 @@ int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr,
return 1; return 1;
} }
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
int xilinx_emaclite_of_init(const void *blob) int xilinx_emaclite_of_init(const void *blob)
{ {
int offset = 0; int offset = 0;

@ -553,7 +553,7 @@ int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr,
return 1; return 1;
} }
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
int zynq_gem_of_init(const void *blob) int zynq_gem_of_init(const void *blob)
{ {
int offset = 0; int offset = 0;

@ -180,7 +180,7 @@ enum tmu_status_t tmu_monitor(int *temp)
*/ */
static int get_tmu_fdt_values(struct tmu_info *info, const void *blob) static int get_tmu_fdt_values(struct tmu_info *info, const void *blob)
{ {
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
fdt_addr_t addr; fdt_addr_t addr;
int node; int node;
int error = 0; int error = 0;

@ -256,7 +256,7 @@ int pmic_init(unsigned char bus)
{ {
static const char name[] = "MAX77686_PMIC"; static const char name[] = "MAX77686_PMIC";
struct pmic *p = pmic_alloc(); struct pmic *p = pmic_alloc();
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
const void *blob = gd->fdt_blob; const void *blob = gd->fdt_blob;
int node, parent, tmp; int node, parent, tmp;
#endif #endif
@ -266,7 +266,7 @@ int pmic_init(unsigned char bus)
return -ENOMEM; return -ENOMEM;
} }
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
node = fdtdec_next_compatible(blob, 0, COMPAT_MAXIM_MAX77686_PMIC); node = fdtdec_next_compatible(blob, 0, COMPAT_MAXIM_MAX77686_PMIC);
if (node < 0) { if (node < 0) {
debug("PMIC: No node for PMIC Chip in device tree\n"); debug("PMIC: No node for PMIC Chip in device tree\n");

@ -357,7 +357,7 @@ int ns16550_serial_probe(struct udevice *dev)
return 0; return 0;
} }
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
int ns16550_serial_ofdata_to_platdata(struct udevice *dev) int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
{ {
struct ns16550_platdata *plat = dev->platdata; struct ns16550_platdata *plat = dev->platdata;

@ -32,7 +32,7 @@ static void serial_find_console_or_panic(void)
struct udevice *dev; struct udevice *dev;
int node; int node;
if (OF_CONTROL && gd->fdt_blob) { if (CONFIG_IS_ENABLED(OF_CONTROL) && gd->fdt_blob) {
/* Check for a chosen console */ /* Check for a chosen console */
node = fdtdec_get_chosen_node(gd->fdt_blob, "stdout-path"); node = fdtdec_get_chosen_node(gd->fdt_blob, "stdout-path");
if (node < 0) if (node < 0)
@ -55,7 +55,7 @@ static void serial_find_console_or_panic(void)
} }
} }
} }
if (!SPL_BUILD || !OF_CONTROL || !gd->fdt_blob) { if (!SPL_BUILD || !CONFIG_IS_ENABLED(OF_CONTROL) || !gd->fdt_blob) {
/* /*
* Try to use CONFIG_CONS_INDEX if available (it is numbered * Try to use CONFIG_CONS_INDEX if available (it is numbered
* from 1!). * from 1!).

@ -12,7 +12,7 @@
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
static const struct udevice_id omap_serial_ids[] = { static const struct udevice_id omap_serial_ids[] = {
{ .compatible = "ti,omap3-uart" }, { .compatible = "ti,omap3-uart" },
{ .compatible = "ti,omap4-uart" }, { .compatible = "ti,omap4-uart" },

@ -353,7 +353,7 @@ static const struct dm_serial_ops pl01x_serial_ops = {
.setbrg = pl01x_serial_setbrg, .setbrg = pl01x_serial_setbrg,
}; };
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
static const struct udevice_id pl01x_serial_id[] ={ static const struct udevice_id pl01x_serial_id[] ={
{.compatible = "arm,pl011", .data = TYPE_PL011}, {.compatible = "arm,pl011", .data = TYPE_PL011},
{.compatible = "arm,pl010", .data = TYPE_PL010}, {.compatible = "arm,pl010", .data = TYPE_PL010},

@ -9,7 +9,7 @@
#include <ns16550.h> #include <ns16550.h>
#include <serial.h> #include <serial.h>
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
static const struct udevice_id tegra_serial_ids[] = { static const struct udevice_id tegra_serial_ids[] = {
{ .compatible = "nvidia,tegra20-uart" }, { .compatible = "nvidia,tegra20-uart" },
{ } { }
@ -42,7 +42,7 @@ U_BOOT_DEVICE(ns16550_serial) = {
U_BOOT_DRIVER(serial_ns16550) = { U_BOOT_DRIVER(serial_ns16550) = {
.name = "serial_tegra20", .name = "serial_tegra20",
.id = UCLASS_SERIAL, .id = UCLASS_SERIAL,
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
.of_match = tegra_serial_ids, .of_match = tegra_serial_ids,
.ofdata_to_platdata = tegra_serial_ofdata_to_platdata, .ofdata_to_platdata = tegra_serial_ofdata_to_platdata,
.platdata_auto_alloc_size = sizeof(struct ns16550_platdata), .platdata_auto_alloc_size = sizeof(struct ns16550_platdata),

@ -113,7 +113,7 @@ static int uniphier_serial_remove(struct udevice *dev)
return 0; return 0;
} }
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
static const struct udevice_id uniphier_uart_of_match[] = { static const struct udevice_id uniphier_uart_of_match[] = {
{ .compatible = "socionext,uniphier-uart" }, { .compatible = "socionext,uniphier-uart" },
{ /* sentinel */ } { /* sentinel */ }

@ -175,7 +175,7 @@ DECLARE_PSSERIAL_FUNCTIONS(1);
static struct serial_device uart_zynq_serial1_device = static struct serial_device uart_zynq_serial1_device =
INIT_PSSERIAL_STRUCTURE(1, "ttyPS1"); INIT_PSSERIAL_STRUCTURE(1, "ttyPS1");
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
__weak struct serial_device *default_serial_console(void) __weak struct serial_device *default_serial_console(void)
{ {
const void *blob = gd->fdt_blob; const void *blob = gd->fdt_blob;

@ -520,7 +520,7 @@ static int get_max98095_codec_values(struct sound_codec_info *pcodec_info,
const void *blob) const void *blob)
{ {
int error = 0; int error = 0;
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
enum fdt_compat_id compat; enum fdt_compat_id compat;
int node; int node;
int parent; int parent;

@ -814,7 +814,7 @@ static int get_codec_values(struct sound_codec_info *pcodec_info,
const void *blob) const void *blob)
{ {
int error = 0; int error = 0;
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
enum fdt_compat_id compat; enum fdt_compat_id compat;
int node; int node;
int parent; int parent;

@ -585,7 +585,7 @@ static struct tpm_vendor_specific tpm_tis_i2c = {
static enum i2c_chip_type tpm_vendor_chip_type(void) static enum i2c_chip_type tpm_vendor_chip_type(void)
{ {
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
const void *blob = gd->fdt_blob; const void *blob = gd->fdt_blob;
if (fdtdec_next_compatible(blob, 0, COMPAT_INFINEON_SLB9645_TPM) >= 0) if (fdtdec_next_compatible(blob, 0, COMPAT_INFINEON_SLB9645_TPM) >= 0)

@ -22,7 +22,7 @@ struct exynos_dp *dp_regs;
void exynos_dp_set_base_addr(void) void exynos_dp_set_base_addr(void)
{ {
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
unsigned int node = fdtdec_next_compatible(gd->fdt_blob, unsigned int node = fdtdec_next_compatible(gd->fdt_blob,
0, COMPAT_SAMSUNG_EXYNOS5_DP); 0, COMPAT_SAMSUNG_EXYNOS5_DP);
if (node <= 0) if (node <= 0)

@ -28,7 +28,7 @@ DECLARE_GLOBAL_DATA_PTR;
static unsigned int panel_width, panel_height; static unsigned int panel_width, panel_height;
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
vidinfo_t panel_info = { vidinfo_t panel_info = {
/* /*
* Insert a value here so that we don't end up in the BSS * Insert a value here so that we don't end up in the BSS
@ -126,7 +126,7 @@ static void lcd_panel_on(vidinfo_t *vid)
exynos_backlight_on(1); exynos_backlight_on(1);
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
node = fdtdec_next_compatible(gd->fdt_blob, 0, node = fdtdec_next_compatible(gd->fdt_blob, 0,
COMPAT_SAMSUNG_EXYNOS_FIMD); COMPAT_SAMSUNG_EXYNOS_FIMD);
if (node <= 0) { if (node <= 0) {
@ -150,7 +150,7 @@ static void lcd_panel_on(vidinfo_t *vid)
exynos_mipi_dsi_init(); exynos_mipi_dsi_init();
} }
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
int exynos_lcd_early_init(const void *blob) int exynos_lcd_early_init(const void *blob)
{ {
unsigned int node; unsigned int node;
@ -295,7 +295,7 @@ void lcd_ctrl_init(void *lcdbase)
set_system_display_ctrl(); set_system_display_ctrl();
set_lcd_clk(); set_lcd_clk();
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
#ifdef CONFIG_EXYNOS_MIPI_DSIM #ifdef CONFIG_EXYNOS_MIPI_DSIM
exynos_init_dsim_platform_data(&panel_info); exynos_init_dsim_platform_data(&panel_info);
#endif #endif

@ -251,7 +251,7 @@ void exynos_fimd_window_off(unsigned int win_id)
writel(cfg, &fimd_ctrl->winshmap); writel(cfg, &fimd_ctrl->winshmap);
} }
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
/* /*
* The reset value for FIMD SYSMMU register MMU_CTRL is 3 * The reset value for FIMD SYSMMU register MMU_CTRL is 3
* on Exynos5420 and newer versions. * on Exynos5420 and newer versions.
@ -295,7 +295,7 @@ void exynos_fimd_lcd_init(vidinfo_t *vid)
{ {
unsigned int cfg = 0, rgb_mode; unsigned int cfg = 0, rgb_mode;
unsigned int offset; unsigned int offset;
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
unsigned int node; unsigned int node;
node = fdtdec_next_compatible(gd->fdt_blob, node = fdtdec_next_compatible(gd->fdt_blob,

@ -28,7 +28,7 @@
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
static struct exynos_platform_mipi_dsim *dsim_pd; static struct exynos_platform_mipi_dsim *dsim_pd;
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
static struct mipi_dsim_config dsim_config_dt; static struct mipi_dsim_config dsim_config_dt;
static struct exynos_platform_mipi_dsim dsim_platform_data_dt; static struct exynos_platform_mipi_dsim dsim_platform_data_dt;
static struct mipi_dsim_lcd_device mipi_lcd_device_dt; static struct mipi_dsim_lcd_device mipi_lcd_device_dt;
@ -249,7 +249,7 @@ void exynos_set_dsim_platform_data(struct exynos_platform_mipi_dsim *pd)
dsim_pd = pd; dsim_pd = pd;
} }
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
int exynos_dsim_config_parse_dt(const void *blob) int exynos_dsim_config_parse_dt(const void *blob)
{ {
int node; int node;

@ -49,7 +49,7 @@ vidinfo_t panel_info = {
.vl_col = -1, .vl_col = -1,
}; };
#ifndef CONFIG_OF_CONTROL #if !CONFIG_IS_ENABLED(OF_CONTROL)
#error "You must enable CONFIG_OF_CONTROL to get Tegra LCD support" #error "You must enable CONFIG_OF_CONTROL to get Tegra LCD support"
#endif #endif

@ -108,7 +108,7 @@ int cli_readline_into_buffer(const char *const prompt, char *buffer,
*/ */
int cli_simple_parse_line(char *line, char *argv[]); int cli_simple_parse_line(char *line, char *argv[]);
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
/** /**
* cli_process_fdt() - process the boot command from the FDT * cli_process_fdt() - process the boot command from the FDT
* *

@ -20,9 +20,6 @@
#undef CONFIG_CMD_SNTP #undef CONFIG_CMD_SNTP
#undef CONFIG_CMD_TFTPPUT #undef CONFIG_CMD_TFTPPUT
#undef CONFIG_CMD_TFTPSRV #undef CONFIG_CMD_TFTPSRV
#ifndef CONFIG_SPL_OF_CONTROL
#undef CONFIG_OF_CONTROL
#endif
#ifndef CONFIG_SPL_DM #ifndef CONFIG_SPL_DM
#undef CONFIG_DM_SERIAL #undef CONFIG_DM_SERIAL

@ -106,7 +106,8 @@
# define CONFIG_XILINX_TB_WATCHDOG # define CONFIG_XILINX_TB_WATCHDOG
#endif #endif
#ifndef CONFIG_OF_CONTROL #if !defined(CONFIG_OF_CONTROL) || \
(defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_OF_CONTROL))
/* ddr sdram - main memory */ /* ddr sdram - main memory */
# define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START # define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START
# define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE # define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE

@ -214,7 +214,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
#define CONFIG_SPI_FLASH_BAR #define CONFIG_SPI_FLASH_BAR
#endif #endif
#ifdef CONFIG_OF_CONTROL /* DW SPI is controlled via DT */ #if CONFIG_IS_ENABLED(OF_CONTROL) /* DW SPI is controlled via DT */
#define CONFIG_DESIGNWARE_SPI #define CONFIG_DESIGNWARE_SPI
#define CONFIG_CMD_SPI #define CONFIG_CMD_SPI
#endif #endif

@ -122,11 +122,11 @@ struct udevice_id {
ulong data; ulong data;
}; };
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
#define of_match_ptr(_ptr) (_ptr) #define of_match_ptr(_ptr) (_ptr)
#else #else
#define of_match_ptr(_ptr) NULL #define of_match_ptr(_ptr) NULL
#endif /* CONFIG_OF_CONTROL */ #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
/** /**
* struct driver - A driver for a feature or peripheral * struct driver - A driver for a feature or peripheral

@ -45,16 +45,6 @@ struct fdt_memory {
#define SPL_BUILD 0 #define SPL_BUILD 0
#endif #endif
#ifdef CONFIG_OF_CONTROL
# if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_OF_CONTROL)
# define OF_CONTROL 0
# else
# define OF_CONTROL 1
# endif
#else
# define OF_CONTROL 0
#endif
/* /*
* Information about a resource. start is the first address of the resource * Information about a resource. start is the first address of the resource
* and end is the last address (inclusive). The length of the resource will * and end is the last address (inclusive). The length of the resource will

@ -26,8 +26,8 @@ obj-y += crc8.o
obj-y += crc16.o obj-y += crc16.o
obj-$(CONFIG_ERRNO_STR) += errno_str.o obj-$(CONFIG_ERRNO_STR) += errno_str.o
obj-$(CONFIG_FIT) += fdtdec_common.o obj-$(CONFIG_FIT) += fdtdec_common.o
obj-$(CONFIG_OF_CONTROL) += fdtdec_common.o obj-$(CONFIG_$(SPL_)OF_CONTROL) += fdtdec_common.o
obj-$(CONFIG_OF_CONTROL) += fdtdec.o obj-$(CONFIG_$(SPL_)OF_CONTROL) += fdtdec.o
obj-$(CONFIG_TEST_FDTDEC) += fdtdec_test.o obj-$(CONFIG_TEST_FDTDEC) += fdtdec_test.o
obj-$(CONFIG_GZIP) += gunzip.o obj-$(CONFIG_GZIP) += gunzip.o
obj-$(CONFIG_GZIP_COMPRESSED) += gzip.o obj-$(CONFIG_GZIP_COMPRESSED) += gzip.o
@ -51,15 +51,12 @@ endif
ifndef CONFIG_SPL_BUILD ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_OF_LIBFDT) += libfdt/ obj-$(CONFIG_OF_LIBFDT) += libfdt/
obj-$(CONFIG_OF_CONTROL) += fdtdec_common.o
obj-$(CONFIG_OF_CONTROL) += fdtdec.o
endif endif
ifdef CONFIG_SPL_OF_CONTROL ifdef CONFIG_SPL_OF_CONTROL
obj-$(CONFIG_OF_LIBFDT) += libfdt/ obj-$(CONFIG_OF_LIBFDT) += libfdt/
obj-$(CONFIG_OF_CONTROL) += fdtdec_common.o
obj-$(CONFIG_OF_CONTROL) += fdtdec.o
endif endif
obj-$(CONFIG_$(SPL_)OF_CONTROL) += fdtdec_common.o
obj-$(CONFIG_$(SPL_)OF_CONTROL) += fdtdec.o
ifdef CONFIG_SPL_BUILD ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_SPL_YMODEM_SUPPORT) += crc16.o obj-$(CONFIG_SPL_YMODEM_SUPPORT) += crc16.o

@ -1140,7 +1140,7 @@ int fdtdec_decode_display_timing(const void *blob, int parent, int index,
int fdtdec_setup(void) int fdtdec_setup(void)
{ {
#ifdef CONFIG_OF_CONTROL #if CONFIG_IS_ENABLED(OF_CONTROL)
# ifdef CONFIG_OF_EMBED # ifdef CONFIG_OF_EMBED
/* Get a pointer to the FDT */ /* Get a pointer to the FDT */
gd->fdt_blob = __dtb_dt_begin; gd->fdt_blob = __dtb_dt_begin;

@ -3,9 +3,6 @@
# TODO: Invent a better way # TODO: Invent a better way
ifdef CONFIG_SPL_BUILD ifdef CONFIG_SPL_BUILD
ifndef CONFIG_SPL_OF_CONTROL
CONFIG_OF_CONTROL=
endif
ifndef CONFIG_SPL_DM ifndef CONFIG_SPL_DM
CONFIG_DM_SERIAL= CONFIG_DM_SERIAL=

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