armv8: ls1088a: SPL size reduction

Using changes in this patch we were able to reduce approx 8k
size of u-boot-spl.bin image. Following is breif description of
changes to reduce SPL size:
1. Changes in board/freescale/ls1088a/Makefile to remove
   compilation of eth.c and cpld.c in case of SPL build.
2. Changes in board/freescale/ls1088a/ls1088a.c to keep
   board_early_init_f funcations in case of SPL build.
3. Changes in ls1088a_common.h & ls1088ardb.h to remove driver
   specific macros due to which static data was being compiled in
   case of SPL build.

Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
master
Sumit Garg 6 years ago committed by York Sun
parent dcb081ba95
commit 10e7eaf04a
  1. 4
      board/freescale/ls1088a/Makefile
  2. 16
      board/freescale/ls1088a/ls1088a.c
  3. 19
      include/configs/ls1088a_common.h
  4. 20
      include/configs/ls1088ardb.h

@ -5,6 +5,8 @@
# #
obj-y += ls1088a.o obj-y += ls1088a.o
obj-y += ddr.o
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_TARGET_LS1088ARDB) += eth_ls1088ardb.o obj-$(CONFIG_TARGET_LS1088ARDB) += eth_ls1088ardb.o
obj-$(CONFIG_TARGET_LS1088AQDS) += eth_ls1088aqds.o obj-$(CONFIG_TARGET_LS1088AQDS) += eth_ls1088aqds.o
obj-y += ddr.o endif

@ -25,6 +25,13 @@
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
int board_early_init_f(void)
{
fsl_lsch3_early_init_f();
return 0;
}
#ifdef CONFIG_FSL_QIXIS
unsigned long long get_qixis_addr(void) unsigned long long get_qixis_addr(void)
{ {
unsigned long long addr; unsigned long long addr;
@ -42,7 +49,9 @@ unsigned long long get_qixis_addr(void)
return addr; return addr;
} }
#endif
#if !defined(CONFIG_SPL_BUILD)
int checkboard(void) int checkboard(void)
{ {
char buf[64]; char buf[64];
@ -342,12 +351,6 @@ int board_init(void)
return 0; return 0;
} }
int board_early_init_f(void)
{
fsl_lsch3_early_init_f();
return 0;
}
void detail_board_ddr_info(void) void detail_board_ddr_info(void)
{ {
puts("\nDDR "); puts("\nDDR ");
@ -451,3 +454,4 @@ int ft_board_setup(void *blob, bd_t *bd)
return 0; return 0;
} }
#endif #endif
#endif /* defined(CONFIG_SPL_BUILD) */

@ -7,6 +7,19 @@
#ifndef __LS1088_COMMON_H #ifndef __LS1088_COMMON_H
#define __LS1088_COMMON_H #define __LS1088_COMMON_H
/* SPL build */
#ifdef CONFIG_SPL_BUILD
#define SPL_NO_BOARDINFO
#define SPL_NO_QIXIS
#define SPL_NO_PCI
#define SPL_NO_ENV
#define SPL_NO_RTC
#define SPL_NO_USB
#define SPL_NO_SATA
#define SPL_NO_QSPI
#define SPL_NO_IFC
#undef CONFIG_DISPLAY_CPUINFO
#endif
#define CONFIG_REMAKE_ELF #define CONFIG_REMAKE_ELF
#define CONFIG_FSL_LAYERSCAPE #define CONFIG_FSL_LAYERSCAPE
@ -74,8 +87,10 @@
#define CONFIG_BAUDRATE 115200 #define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
#if !defined(SPL_NO_IFC) || defined(CONFIG_TARGET_LS1088AQDS)
/* IFC */ /* IFC */
#define CONFIG_FSL_IFC #define CONFIG_FSL_IFC
#endif
/* /*
* During booting, IFC is mapped at the region of 0x30000000. * During booting, IFC is mapped at the region of 0x30000000.
@ -172,6 +187,7 @@ unsigned long long get_qixis_addr(void);
/* #define CONFIG_DISPLAY_CPUINFO */ /* #define CONFIG_DISPLAY_CPUINFO */
#ifndef SPL_NO_ENV
/* Allow to overwrite serial and ethaddr */ /* Allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE #define CONFIG_ENV_OVERWRITE
@ -211,6 +227,7 @@ unsigned long long get_qixis_addr(void);
" cp.b $kernel_start $kernel_load" \ " cp.b $kernel_start $kernel_load" \
" $kernel_size && bootm $kernel_load" " $kernel_size && bootm $kernel_load"
#endif #endif
#endif
/* Monitor Command Prompt */ /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
@ -219,7 +236,9 @@ unsigned long long get_qixis_addr(void);
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */
#define CONFIG_SYS_LONGHELP #define CONFIG_SYS_LONGHELP
#ifndef SPL_NO_ENV
#define CONFIG_CMDLINE_EDITING 1 #define CONFIG_CMDLINE_EDITING 1
#endif
#define CONFIG_AUTO_COMPLETE #define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_MAXARGS 64 /* max command args */ #define CONFIG_SYS_MAXARGS 64 /* max command args */

@ -9,7 +9,9 @@
#include "ls1088a_common.h" #include "ls1088a_common.h"
#ifndef SPL_NO_BOARDINFO
#define CONFIG_DISPLAY_BOARDINFO_LATE #define CONFIG_DISPLAY_BOARDINFO_LATE
#endif
#define CONFIG_MISC_INIT_R #define CONFIG_MISC_INIT_R
@ -29,7 +31,9 @@
#endif #endif
#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
#ifndef CONFIG_SPL_BUILD
#define CONFIG_QIXIS_I2C_ACCESS #define CONFIG_QIXIS_I2C_ACCESS
#endif
#define SYS_NO_FLASH #define SYS_NO_FLASH
#undef CONFIG_CMD_IMLS #undef CONFIG_CMD_IMLS
#endif #endif
@ -97,7 +101,11 @@
#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
#endif #endif
#endif #endif
#ifndef SPL_NO_IFC
#define CONFIG_NAND_FSL_IFC #define CONFIG_NAND_FSL_IFC
#endif
#define CONFIG_SYS_NAND_MAX_ECCPOS 256 #define CONFIG_SYS_NAND_MAX_ECCPOS 256
#define CONFIG_SYS_NAND_MAX_OOBFREE 2 #define CONFIG_SYS_NAND_MAX_OOBFREE 2
@ -139,7 +147,10 @@
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
#ifndef SPL_NO_QIXIS
#define CONFIG_FSL_QIXIS #define CONFIG_FSL_QIXIS
#endif
#define CONFIG_SYS_I2C_FPGA_ADDR 0x66 #define CONFIG_SYS_I2C_FPGA_ADDR 0x66
#define QIXIS_LBMAP_SWITCH 2 #define QIXIS_LBMAP_SWITCH 2
#define QIXIS_QMAP_MASK 0xe0 #define QIXIS_QMAP_MASK 0xe0
@ -223,6 +234,8 @@
#define I2C_RETIMER_ADDR 0x18 #define I2C_RETIMER_ADDR 0x18
#define I2C_MUX_CH_DEFAULT 0x8 #define I2C_MUX_CH_DEFAULT 0x8
#define I2C_MUX_CH5 0xD #define I2C_MUX_CH5 0xD
#ifndef SPL_NO_RTC
/* /*
* RTC configuration * RTC configuration
*/ */
@ -230,6 +243,7 @@
#define CONFIG_RTC_PCF8563 1 #define CONFIG_RTC_PCF8563 1
#define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/ #define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/
#define CONFIG_CMD_DATE #define CONFIG_CMD_DATE
#endif
/* EEPROM */ /* EEPROM */
#define CONFIG_ID_EEPROM #define CONFIG_ID_EEPROM
@ -240,12 +254,14 @@
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
#ifndef SPL_NO_QSPI
/* QSPI device */ /* QSPI device */
#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
#define CONFIG_FSL_QSPI #define CONFIG_FSL_QSPI
#define FSL_QSPI_FLASH_SIZE (1 << 26) #define FSL_QSPI_FLASH_SIZE (1 << 26)
#define FSL_QSPI_FLASH_NUM 2 #define FSL_QSPI_FLASH_NUM 2
#endif #endif
#endif
#define CONFIG_CMD_MEMINFO #define CONFIG_CMD_MEMINFO
#define CONFIG_CMD_MEMTEST #define CONFIG_CMD_MEMTEST
@ -260,6 +276,7 @@
#define CONFIG_FSL_MEMAC #define CONFIG_FSL_MEMAC
#ifndef SPL_NO_ENV
/* Initial environment variables */ /* Initial environment variables */
#if defined(CONFIG_QSPI_BOOT) #if defined(CONFIG_QSPI_BOOT)
#define MC_INIT_CMD \ #define MC_INIT_CMD \
@ -408,6 +425,7 @@
#define CONFIG_ETHPRIME "DPMAC1@xgmii" #define CONFIG_ETHPRIME "DPMAC1@xgmii"
#define CONFIG_PHY_GIGE #define CONFIG_PHY_GIGE
#endif #endif
#endif
/* MMC */ /* MMC */
#ifdef CONFIG_MMC #ifdef CONFIG_MMC
@ -415,6 +433,7 @@
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#endif #endif
#ifndef SPL_NO_ENV
#undef CONFIG_CMDLINE_EDITING #undef CONFIG_CMDLINE_EDITING
#include <config_distro_defaults.h> #include <config_distro_defaults.h>
@ -423,6 +442,7 @@
func(SCSI, scsi, 0) \ func(SCSI, scsi, 0) \
func(DHCP, dhcp, na) func(DHCP, dhcp, na)
#include <config_distro_bootcmd.h> #include <config_distro_bootcmd.h>
#endif
#include <asm/fsl_secure_boot.h> #include <asm/fsl_secure_boot.h>

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